CN114815940A - Voltage generation circuit and related capacitor charging method and system - Google Patents
Voltage generation circuit and related capacitor charging method and system Download PDFInfo
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- CN114815940A CN114815940A CN202110089093.XA CN202110089093A CN114815940A CN 114815940 A CN114815940 A CN 114815940A CN 202110089093 A CN202110089093 A CN 202110089093A CN 114815940 A CN114815940 A CN 114815940A
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- 238000000034 method Methods 0.000 title claims abstract description 14
- 239000003381 stabilizer Substances 0.000 claims abstract description 7
- 230000008878 coupling Effects 0.000 claims 1
- 238000010168 coupling process Methods 0.000 claims 1
- 238000005859 coupling reaction Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 6
- 101100367237 Rattus norvegicus Svs2 gene Proteins 0.000 description 1
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
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Abstract
The application provides a voltage generation circuit and a related capacitor charging method and system. The voltage generating circuit is arranged in the chip and used for generating a first output voltage and a second output voltage, the chip is provided with a first output port and a second output port, the first output port and the second output port are respectively coupled to a first capacitor and a second capacitor outside the chip, and the voltage generating circuit comprises a constant current type voltage generating unit and a voltage stabilizer. The voltage regulator is configured as a cell gain buffer to charge the first capacitor to the first output voltage when the voltage generation circuit operates in a first mode; and when the voltage generation circuit operates in a second mode, the voltage regulator is configured as a low dropout voltage regulator to charge the second capacitor to the second output voltage.
Description
Technical Field
The present disclosure relates to voltage generation circuits, and more particularly, to a voltage generation circuit and related capacitor charging method and system capable of quickly reaching a steady state at power-on.
Background
For some systems requiring fast start-up, such as bluetooth headsets, it is desirable to enter steady state as soon as possible after start-up and allow normal use by the user, and therefore, the voltage regulator in the system needs to have a large push force. However, these systems generally pay attention to power saving, and the voltage stabilizer with larger thrust force generally increases the overall power consumption of the system greatly, so how to combine the start-up speed and the power consumption of the voltage stabilizer at the same time becomes one of the problems to be solved in the art.
Disclosure of Invention
The application discloses voltage generation circuit sets up in the chip for produce first output voltage and second output voltage, wherein this second output voltage is greater than this first output voltage, and this chip has first output port and second output port, and first output port and second output port couple to first electric capacity and second electric capacity outside this chip respectively, and this voltage generation circuit includes: a constant current type voltage generating unit; a voltage regulator coupled to an output of the constant current mode voltage generating unit; a first switch coupled between the output terminal of the constant current type voltage generating unit and the first output port; and a second switch coupled between the output terminal of the voltage regulator and the first output port; wherein when the voltage generation circuit operates in a first mode, the first switch is not conductive, the second switch is conductive, the output of the constant current mode voltage generation unit outputs the first output voltage to the regulator, the regulator configured as a cell gain buffer to charge the first capacitor to the first output voltage; and when the voltage generation circuit operates in a second mode, the first switch is turned on, the second switch is turned off, the output terminal of the constant current type voltage generation unit outputs the first output voltage to the regulator configured as a low dropout regulator to charge the second capacitor to the second output voltage.
The application discloses a capacitor charging method, which is used for generating a first output voltage and a second output voltage in a chip, wherein the second output voltage is larger than the first output voltage, the chip is provided with a first output port and a second output port, the first output port and the second output port are respectively coupled to a first capacitor and a second capacitor outside the chip, and the capacitor charging method comprises the following steps: in a first mode, outputting the first output voltage to a voltage regulator by using a constant current type voltage generating unit, and configuring the voltage regulator as a unit gain buffer to charge the first capacitor to the first output voltage; and in a second mode, outputting the first output voltage to a voltage regulator by using the constant current type voltage generating unit, and configuring the voltage regulator as a low dropout regulator to charge the second capacitor to the second output voltage.
The application discloses a system, including: a first capacitor; a second capacitor; a chip, comprising: a first output port coupled to the first capacitor; a second output port coupled to the second capacitor; a voltage generating circuit for generating a first output voltage and a second output voltage, wherein the second output voltage is greater than the first output voltage, the voltage generating circuit comprising: a constant current type voltage generating unit; a voltage regulator coupled to an output of the constant current mode voltage generating unit; a first switch coupled between the output terminal of the constant current type voltage generating unit and the first output port; and a second switch coupled between the output terminal of the voltage regulator and the first output port; wherein when the voltage generation circuit operates in a first mode, the first switch is not conductive, the second switch is conductive, the output of the constant current mode voltage generation unit outputs the first output voltage to the regulator, the regulator configured as a cell gain buffer to charge the first capacitor to the first output voltage; and when the voltage generation circuit operates in a second mode, the first switch is turned on, the second switch is turned off, the output terminal of the constant current type voltage generation unit outputs the first output voltage to the regulator configured as a low dropout regulator to charge the second capacitor to the second output voltage.
The voltage generation circuit and the related capacitor charging method and system can simultaneously take account of starting speed and power consumption.
Drawings
FIG. 1 is a schematic diagram of an embodiment of a system of the present application.
Fig. 2 is an equivalent schematic diagram of the system of the present application operating in a first mode.
Fig. 3 is an equivalent schematic diagram of the system of the present application operating in a second mode.
Detailed Description
FIG. 1 is a schematic diagram of an embodiment of a system of the present application in its entirety. The chip 100 is included, the chip 100 has a first output port 140 and a second output port 142, and the first output port 140 and the second output port 142 are respectively coupled to a first capacitor 144 and a second capacitor 146 outside the chip 100. The chip 100 includes a voltage generating circuit 102 for providing a reference voltage to a circuit module 104 in the chip 100, for example, the chip 100 is a chip for bluetooth-related applications, and the circuit module 104 is a digital-to-analog converter or an analog-to-digital converter. When the voltage generating circuit 102 reaches a steady state after being turned on (e.g., the system is turned on), it generates a first output voltage Vout1 and a second output voltage Vout2 to the circuit module 104, wherein the second output voltage Vout2 is greater than the first output voltage Vout1, for example, when the circuit module 104 is a digital-to-analog converter or an analog-to-digital converter, the second output voltage Vout2 is twice the first output voltage Vout1 to obtain a maximum signal-to-noise ratio. The present application is intended to reduce the time for the voltage generating circuit 102 to reach the steady state after being started, and not to additionally increase the power consumption of the voltage generating circuit 102 in the steady state.
The first capacitor 144 and the second capacitor 146 outside the chip 100 are used for noise filtering, when the voltage generating circuit 102 is activated, the first capacitor 144 and the second capacitor 146 are charged to the first output voltage Vout1 and the second output voltage Vout2, and the voltage generating circuit 102 reaches a steady state after the charging is completed. Therefore, the focus of the present application is to reduce the charging speed of the first capacitor 144 and the second capacitor 146, especially the charging speed of the first capacitor 144, as described in detail below.
As shown in fig. 1, the voltage generating circuit 102 includes a constant current type voltage generating unit 106 and a voltage regulator 108, both for supplying voltages but in different manners, the constant current type voltage generating unit 106 includes a current source 110 coupled to a first reference voltage V1, a fixed current generated by the current source 110 generates a voltage variation through resistors 112,114,116 connected in series between the current source 110 and a second reference voltage V2, and the voltage selection switches 118,120 are set to enable the output end out1 of the constant current type voltage generating unit 106 to output a desired voltage value, for example, the signals Svs1 and Svs2 are both set to 1 to generate a first output voltage Vout 1. The constant current type voltage generating unit 106 may have different embodiments and may be more complex or simpler, for example, the most basic embodiment is to include only the current source 110, the resistors 112,114, and the node between the resistors 112,114 as the output terminal out 1. In addition, the first reference voltage V1 and the second reference voltage V2 are different, for example, the second reference voltage V2 is a ground voltage. The voltage selection switches 118,120 may be implemented in any manner, such as N-type or P-type transistors.
Since the current supplied by the current source 110 remains constant after the voltage generating circuit 102 is started up and enters a steady state, which directly affects the power consumption of the overall system, the current supplied by the current source 110 is generally not large.
The voltage generating circuit 102 further includes a voltage regulator 108, a first switch 132 and a second switch 134. The voltage regulator 108 is coupled to the output end out1 of the constant current type voltage generating unit 106, and generates a second output voltage Vout2 according to the first output voltage Vout1 output by the constant current type voltage generating unit 106. The first switch 132 is coupled between the output terminal out1 of the constant current mode voltage generating unit 106 and the first output port 140. The second switch 134 is coupled between the output terminal out2 of the voltage regulator 108 and the first output port 140.
The amplifier 122 of the voltage regulator 108 has a positive terminal (+), a negative terminal (-) and an output terminal, the negative terminal being coupled to the output terminal out1 of the constant current mode voltage generating unit 106. The gate of the P-type transistor 124 is coupled to the output of the amplifier 122, the source of the P-type transistor 124 is coupled to the first reference voltage V1, and the drain of the P-type transistor 124 is coupled to the output out2 of the voltage regulator 108. Resistor 126 is coupled to the drain of P-type transistor 124 on one end and to the positive terminal of amplifier 122 on the other end. The resistor 128 and the third switch 130 are serially connected between the resistor 126 and the second reference voltage V2.
The constant current type voltage generating unit 106 can supply a fixed current, and the voltage regulator 108 can supply a non-fixed current, so the thrust of the voltage regulator 108 is much larger than that of the constant current type voltage generating unit 106. By utilizing this characteristic, when the voltage generating circuit 102 is just started up, the first switch 132 and the third switch 130 are turned off and the second switch 134 is turned on by the signals S1, S2 and S3 to set the voltage generating circuit 102 in the first mode, so that the output end out1 of the constant current type voltage generating unit 106 outputs the first output voltage Vout1 to the regulator 108, and the regulator 108 charges the first capacitor 144 and the second capacitor 146. When the first capacitor 144 and the second capacitor 146 are charged to the first output voltage Vout1, the first switch 132 and the third switch 130 are turned on and the second switch 134 is turned off by the signals S1, S2 and S3 to set the voltage generating circuit 102 in the second mode, so that the output end out1 of the constant current type voltage generating unit 106 outputs the first output voltage Vout1 to the regulator 108, and the regulator 108 continues to charge the second capacitor 146 to the second output voltage Vout 2.
Fig. 2 is an equivalent diagram of the system of the present application operating in the first mode. The output terminal out1 of the constant current type voltage generating unit 106 outputs a first output voltage Vout1 to the voltage regulator 108, and the voltage regulator 108 is configured as a cell gain buffer in the first mode, such that the output terminal out2 of the voltage regulator 108 outputs the first output voltage Vout 1. In this mode, the currents (i.e., the sum of the currents I1 and I2) that can be supplied to the first capacitor 144 and the second capacitor 146 are much larger than the current supplied by the current source 110, and theoretically, the smaller the resistance value on the path from the first reference voltage V1 to the first capacitor 144 and the second capacitor 146, the larger the current is. Therefore, the second switch 134 can be designed in such a way that the N-type transistor and the P-type transistor are connected in parallel to reduce the equivalent resistance of the second switch 134, as shown in fig. 1, the signal S2 can be passed through the inverter 136 to make the N-type transistor and the P-type transistor of the second switch 134 turn on synchronously.
Fig. 3 is an equivalent diagram of the system of the present application operating in the second mode. The output end out1 of the constant current type voltage generating unit 106 still outputs the first output voltage Vout1 to the regulator 108, the regulator 108 is configured as a low dropout regulator in the second mode, the positive terminal and the negative terminal of the regulator 108 are both locked to the first output voltage Vout1, so the output end out2 of the regulator 108 outputs the second output voltage Vout2 higher than the first output voltage Vout1, for example, when the second reference voltage V2 is at ground voltage and the resistances 126 and 130 have the same resistance value, the output end out2 of the regulator 108 outputs the second output voltage Vout2 twice as the first output voltage Vout 1. The current I3 charges the second capacitor 146 from the first reference voltage V1 through the P-type transistor 124 via the second output port 142, and charges the voltage of the second capacitor 146 from the first output voltage Vout1 to the second output voltage Vout 2.
Referring to fig. 1 to 3, since no current flows through the first switch 132 and the third switch 130 when the first capacitor 144 and/or the second capacitor 146 are charged, it is not necessary to reduce the resistance of the first switch 132 and the third switch 130.
The voltage generation circuit 102 of the present application uses a larger current only in the first mode and the second mode before entering the steady state to speed up the charging of the capacitors 144, 142 outside the chip 100, and thus does not affect the power consumption after entering the steady state. The system of the present application can be applied to many applications, for example, when applied to a bluetooth headset, the power-on time can be reduced to about 1/10 originally, and the power consumption in a steady state after power-on is not increased additionally.
The above discussion is a brief summary of features of certain embodiments of the application so that those skilled in the art may more fully appreciate variations of the disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. It should be understood that the steps mentioned in the method flow chart of the present application, except the sequence specifically stated, can be modified in sequence or even executed simultaneously or partially simultaneously according to actual needs. Furthermore, each of the above modules or method steps may be implemented by hardware, software or firmware according to the requirements of a designer. Those skilled in the art should understand that they can still make various changes, substitutions and alterations herein without departing from the spirit and scope of the present disclosure.
[ notation ] to show
100: chip and method for manufacturing the same
102: voltage generating circuit
104: circuit module
106: constant current type voltage generating unit
108: voltage stabilizer
110: current source
112,114,116: resistance (RC)
118,120: voltage selection switch
122: amplifier with a high-frequency amplifier
124: p-type transistor
126,128: resistance (RC)
130: third switch
132: first switch
134: the second switch
136: reverser
140: first output port
142: second output port
144: first capacitor
146: second capacitor
Claims (10)
1. A voltage generation circuit, disposed in a chip, for generating a first output voltage and a second output voltage, wherein the second output voltage is greater than the first output voltage, and the chip has a first output port and a second output port, the first output port and the second output port are respectively coupled to a first capacitor and a second capacitor outside the chip, the voltage generation circuit comprising:
a constant current type voltage generating unit;
a voltage regulator coupled to an output of the constant current mode voltage generating unit;
a first switch coupled between the output terminal of the constant current mode voltage generating unit and the first output port; and
a second switch coupled between an output of the voltage regulator and the first output port;
wherein when the voltage generation circuit operates in a first mode, the first switch is non-conductive, the second switch is conductive, the output of the constant current mode voltage generation unit outputs the first output voltage to the voltage regulator, the voltage regulator configured as a cell gain buffer to charge the first capacitor to the first output voltage; and
when the voltage generation circuit operates in a second mode, the first switch is turned on, the second switch is turned off, the output terminal of the constant current type voltage generation unit outputs the first output voltage to the regulator configured as a low dropout regulator to charge the second capacitor to the second output voltage.
2. The voltage generation circuit of claim 1, wherein the voltage regulator also charges the second capacitance to the first output voltage when the voltage generation circuit operates in the first mode.
3. The voltage generation circuit of claim 1 wherein the second switch comprises an N-type transistor and a P-type transistor in parallel.
4. The voltage generation circuit according to claim 1, wherein the constant current type voltage generation unit comprises:
a current source coupled to a first reference voltage;
the first resistor and the second resistor are connected between the current source and a second reference voltage in series; and
a first voltage selection switch having a first terminal coupled between the first resistor and the second resistor and a second terminal coupled to the output terminal of the constant current mode voltage generating unit.
5. The voltage generation circuit of claim 1, wherein the voltage regulator comprises:
an amplifier having a positive terminal, a negative terminal, and an output terminal, the negative terminal coupled to the output terminal of the constant current mode voltage generating unit;
a P-type transistor having a gate, a drain, and a source, the gate coupled to the output of the amplifier, the source coupled to a first reference voltage, the drain coupled to the output of the voltage regulator;
a third resistor having one end coupled to the drain of the P-type transistor and another end coupled to the positive terminal of the amplifier;
the fourth resistor is connected between the third resistor and a second reference voltage in series; and
and the third switch is connected between the third resistor and the second reference voltage in series.
6. The voltage generation circuit of claim 5, wherein the third switch is non-conductive when the voltage generation circuit is operating in the first mode; and the third switch is turned on when the voltage generation circuit operates in the second mode.
7. The voltage generation circuit of claim 1, wherein the first output voltage and the second output voltage are taken as a reference voltage of a digital-to-analog converter in the chip or a reference voltage of an analog-to-digital converter in the chip.
8. A capacitor charging method for generating a first output voltage and a second output voltage in a chip, wherein the second output voltage is greater than the first output voltage, and the chip has a first output port and a second output port, and the first output port and the second output port are respectively coupled to a first capacitor and a second capacitor outside the chip, the capacitor charging method comprising:
in a first mode, outputting the first output voltage to a voltage regulator using a constant current type voltage generation unit, and configuring the voltage regulator as a unit gain buffer to charge the first capacitor to the first output voltage; and
in a second mode, the constant current mode voltage generation unit is used for outputting the first output voltage to a voltage stabilizer, and the voltage stabilizer is configured as a low dropout voltage stabilizer to charge the second capacitor to the second output voltage.
9. The capacitor charging method of claim 8, wherein in the first mode, configuring the voltage regulator as a cell gain buffer to charge the first capacitor to the first output voltage comprises:
disconnecting an output of the constant current mode voltage generating unit from the first output port using a first switch, and coupling an output of the voltage regulator to the first output port using a second switch.
10. A system, comprising:
a first capacitor;
a second capacitor;
a chip, comprising:
a first output port coupled to the first capacitance;
a second output port coupled to the second capacitance;
a voltage generating circuit for generating a first output voltage and a second output voltage, wherein the second output voltage is greater than the first output voltage, the voltage generating circuit comprising:
a constant current type voltage generating unit;
a voltage regulator coupled to an output of the constant current mode voltage generating unit;
a first switch coupled between the output terminal of the constant current mode voltage generating unit and the first output port; and
a second switch coupled between an output of the voltage regulator and the first output port;
wherein when the voltage generation circuit operates in a first mode, the first switch is non-conductive, the second switch is conductive, the output of the constant current mode voltage generation unit outputs the first output voltage to the voltage regulator, the voltage regulator configured as a cell gain buffer to charge the first capacitor to the first output voltage; and
when the voltage generation circuit operates in a second mode, the first switch is turned on, the second switch is turned off, the output terminal of the constant current type voltage generation unit outputs the first output voltage to the regulator configured as a low dropout regulator to charge the second capacitor to the second output voltage.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202110089093.XA CN114815940B (en) | 2021-01-22 | 2021-01-22 | Voltage generating circuit and related capacitor charging method and system |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202110089093.XA CN114815940B (en) | 2021-01-22 | 2021-01-22 | Voltage generating circuit and related capacitor charging method and system |
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|---|---|
| CN114815940B (en) | 2024-01-30 |
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