CN110109501B - Load jump quick response circuit and quick response method - Google Patents
Load jump quick response circuit and quick response method Download PDFInfo
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- CN110109501B CN110109501B CN201910368600.6A CN201910368600A CN110109501B CN 110109501 B CN110109501 B CN 110109501B CN 201910368600 A CN201910368600 A CN 201910368600A CN 110109501 B CN110109501 B CN 110109501B
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- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
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Abstract
The invention provides a load jump quick response circuit, which comprises a load jump detection module, a logic control module and a quick response module; the load jump detection module comprises a first resistor, a second resistor, a first capacitor, a second capacitor and a comparator; the quick response module adjusts output current in a mode of adjusting the number of input pair tubes and the number of current sources. The invention also provides a quick response method based on the level conversion circuit. Compared with the prior art, the load jump quick response circuit and the quick response method can quickly reduce the influence of load voltage jump on the load voltage, and the circuit structure is simple and easy to expand.
Description
Technical Field
The invention relates to the technical field of electronic circuits, in particular to a load jump quick response circuit and a quick response method.
Background
At present, mobile devices such as smart phones, wearable devices, electric tools, unmanned aerial vehicles and the like are used more and more. The charging and discharging circuit in the mobile device is an important component. The charging and discharging circuit generates output voltage according to a certain voltage value through an internal circuit, the output voltage of the charging and discharging circuit is used for charging and discharging a load, the load jump quick response circuit is a basic circuit of the charging and discharging circuit, and the load jump quick response circuit is favorable for improving the reliability of the charging and discharging circuit.
The load jump fast response circuit in the related art is generally implemented by a digital-analog hybrid circuit, and a window detection mode is adopted in detecting voltages at two ends of a load, wherein the window detection mode requires a plurality of digital clock signals for detection in a digital circuit, and a certain voltage value needs to be set for the load voltage in an analog circuit to judge whether the load voltage jump occurs.
However, in the related art, on one hand, the duty ratio of the control signal directly influencing the control circuit of the next stage is large due to the fact that a plurality of digital clocks are used for detection, and the output of the load jump quick response circuit is caused to generate an overshoot phenomenon; on the other hand, the analog circuit detection circuit needs the load voltage to drop to a certain voltage value, and then the circuit can detect the load voltage, which directly causes that the whole circuit response is not timely enough.
Therefore, it is necessary to provide a new load jump fast response circuit and fast response method to solve the above problems.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides a load jump quick response circuit and a quick response method, which can quickly reduce the influence of load voltage jump on load voltage, have simple circuit structure and are easy to expand.
In order to solve the above technical problem, the present invention provides a load jump fast response circuit, including: the load jump detection module is used for comparing and judging the received load voltage signal with a preset reference voltage signal and outputting a detection signal; the logic control module is used for judging the load state of the detection signal and carrying out logic operation according to the judgment result to generate a control signal; the quick response module is used for receiving the control signal and adjusting the output current so as to enable the load voltage to be quickly stabilized; the load jump detection module comprises a first resistor, a second resistor, a first capacitor, a second capacitor and a comparator; a first end of the first resistor is respectively connected to a reference voltage input end and a positive input end of the comparator, and a second end of the first resistor is respectively connected to a positive end of the first capacitor and a negative input end of the comparator; a first end of the second resistor is connected to a load voltage input end, and a second end of the second resistor is respectively connected to a negative end of the first capacitor and a positive end of the second capacitor; the negative end of the second capacitor is connected to the ground; the output end of the comparator is used as the detection signal output end of the load jump detection module; the quick response module adjusts output current in a mode of adjusting the number of input pair tubes and the number of current sources.
Preferably, the logic control module is a digital circuit.
Preferably, the fast response module includes a first current source, a second current source, a first transistor, a second transistor, a third transistor, a fourth transistor, a first switch, a second switch, and a third switch; the input end of the first current source and the input end of the second current source are both connected to a power supply voltage; an output end of the first current source is connected to a second end of the first switch, a source end of the first transistor, a source end of the second transistor, a source end of the third transistor and a source end of the fourth transistor respectively; the output ends of the second current sources are respectively connected to the first ends of the first switches; the grid end of the first transistor is respectively connected to the grid end of the third transistor and the negative conducting voltage input end, and the drain electrode of the first transistor is connected to the second end of the second switch and serves as the first output end of the quick response module; the grid end of the second transistor is respectively connected to the grid end of the fourth transistor and the positive conducting voltage input end, and the drain electrode of the second transistor is connected to the second end of the third switch and serves as the second output end of the quick response module; a drain of the third transistor is connected to a first end of the second switch; a drain of the fourth transistor is connected to a first end of the third switch; and the third end of the first switch, the third end of the second switch and the third end of the third switch are all connected to a control signal input end.
Preferably, the first transistor, the second transistor, the third transistor, and the fourth transistor are all PMOS transistors.
Preferably, the first transistor, the second transistor, the third transistor, and the fourth transistor have the same size.
The invention also provides a quick response method, which is based on the level conversion circuit, and comprises the following steps:
detecting load jump, wherein a load jump detection module receives a load voltage signal and judges whether the load voltage jump occurs or not by judging whether the voltage jump amplitude of the load voltage signal is larger than a preset reference voltage value or not;
triggering the quick response module, if the load voltage jumps, generating a pulse of a control level of a time period T1 by the logic control module, sending the pulse to the quick response module through a control signal, and if not, keeping low-level output by the quick response module;
and adjusting a fast response module, wherein the fast response module receives the control signal and adjusts output current according to the pulse with the control level so as to enable the load voltage to be fast and stable.
Preferably, in the step of detecting the load jump, the load jump detecting module determines whether the voltage jump amplitude of the load voltage signal is greater than a preset reference voltage value as a real-time detection in a coupling manner.
Preferably, in the step of triggering the fast response module, no pulse is generated any more in a time period T2 after the pulse of the control level is ended, and the control signal outputs a signal having a mask level in a time period T2.
Preferably, in the step of triggering the fast response module, after time T1+ T2, the load jump detection module starts receiving the load voltage signal again and determines whether a load voltage jump occurs.
Preferably, in the step of adjusting the fast response module, the output current is adjusted by adjusting the number of input pair transistors and the number of current sources.
Compared with the prior art, the load jump quick response circuit and the quick response method of the invention adopt a coupling mode to detect in real time through the circuit of the load jump detection module, and the load jump quick response circuit and the quick response method can detect without waiting for the load voltage signal to drop to a certain voltage value, thereby ensuring that the detection speed is higher. In addition, the quick response module adjusts the output current by adjusting the number of input geminate transistors and the number of current sources, reduces the response time of the load jump quick response circuit and the charge-discharge circuit system, and can perform linear dynamic adjustment along with the change of the load voltage signal, so that the response time is reduced, and the effect of quickly stabilizing the load voltage is achieved. In summary, when the load voltage jumps, the load jump fast response circuit and the fast response method can quickly reduce the influence of the load voltage jumps on the load voltage, and the circuit structure is simple and easy to expand.
Drawings
The present invention will be described in detail below with reference to the accompanying drawings. The foregoing and other aspects of the invention will become more apparent and more readily appreciated from the following detailed description, taken in conjunction with the accompanying drawings. In the drawings:
FIG. 1 is a block diagram of a load jump fast response circuit according to the present invention;
FIG. 2 is a circuit diagram of the load jump detection module shown in FIG. 1;
FIG. 3 is a circuit block diagram of the fast response module of FIG. 1;
FIG. 4 is a voltage time response diagram of the detection signal and the control signal in FIG. 1;
FIG. 5 is a voltage time response graph of the load voltage and the control signal in FIG. 1;
fig. 6 is a flow chart of the fast response method of the present invention.
Detailed Description
The following detailed description of embodiments of the invention refers to the accompanying drawings.
The embodiments/examples described herein are specific embodiments of the present invention, are intended to be illustrative of the concepts of the present invention, are intended to be illustrative and exemplary, and should not be construed as limiting the embodiments and scope of the invention. In addition to the embodiments described herein, those skilled in the art will be able to employ other technical solutions which are obvious based on the disclosure of the claims and the specification of the present application, and these technical solutions include those which make any obvious replacement or modification of the embodiments described herein, and all of which are within the scope of the present invention.
Referring to fig. 1, the present invention provides a load jump fast response circuit 100, which includes a load jump detection module 1, a logic control module 2, and a fast response module 3.
The load jump fast response circuit 100 is generally applied to a charging circuit system or a complete machine, and is used for rapidly stabilizing an internal circuit of the charging circuit system or the complete machine when a load voltage jump occurs, so that the load voltage and a voltage of a corresponding circuit are stabilized as soon as possible. In this embodiment, the load jump fast response circuit 100 is applied to the charging circuit system or the complete machine in a boost chopper (boost) mode, and through improvement of an error amplifier of the boost chopper (boost) circuit, a fast stabilization circuit and a fast stabilization system are realized when a load voltage jumps.
Referring to fig. 2, the load jump detecting module 1 is configured to compare and determine a received load voltage signal with a preset reference voltage signal, and output a detecting signal Vo. Wherein, the voltage value of the load voltage signal is the load voltage Vout. The load voltage Vout is generally the value of the voltage across the rechargeable battery. The voltage value of the reference voltage signal is a reference voltage Vref, and the voltage value of the reference voltage Vref is a fixed value. The detection signal Vo indicates whether the load jump occurs in the form of a digital pulse voltage.
Specifically, the load jump detection module 1 includes a first resistor R1, a second resistor R2, a first capacitor C1, a second capacitor C2, and a comparator COMP. The specific circuit connection relationship is as follows:
a first end of the first resistor R1 is connected to a reference voltage input end and a positive input end of the comparator COMP, respectively. A second end of the first resistor R1 is connected to the positive terminal of the first capacitor C1 and the negative input terminal of the comparator COMP, respectively. A first terminal of the second resistor R2 is connected to a load voltage input terminal. A second end of the second resistor R2 is connected to the negative terminal of the first capacitor C1 and the positive terminal of the second capacitor C2, respectively. The negative terminal of the second capacitor C2 is connected to ground. And the output end of the comparator COMP serves as a detection signal output end of the load jump detection module 1.
Although the comparator COMP is a boost error amplifier, it is not limited thereto, and it is also possible to use a general comparator by adjusting the resistance value of the first resistor R1, the resistance value of the second resistor R2, the capacitance value of the first capacitor C1, and the capacitance value of the second capacitor C2.
The logic control module 2 is configured to perform load state judgment on the detection signal Vo, and perform logic operation according to a judgment result to generate a control signal Vctrl. The input end of the logic control module 2 receives the detection signal Vo sent by the load jump detection module 1. The control signal Vctrl at the output end of the logic control module 2 is sent to the fast response module 3. In this embodiment, the logic control module 2 always detects whether the load jump occurs in the detection signal Vo, and when the control signal Vctrl is generated and transmitted, it suspends detecting the detection signal Vo, and resumes detecting the detection signal Vo after the control signal Vctrl is completely transmitted.
Specifically, the logic control module 2 stops performing the load state judgment on the detection signal Vo within the time of generating the control level and the mask level. The load state is determined by detecting whether the load voltage Vout of the detection signal Vo jumps or not by the logic control module 2, if not, the control signal Vctrl maintains a low level, and if so, the control signal Vctrl includes a control level and a mask level which are sequentially generated and have a fixed duration, and the control level is used for adjusting the fast response module 3.
In this embodiment, the logic control module 2 is a digital circuit. The digital circuit is adopted to realize the circuit function of the logic control module 2, which has the characteristics of small number of devices and small layout area, and can also reduce the power consumption of the circuit. Of course, without limitation, the logic control module 2 is implemented by an analog circuit or a digital-analog hybrid circuit.
Referring to fig. 3, the fast response module 3 is configured to receive the control signal Vctrl and adjust an output current to quickly stabilize the load voltage Vout. The output current of the fast response module 3 can adjust the overall circuit transconductance parameter gm of the circuit of the next stage receiving the output current, so that the load voltage Vout is fast stabilized.
In this embodiment, the fast response module 3 adjusts the output current by adjusting the number of input pair transistors and the number of current sources.
Specifically, the fast response module 3 includes a first current source I1, a second current source I2, a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a first switch S1, a second switch S2, and a third switch S3. The first transistor M1 and the third transistor M3 form one pair of the input transistors, and the second transistor M2 and the fourth transistor M4 form another pair of the input transistors. The tail current source includes the first current source I1 and the second current source I2, but is not limited thereto, and more current sources may be provided, and the same function can be achieved.
The specific circuit connection relationship is as follows:
the input end of the first current source I1 and the input end of the second current source I2 are both connected to a power supply voltage VDD;
an output terminal of the first current source I1 is connected to the second terminal of the first switch S1, the source terminal of the first transistor M1, the source terminal of the second transistor M2, the source terminal of the third transistor M3 and the source terminal of the fourth transistor M4, respectively.
The output terminals of the second current source I2 are respectively connected to the first terminals of the first switches S1.
The gate terminal of the first transistor M1 is connected to the gate terminal of the third transistor M3 and the negative turn-on voltage input terminal Vn, respectively, and the drain terminal of the first transistor M1 is connected to the second terminal of the second switch S2 and serves as the first output terminal GM1 of the fast response module 3.
The gate terminal of the second transistor M2 is respectively connected to the gate terminal of the fourth transistor M4 and the positive turn-on voltage input terminal Vp, and the drain terminal of the second transistor M2 is connected to the second terminal of the third switch S3 and serves as the second output terminal GM2 of the fast response module 3.
Wherein the first output terminal GM1 and the second output terminal GM2 both serve as output terminals for the output current of the fast response module 3.
The drain of the third transistor M3 is connected to the first end of the second switch S2.
The drain of the fourth transistor M4 is connected to the first end of the third switch S3.
The third terminal of the first switch S1, the third terminal of the second switch S2 and the third terminal of the third switch S3 are all connected to a control signal input terminal.
In this embodiment, there are two input pair transistors, wherein the first transistor M1 and the third transistor M3 serve as one input pair transistor; the second transistor M2 and the fourth transistor M4 act as another pair of the input transistors.
In this embodiment, the number of the current sources is two, and the two current sources are respectively the input terminal of the first current source I1 and the second current source I2. The input terminal of the first current source I1 and the second current source I2 respectively function as tail current sources in the circuit.
In the embodiment, on the basis of ensuring the circuit performance, all the NMOS transistors, the PMOS transistors and the inverters are unified in size, so that layout optimization is realized, and the layout area is reduced, thereby facilitating expansion of application. Specifically, the first transistor M1, the second transistor M2, the third transistor M3, and the fourth transistor M4 are all PMOS transistors. Wherein the first transistor M1, the second transistor M2, the third transistor M3 and the fourth transistor M4 are the same in size. Of course, without limitation, the designer may also customize each MOS transistor and inverter according to performance and layout design requirements.
Referring to fig. 4-5, fig. 4 is a voltage-time response diagram of the detection signal Vo and the control signal Vctrl in fig. 1; fig. 5 is a voltage time response diagram of the load voltage Vout and the control signal Vctrl in fig. 1. The working principle of the load jump fast response circuit 100 for fast reducing the influence of load change on the output voltage Vout is as follows:
in the present embodiment, the low voltage is defined as 0 and the high voltage is defined as 1.
When the load is stable, the load voltage Vout keeps unchanged, and the input voltages of the negative input end and the positive input end of the comparator COMP are both the reference voltage Vref, and at this time, the detection signal Vo of the output end of the comparator COMP is 0. When the load is changed from a light load to a heavy load, that is, the load voltage Vout jumps, undershoot voltage occurs to the load voltage Vout, the load voltage Vout passes through the second resistor R2 and then is coupled to the negative input end of the comparator COMP through the first capacitor C1, at this time, the voltage change amount of the negative input end of the comparator COMP is Δ V, so that the voltage of the negative input end of the comparator COMP is Vref- Δ V, when the voltage difference of the positive input end of the comparator COMP meets Vref- (Vref + Vos- Δ V) >0, that is, Δ V > Vos, the detection signal Vo at the output end of the comparator COMP is 1, the detection signal Vo that is 1 is sent to the logic control module 2, and the logic control module 2 is triggered to start generating the control signal Vctrl. The load jump detection module 1 performs real-time detection in a coupling manner, and does not function until the load voltage Vout drops to a certain value, so that the detection speed is higher.
When the logic control module 2 receives the detection signal Vo which is 1, the logic control module 2 is immediately triggered to start generating the control signal Vctrl. In the period T1, the control signal Vctrl generated by the logic control module 2 is at a control level, which is 1 in this embodiment. Wherein the load voltage Vout jumps during the time period T1 and does not trigger the logic control module 2 to act. After time T1, the control signal Vctrl is at a mask level, the mask level is 0, and lasts for time T2, and the load voltage Vout jumps during time T2 and does not trigger the logic control module 2 to act. After time T2, the logic control module 2 initiates the detection of the detection signal Vo and allows the next cycle (T1+ T2) to be triggered.
The tail current sources of the fast response module 3 are the first current source I1 and the second current source I2.
The first switch S1, the second switch S2, and the third switch S3 are all controlled by the control signal Vctrl to turn off or on, wherein when the control signal Vctrl is 1, the first switch S1, the second switch S2, and the third switch S3 are in an on state, and when the control signal Vctrl is 0, the first switch S1, the second switch S2, and the third switch S3 are in an off state.
When the load voltage Vout does not jump, under the control of the negative turn-on voltage input Vn and the positive turn-on voltage input Vp, the power supply voltage VDD passes through the first current source I1 to output current through the first output terminal GM1 and the second output terminal GM2 via the first transistor M1 and the second transistor M2, respectively, and the output current maintains the stability of the load voltage Vout and also ensures the normal operation of the related circuit or system of the load voltage Vout.
When the load voltage Vout jumps, the control signal Vctrl is 1, the first switch S1, the second switch S2 and the third switch S3 are turned on, and the second current source I2 increases its current newly due to the turning on of the first switch S1 and outputs the current through the first output terminal GM1 and the second output terminal GM 2. Since the second switch S2 and the third switch S3 are turned on, the third transistor M3 and the fourth transistor M4 are also turned on, and output current through the first output terminal GM1 and the second output terminal GM2 in cooperation with the first transistor M1 and the second transistor M2, so that the output current is increased, and the transconductance parameter GM of the adjusting circuit is adjusted, so that the load voltage Vout is rapidly stabilized.
In summary, the fast response module 3 adjusts the output current by adjusting the number of input pair transistors and the number of current sources, so as to increase the transconductance parameter gm of the overall circuit, thereby reducing the response time of the system and linearly adjusting the response time according to the change of the load voltage Vout. Compared with the prior art, the load jump quick response circuit 100 has higher stability speed and is not easy to generate overshoot phenomenon.
The present invention also provides a fast response method based on the load jump fast response circuit 100.
The quick response method comprises the following steps:
step S1, load jump detection
The load jump detection module 1 receives a load voltage signal and judges whether load voltage jump occurs or not by judging whether the voltage jump amplitude of the load voltage signal is larger than a preset reference voltage Vref value or not. In this embodiment, the load jump detection module 1 determines whether the voltage jump amplitude of the load voltage signal is greater than a preset reference voltage Vref value as a real-time detection in a coupling manner.
Step S2, trigger the quick response module
If the load voltage jumps, the logic control module 2 generates a pulse of a control level in a time period T1, and sends the pulse to the fast response module 3 through a control signal Vctrl, and if not, the fast response module 3 keeps outputting at a low level. In the present embodiment, the control signal Vctrl outputs a signal having a mask level for a period T2, and no pulse is generated in a period T2 after the pulse of the control level ends. After time T1+ T2, the load jump detection module 1 starts receiving the load voltage signal again and determines whether a load voltage jump occurs.
Step S3, quick response module adjustment
The fast response module 3 receives the control signal Vctrl, and adjusts an output current according to the pulse with the control level to make the load voltage Vout stabilize fast. In this embodiment, the output current is adjusted by adjusting the number of input pair transistors and the number of current sources.
Compared with the prior art, the load jump quick response circuit and the quick response method of the invention adopt a coupling mode to detect in real time through the circuit of the load jump detection module, and the load jump quick response circuit and the quick response method can detect without waiting for the load voltage signal to drop to a certain voltage value, thereby ensuring that the detection speed is higher. In addition, the quick response module adjusts the output current by adjusting the number of input geminate transistors and the number of current sources, reduces the response time of the load jump quick response circuit and the charge-discharge circuit system, and can perform linear dynamic adjustment along with the change of the load voltage signal, so that the response time is reduced, and the effect of quickly stabilizing the load voltage is achieved. In summary, when the load voltage jumps, the load jump fast response circuit and the fast response method can quickly reduce the influence of the load voltage jumps on the load voltage, and the circuit structure is simple and easy to expand.
It should be noted that the above-mentioned embodiments described with reference to the drawings are only intended to illustrate the present invention and not to limit the scope of the present invention, and it should be understood by those skilled in the art that modifications and equivalent substitutions can be made without departing from the spirit and scope of the present invention. Furthermore, unless the context indicates otherwise, words that appear in the singular include the plural and vice versa. Additionally, all or a portion of any embodiment may be utilized with all or a portion of any other embodiment, unless stated otherwise.
Claims (10)
1. A load jump quick response circuit is applied to a charging and discharging circuit system, and is characterized by comprising:
the load jump detection module is used for comparing and judging the received load voltage signal with a preset reference voltage signal and outputting a detection signal;
the logic control module is used for judging the load state of the detection signal and carrying out logic operation according to the judgment result to generate a control signal; and
the quick response module is used for receiving the control signal and adjusting the output current so as to enable the load voltage to be quickly stabilized;
the load jump detection module comprises a first resistor, a second resistor, a first capacitor, a second capacitor and a comparator;
a first end of the first resistor is respectively connected to a reference voltage input end and a positive input end of the comparator, and a second end of the first resistor is respectively connected to a positive end of the first capacitor and a negative input end of the comparator;
a first end of the second resistor is connected to a load voltage input end, and a second end of the second resistor is respectively connected to a negative end of the first capacitor and a positive end of the second capacitor;
the negative end of the second capacitor is connected to the ground;
the output end of the comparator is used as the detection signal output end of the load jump detection module;
the quick response module adjusts output current in a mode of adjusting the number of input pair tubes and the number of current sources; the fast response module includes a plurality of transistors having the same size.
2. The load jump fast response circuit of claim 1, wherein the logic control module is a digital circuit.
3. The load jump fast response circuit of claim 1, wherein the fast response module comprises a first current source, a second current source, a first transistor, a second transistor, a third transistor, a fourth transistor, a first switch, a second switch, and a third switch;
the input end of the first current source and the input end of the second current source are both connected to a power supply voltage;
an output end of the first current source is connected to a second end of the first switch, a source end of the first transistor, a source end of the second transistor, a source end of the third transistor and a source end of the fourth transistor respectively;
the output ends of the second current sources are respectively connected to the first ends of the first switches;
the grid end of the first transistor is respectively connected to the grid end of the third transistor and the negative conducting voltage input end, and the drain electrode of the first transistor is connected to the second end of the second switch and serves as the first output end of the quick response module;
the grid end of the second transistor is respectively connected to the grid end of the fourth transistor and the positive conducting voltage input end, and the drain electrode of the second transistor is connected to the second end of the third switch and serves as the second output end of the quick response module;
a drain of the third transistor is connected to a first end of the second switch;
a drain of the fourth transistor is connected to a first end of the third switch;
and the third end of the first switch, the third end of the second switch and the third end of the third switch are all connected to a control signal input end.
4. The load jump fast response circuit of claim 3, wherein the first transistor, the second transistor, the third transistor, and the fourth transistor are all PMOS transistors.
5. The load jump fast response circuit of claim 4, wherein the first transistor, the second transistor, the third transistor, and the fourth transistor are the same size.
6. A fast response method based on the load jump fast response circuit of any one of claims 1-5, characterized in that the fast response method comprises the following steps:
detecting load jump, wherein a load jump detection module receives a load voltage signal and judges whether the load voltage jump occurs or not by judging whether the voltage jump amplitude of the load voltage signal is larger than a preset reference voltage value or not;
triggering the quick response module, if the load voltage jumps, generating a pulse of a control level of a time period T1 by the logic control module, sending the pulse to the quick response module through a control signal, and if not, keeping low-level output by the quick response module;
and adjusting a fast response module, wherein the fast response module receives the control signal and adjusts output current according to the pulse with the control level so as to enable the load voltage to be fast and stable.
7. The method of claim 6, wherein in the step of detecting the load jump, the load jump detecting module determines whether a voltage jump amplitude of the load voltage signal is greater than a preset reference voltage value as a coupled real-time detection.
8. The fast response method of claim 6, wherein in the step of triggering the fast response module, no pulse is generated any more for a time period of T2 after the pulse of the control level is ended, and the control signal outputs a signal having a mask level for a time period of T2.
9. The fast response method of claim 8, wherein in the step of triggering the fast response module, after time T1+ T2, the load jump detection module starts receiving the load voltage signal again and determines whether the load voltage jump occurs.
10. The fast response method of claim 6, wherein in the fast response module adjusting step, the output current is adjusted by adjusting the number of input pair transistors and the number of current sources.
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