CN114815940B - Voltage generating circuit and related capacitor charging method and system - Google Patents
Voltage generating circuit and related capacitor charging method and system Download PDFInfo
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- CN114815940B CN114815940B CN202110089093.XA CN202110089093A CN114815940B CN 114815940 B CN114815940 B CN 114815940B CN 202110089093 A CN202110089093 A CN 202110089093A CN 114815940 B CN114815940 B CN 114815940B
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- 239000003990 capacitor Substances 0.000 title claims abstract description 66
- 238000000034 method Methods 0.000 title claims abstract description 13
- 239000003381 stabilizer Substances 0.000 claims abstract description 26
- 238000010586 diagram Methods 0.000 description 6
- 101100367237 Rattus norvegicus Svs2 gene Proteins 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
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- Automation & Control Theory (AREA)
- Continuous-Control Power Sources That Use Transistors (AREA)
Abstract
The application provides a voltage generating circuit and a related capacitor charging method and system. The voltage generating circuit is arranged in the chip and used for generating a first output voltage and a second output voltage, the chip is provided with a first output port and a second output port, the first output port and the second output port are respectively coupled to a first capacitor and a second capacitor outside the chip, and the voltage generating circuit comprises a constant current type voltage generating unit and a voltage stabilizer. When the voltage generating circuit is operated in a first mode, the voltage regulator is configured as a unit gain buffer to charge the first capacitor to the first output voltage; and when the voltage generating circuit is operated in the second mode, the voltage regulator is configured as a low dropout voltage regulator to charge the second capacitor to the second output voltage.
Description
Technical Field
The present disclosure relates to voltage generation circuits, and more particularly, to a voltage generation circuit capable of rapidly reaching a steady state at power-on, and a related capacitor charging method and system.
Background
For some systems requiring quick start, such as bluetooth headset, it is desirable to enter steady state as soon as possible after start-up and allow the user to use the system normally, and for this reason, the voltage regulator in the system needs to have a large thrust. However, such systems are also very much focused on power saving, and the voltage stabilizer with larger thrust generally greatly increases the overall power consumption of the system, so how to simultaneously consider the starting speed and the power consumption of the voltage stabilizer has become one of the problems to be solved in the art.
Disclosure of Invention
The application discloses voltage generation circuit, set up in the chip for produce first output voltage and second output voltage, wherein this second output voltage is greater than this first output voltage, and this chip has first output port and second output port, and this first output port and second output port couple to the first electric capacity and the second electric capacity outside this chip respectively, this voltage generation circuit includes: a constant current type voltage generation unit; a voltage stabilizer coupled to an output terminal of the constant current type voltage generation unit; a first switch coupled between the output terminal of the constant current type voltage generating unit and the first output port; and a second switch coupled between the output terminal of the voltage stabilizer and the first output port; wherein when the voltage generating circuit is operated in a first mode, the first switch is not turned on, the second switch is turned on, the output terminal of the constant current type voltage generating unit outputs the first output voltage to the voltage regulator, and the voltage regulator is configured as a unit gain buffer to charge the first capacitor to the first output voltage; and when the voltage generating circuit operates in a second mode, the first switch is conducted, the second switch is not conducted, the output end of the constant current type voltage generating unit outputs the first output voltage to the voltage stabilizer, and the voltage stabilizer is configured as a low-dropout voltage stabilizer to charge the second capacitor to the second output voltage.
The application discloses a capacitor charging method for generating a first output voltage and a second output voltage in a chip, wherein the second output voltage is larger than the first output voltage, the chip is provided with a first output port and a second output port, the first output port and the second output port are respectively coupled to a first capacitor and a second capacitor outside the chip, and the capacitor charging method comprises the following steps: in a first mode, outputting the first output voltage to a voltage regulator by using a constant current type voltage generating unit, and configuring the voltage regulator as a unit gain buffer to charge the first capacitor to the first output voltage; and in a second mode, outputting the first output voltage to a voltage regulator by using the constant current type voltage generating unit, and configuring the voltage regulator as a low dropout voltage regulator to charge the second capacitor to the second output voltage.
The application discloses a system, including: a first capacitor; a second capacitor; a chip, comprising: a first output port coupled to the first capacitor; a second output port coupled to the second capacitor; a voltage generating circuit for generating a first output voltage and a second output voltage, wherein the second output voltage is greater than the first output voltage, the voltage generating circuit comprising: a constant current type voltage generation unit; a voltage stabilizer coupled to an output terminal of the constant current type voltage generation unit; a first switch coupled between the output terminal of the constant current type voltage generating unit and the first output port; and a second switch coupled between the output terminal of the voltage stabilizer and the first output port; wherein when the voltage generating circuit is operated in a first mode, the first switch is not turned on, the second switch is turned on, the output terminal of the constant current type voltage generating unit outputs the first output voltage to the voltage regulator, and the voltage regulator is configured as a unit gain buffer to charge the first capacitor to the first output voltage; and when the voltage generating circuit operates in a second mode, the first switch is conducted, the second switch is not conducted, the output end of the constant current type voltage generating unit outputs the first output voltage to the voltage stabilizer, and the voltage stabilizer is configured as a low-dropout voltage stabilizer to charge the second capacitor to the second output voltage.
The voltage generating circuit and the related capacitor charging method and system can simultaneously consider the starting speed and the power consumption.
Drawings
Fig. 1 is a schematic diagram of an embodiment of a system of the present application.
Fig. 2 is an equivalent schematic diagram of the system of the present application operating in a first mode.
Fig. 3 is an equivalent schematic diagram of the system of the present application operating in a second mode.
Detailed Description
Fig. 1 is a schematic diagram of an embodiment of the system of the present application as a whole. The chip 100 includes a chip 100, the chip 100 has a first output port 140 and a second output port 142, and the first output port 140 and the second output port 142 are respectively coupled to a first capacitor 144 and a second capacitor 146 outside the chip 100. The chip 100 includes a voltage generation circuit 102 for providing a reference voltage to a circuit module 104 in the chip 100, for example, the chip 100 is a chip for bluetooth related applications, and the circuit module 104 is a digital-to-analog converter or an analog-to-digital converter. When the voltage generating circuit 102 reaches a steady state after being started (e.g., the system is started), a first output voltage Vout1 and a second output voltage Vout2 are generated to the circuit module 104, wherein the second output voltage Vout2 is greater than the first output voltage Vout1, for example, when the circuit module 104 is a digital-to-analog converter or an analog-to-digital converter, the second output voltage Vout2 is twice the first output voltage Vout1 to obtain a maximum signal-to-noise ratio. The present application is intended to reduce the time to reach steady state after the voltage generation circuit 102 is started, and at the same time, not to increase the power consumption of the voltage generation circuit 102 during steady state.
The first capacitor 144 and the second capacitor 146 outside the chip 100 are used for filtering noise, when the voltage generating circuit 102 is started, the first capacitor 144 and the second capacitor 146 are charged to the first output voltage Vout1 and the second output voltage Vout2, and the voltage generating circuit 102 reaches a steady state after the charging is completed. The present application focuses on reducing the speed of charging the first capacitor 144 and the second capacitor 146, and particularly the speed of charging the first capacitor 144, as described in detail below.
As shown in fig. 1, the voltage generating circuit 102 includes a constant current voltage generating unit 106 and a voltage stabilizer 108, both of which are used to supply voltages but are different from each other, the constant current voltage generating unit 106 includes a current source 110 coupled to a first reference voltage V1, a fixed current generated by the current source 110 generates a voltage change through resistors 112,114,116 connected in series between the current source 110 and a second reference voltage V2, and the voltage selecting switches 118,120 are set to enable the output terminal out1 of the constant current voltage generating unit 106 to output a desired voltage value, for example, signals Svs1 and Svs2 are set to 1 to generate a first output voltage Vout1. The constant current type voltage generating unit 106 may have different embodiments, and may be more complex or simpler, for example, the most basic example is to include only the current source 110, the resistors 112 and 114, and take the node between the resistors 112 and 114 as the output terminal out1. Further, the first reference voltage V1 and the second reference voltage V2 are different, for example, the second reference voltage V2 is a ground voltage. The implementation of the voltage selection switches 118,120 is not limited and may be, for example, N-type or P-type transistors.
Since the current supplied by the current source 110 remains fixed after the voltage generating circuit 102 is started and enters a steady state, the power consumption is directly affected for the overall system, and thus the current supplied by the current source 110 is generally not large.
The voltage generation circuit 102 further includes a voltage regulator 108, a first switch 132, and a second switch 134. The voltage regulator 108 is coupled to the output terminal out1 of the constant current voltage generation unit 106, and generates a second output voltage Vout2 according to the first output voltage Vout1 output by the constant current voltage generation unit 106. The first switch 132 is coupled between the output terminal out1 of the constant current voltage generation unit 106 and the first output port 140. The second switch 134 is coupled between the output out2 of the voltage regulator 108 and the first output port 140.
The amplifier 122 of the voltage regulator 108 has a positive terminal (+) coupled to the output terminal out1 of the constant current voltage generation unit 106, a negative terminal (-) and an output terminal. The gate of the P-type transistor 124 is coupled to the output of the amplifier 122, the source of the P-type transistor 124 is coupled to the first reference voltage V1, and the drain of the P-type transistor 124 is coupled to the output out2 of the voltage regulator 108. Resistor 126 is coupled at one end to the drain of P-type transistor 124 and at the other end to the positive terminal of amplifier 122. The resistor 128 and the third switch 130 are sequentially connected between the resistor 126 and the second reference voltage V2 in series.
The constant current type voltage generating unit 106 can supply a constant current, and the voltage stabilizer 108 can supply a non-constant current, so that the thrust of the voltage stabilizer 108 is much larger than that of the constant current type voltage generating unit 106. By utilizing this characteristic, when the voltage generating circuit 102 is just started, the signals S1, S2 and S3 are utilized to make the first switch 132 and the third switch 130 non-conductive and make the second switch 134 conductive, so as to set the voltage generating circuit 102 in the first mode, make the output terminal out1 of the constant current type voltage generating unit 106 output the first output voltage Vout1 to the voltage regulator 108, and make the voltage regulator 108 charge the first capacitor 144 and the second capacitor 146. When the first capacitor 144 and the second capacitor 146 are charged to the first output voltage Vout1, the signals S1, S2 and S3 are utilized to turn on the first switch 132 and the third switch 130 and turn off the second switch 134, so as to set the voltage generating circuit 102 in the second mode, make the output terminal out1 of the constant current voltage generating unit 106 output the first output voltage Vout1 to the voltage regulator 108, and make the voltage regulator 108 continuously charge the second capacitor 146 to the second output voltage Vout2.
Fig. 2 is an equivalent schematic diagram of the system of the present application operating in this first mode. The output terminal out1 of the constant current type voltage generation unit 106 outputs a first output voltage Vout1 to the voltage regulator 108, and the voltage regulator 108 is configured as a unit gain buffer in the first mode, so that the output terminal out2 of the voltage regulator 108 outputs the first output voltage Vout1. The current from the first reference voltage V1 passes through the P-type transistor 124 and the first output port 140 and the second output port 142, and the first capacitor 144 and the second capacitor 146 are charged by the current I1 and the current I2, respectively, and in this mode, the current (i.e. the sum of the current I1 and the current I2) that can be supplied to the first capacitor 144 and the second capacitor 146 is far greater than the current supplied by the current source 110, and theoretically, the smaller the resistance value on the path from the first reference voltage V1 to the first capacitor 144 and the second capacitor 146 is, the greater the current is. Therefore, the design of the second switch 134 can adopt a parallel connection of an N-type transistor and a P-type transistor to reduce the equivalent resistance of the second switch 134, as shown in fig. 1, the signal S2 can make the N-type transistor and the P-type transistor of the second switch 134 synchronously turned on through the inverter 136.
Fig. 3 is an equivalent schematic diagram of the system of the present application operating in this second mode. The output terminal out1 of the constant current voltage generation unit 106 still outputs the first output voltage Vout1 to the voltage regulator 108, the voltage regulator 108 is configured as a low dropout voltage regulator in the second mode, and both the positive terminal and the negative terminal of the voltage regulator 108 are locked at the first output voltage Vout1, so that the second output voltage Vout2 outputted by the output terminal out2 of the voltage regulator 108 is higher than the first output voltage Vout1, for example, when the second reference voltage V2 is the ground voltage and the resistances of the resistors 126 and 130 are the same, the second output voltage Vout2 outputted by the output terminal out2 of the voltage regulator 108 is twice the first output voltage Vout1. The current I3 charges the second capacitor 146 from the first reference voltage V1 through the P-type transistor 124 via the second output port 142, and charges the voltage of the second capacitor 146 from the first output voltage Vout1 to the second output voltage Vout2.
Referring to fig. 1 to 3, since the current does not pass through the first switch 132 and the third switch 130 when the first capacitor 144 and/or the second capacitor 146 are charged, the resistance values of the first switch 132 and the third switch 130 do not need to be particularly reduced.
The voltage generation circuit 102 of the present application uses a larger current only in the first mode and the second mode before entering the steady state to increase the speed of charging the capacitors 144, 142 outside the chip 100, so that the power consumption after entering the steady state is not affected. The system can be applied to various applications, such as Bluetooth headset, and can reduce the startup time to about 1/10 of the original startup time without increasing the power consumption in steady state after startup.
The foregoing description briefly sets forth features of certain embodiments of the present application to provide a more thorough understanding of the various variations of the present application to those skilled in the art. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments herein. It should be understood that, unless specifically stated otherwise, the steps mentioned in the flowcharts of the method of this application may be modified in order to follow each other as needed, or may even be performed simultaneously or partially simultaneously. Furthermore, each of the above modules or method steps may be implemented by means of hardware, software or firmware according to the needs of the designer. Those skilled in the art should understand that they can make various changes, substitutions and alterations herein without departing from the spirit and scope of the disclosure.
[ symbolic description ]
100: chip
102: voltage generating circuit
104: circuit module
106: constant current type voltage generating unit
108: voltage stabilizer
110: current source
112,114,116: resistor
118,120: voltage selection switch
122: amplifier
124: p-type transistor
126,128: resistor
130: third switch
132: first switch
134: second switch
136: reverser
140: a first output port
142: a second output port
144: first capacitor
146: second capacitor
Claims (10)
1. A voltage generating circuit disposed in a chip for generating a first output voltage and a second output voltage, wherein the second output voltage is greater than the first output voltage, and the chip has a first output port and a second output port, the first output port and the second output port are respectively coupled to a first capacitor and a second capacitor outside the chip, the voltage generating circuit comprising:
a constant current type voltage generation unit;
a voltage regulator coupled to an output of the constant current type voltage generation unit;
a first switch coupled between the output terminal of the constant current type voltage generation unit and the first output port; and
a second switch coupled between the output of the voltage regulator and the first output port;
wherein when the voltage generation circuit is operated in a first mode, the first switch is non-conductive, the second switch is conductive, the output terminal of the constant current voltage generation unit outputs the first output voltage to the voltage regulator, and the voltage regulator is configured as a unit gain buffer to charge the first capacitor to the first output voltage; and
when the voltage generating circuit is operated in a second mode, the first switch is conductive, the second switch is non-conductive, the output end of the constant current type voltage generating unit outputs the first output voltage to the voltage stabilizer, and the voltage stabilizer is configured as a low dropout voltage stabilizer to charge the second capacitor to the second output voltage.
2. The voltage generation circuit of claim 1, wherein the voltage regulator further charges the second capacitance to the first output voltage when the voltage generation circuit is operating in the first mode.
3. The voltage generation circuit of claim 1 wherein the second switch comprises an N-type transistor and a P-type transistor in parallel.
4. The voltage generation circuit of claim 1, wherein the constant current voltage generation unit comprises:
a current source coupled to a first reference voltage;
the first resistor and the second resistor are connected in series between the current source and the second reference voltage; and
the first end of the first voltage selection switch is coupled between the first resistor and the second resistor, and the second end of the first voltage selection switch is coupled to the output end of the constant current type voltage generation unit.
5. The voltage generation circuit of claim 1, wherein the voltage regulator comprises:
an amplifier having a positive terminal, a negative terminal, and an output terminal, the negative terminal coupled to the output terminal of the constant current voltage generation unit;
a P-type transistor having a gate coupled to the output of the amplifier, a drain coupled to the output of the voltage regulator, and a source coupled to a first reference voltage;
a third resistor having one end coupled to the drain of the P-type transistor and the other end coupled to the positive terminal of the amplifier;
the fourth resistor is connected in series between the third resistor and the second reference voltage; and
and the third switch is connected in series between the third resistor and the second reference voltage.
6. The voltage generation circuit of claim 5, wherein the third switch is non-conductive when the voltage generation circuit is operating in the first mode; and the third switch is turned on when the voltage generating circuit is operated in the second mode.
7. The voltage generation circuit of claim 1, wherein the first output voltage and the second output voltage are used as reference voltages for digital-to-analog converters in the chip or for analog-to-digital converters in the chip.
8. A capacitor charging method for generating a first output voltage and a second output voltage in a chip, wherein the second output voltage is greater than the first output voltage, and the chip has a first output port and a second output port, the first output port and the second output port being coupled to a first capacitor and a second capacitor, respectively, outside the chip, the capacitor charging method comprising:
in a first mode, outputting the first output voltage to a voltage regulator using a constant current voltage generation unit, and configuring the voltage regulator as a unit gain buffer to charge the first capacitor to the first output voltage; and
in a second mode, the constant current voltage generation unit is used for outputting the first output voltage to a voltage stabilizer, and the voltage stabilizer is configured as a low dropout voltage stabilizer to charge the second capacitor to the second output voltage.
9. The method of capacitor charging of claim 8, wherein in the first mode, configuring the voltage regulator as a unity gain buffer to charge the first capacitor to the first output voltage comprises:
the output of the constant current voltage generation unit is disconnected from the first output port using a first switch, and the output of the voltage regulator is coupled to the first output port using a second switch.
10. A system, comprising:
a first capacitor;
a second capacitor;
a chip, comprising:
a first output port coupled to the first capacitance;
a second output port coupled to the second capacitance;
a voltage generation circuit for generating a first output voltage and a second output voltage, wherein the second output voltage is greater than the first output voltage, the voltage generation circuit comprising:
a constant current type voltage generation unit;
a voltage regulator coupled to an output of the constant current type voltage generation unit;
a first switch coupled between the output terminal of the constant current type voltage generation unit and the first output port; and
a second switch coupled between the output of the voltage regulator and the first output port;
wherein when the voltage generation circuit is operated in a first mode, the first switch is non-conductive, the second switch is conductive, the output terminal of the constant current voltage generation unit outputs the first output voltage to the voltage regulator, and the voltage regulator is configured as a unit gain buffer to charge the first capacitor to the first output voltage; and
when the voltage generating circuit is operated in a second mode, the first switch is conductive, the second switch is non-conductive, the output end of the constant current type voltage generating unit outputs the first output voltage to the voltage stabilizer, and the voltage stabilizer is configured as a low dropout voltage stabilizer to charge the second capacitor to the second output voltage.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202110089093.XA CN114815940B (en) | 2021-01-22 | 2021-01-22 | Voltage generating circuit and related capacitor charging method and system |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202110089093.XA CN114815940B (en) | 2021-01-22 | 2021-01-22 | Voltage generating circuit and related capacitor charging method and system |
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| CN114815940B true CN114815940B (en) | 2024-01-30 |
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| CN114815940A (en) | 2022-07-29 |
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