CN114807934A - Processing method of class carrier plate with minimum line width spacing of 2/2mil - Google Patents
Processing method of class carrier plate with minimum line width spacing of 2/2mil Download PDFInfo
- Publication number
- CN114807934A CN114807934A CN202210489529.9A CN202210489529A CN114807934A CN 114807934 A CN114807934 A CN 114807934A CN 202210489529 A CN202210489529 A CN 202210489529A CN 114807934 A CN114807934 A CN 114807934A
- Authority
- CN
- China
- Prior art keywords
- copper
- hole
- plate
- plating
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000003672 processing method Methods 0.000 title claims abstract description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 167
- 229910052802 copper Inorganic materials 0.000 claims abstract description 165
- 239000010949 copper Substances 0.000 claims abstract description 165
- 238000007747 plating Methods 0.000 claims abstract description 43
- 238000005530 etching Methods 0.000 claims abstract description 27
- 238000009713 electroplating Methods 0.000 claims abstract description 16
- 238000000151 deposition Methods 0.000 claims abstract description 15
- 230000008021 deposition Effects 0.000 claims abstract description 11
- 239000002184 metal Substances 0.000 claims abstract description 11
- 229910052751 metal Inorganic materials 0.000 claims abstract description 11
- 230000008719 thickening Effects 0.000 claims abstract description 7
- 238000006087 Brown hydroboration reaction Methods 0.000 claims abstract description 6
- 239000007788 liquid Substances 0.000 claims abstract description 5
- 239000003814 drug Substances 0.000 claims abstract description 4
- 238000006479 redox reaction Methods 0.000 claims abstract description 4
- 239000010410 layer Substances 0.000 claims description 37
- 239000002585 base Substances 0.000 claims description 25
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 19
- 230000009471 action Effects 0.000 claims description 9
- JPVYNHNXODAKFH-UHFFFAOYSA-N Cu2+ Chemical compound [Cu+2] JPVYNHNXODAKFH-UHFFFAOYSA-N 0.000 claims description 8
- 229910001431 copper ion Inorganic materials 0.000 claims description 8
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 7
- 239000010931 gold Substances 0.000 claims description 7
- 229910052737 gold Inorganic materials 0.000 claims description 7
- 230000009467 reduction Effects 0.000 claims description 7
- 238000005498 polishing Methods 0.000 claims description 6
- 239000000126 substance Substances 0.000 claims description 6
- 229910001432 tin ion Inorganic materials 0.000 claims description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 4
- 230000000669 biting effect Effects 0.000 claims description 4
- 238000003384 imaging method Methods 0.000 claims description 4
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 claims description 3
- 239000003513 alkali Substances 0.000 claims description 3
- 238000006243 chemical reaction Methods 0.000 claims description 3
- 238000004140 cleaning Methods 0.000 claims description 3
- 239000011247 coating layer Substances 0.000 claims description 3
- 238000006073 displacement reaction Methods 0.000 claims description 3
- 230000000694 effects Effects 0.000 claims description 3
- 230000005684 electric field Effects 0.000 claims description 3
- 229910017604 nitric acid Inorganic materials 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 abstract description 15
- 238000001465 metallisation Methods 0.000 abstract description 8
- 238000000034 method Methods 0.000 description 8
- 230000008569 process Effects 0.000 description 6
- 238000006722 reduction reaction Methods 0.000 description 6
- 239000012528 membrane Substances 0.000 description 3
- 238000002360 preparation method Methods 0.000 description 3
- 230000001678 irradiating effect Effects 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- QPLDLSVMHZLSFG-UHFFFAOYSA-N Copper oxide Chemical compound [Cu]=O QPLDLSVMHZLSFG-UHFFFAOYSA-N 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000011148 porous material Substances 0.000 description 1
Images
Classifications
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
- C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
- C23C18/31—Coating with metals
- C23C18/32—Coating with nickel, cobalt or mixtures thereof with phosphorus or boron
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
- C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
- C23C18/31—Coating with metals
- C23C18/42—Coating with noble metals
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D3/00—Electroplating: Baths therefor
- C25D3/02—Electroplating: Baths therefor from solutions
- C25D3/38—Electroplating: Baths therefor from solutions of copper
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/02—Electroplating of selected surface areas
- C25D5/022—Electroplating of selected surface areas using masking means
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/02—Electroplating of selected surface areas
- C25D5/028—Electroplating of selected surface areas one side electroplating, e.g. substrate conveyed in a bath with inhibited background plating
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D7/00—Electroplating characterised by the article coated
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/241—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Electrochemistry (AREA)
- Mechanical Engineering (AREA)
- General Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
The invention provides a processing method of a type carrier plate with a minimum line width spacing of 2/2mil, which comprises the following steps: step 1, copper/plate deposition is carried out, a plate is subjected to oxidation-reduction reaction in a copper deposition cylinder to form a copper layer with the base copper thickness of 5um, the hole copper and the surface copper are thickened by 3um in a whole-plate electroplating mode, and the hole is connected with the outer-layer copper; step 2, plating a hole dry film, sticking a layer of photosensitive dry film on the plated plate, selectively exposing by using a hole plating film to form a required pattern, developing by using weak alkaline liquid medicine, exposing holes needing copper plating and thickening and covered edges, and covering the copper surface without copper plating by the dry film; and 3, plating holes, namely electroplating copper on the plate plated with the hole dry film in an electroplating mode to thicken the plate to be more than or equal to 15 um. According to the invention, after the electrolytic copper is plated by metallizing a normal hole with the base copper thickness of 7um, the surface copper thickness is plated to about 12um, then the metal hole copper is further thickened to 15um in a hole plating mode, the surface copper thickness is reduced to 5um through brown oxidation, and the metal hole copper thickness is reduced to 8um through film stripping, so that the manufacture of the etching base copper thickness of 5um is met while the hole metallization is realized.
Description
Technical Field
The invention relates to the field of circuit board manufacturing, in particular to a processing method of a class carrier plate with a minimum line width spacing of 2/2 mil.
Background
The SLP board for the smart phone can be twice as large as HDI in the same area of electronic components. The HDI board for the smart phone and the SLP board are compared with each other to reduce the characteristic size of the PCB for the smart phone, so that the smart phone becomes thinner and has stronger function.
SLP (substrate-likePCB), Chinese is called a class carrier plate (SLP) for short, and is a next generation PCB hard plate. The similar carrier plate has the characteristics of fine circuits, high hole density, small hole wall space and the like, wherein the requirement of the line width space is less than or equal to 2/2mil, and the manufacturing difficulty is higher.
Due to the restriction of the capability of etching equipment, the thinner the etching base copper is, the smaller the line width spacing can be made. The etching base copper thickness is equal to the base copper thickness plus the one-time board copper plating thickness, the domestic 7um base copper thickness is used, the one-time board copper plating is carried out after the copper deposition through the hole metallization, the etching base copper is about 12um, and the capability of manufacturing the minimum line width spacing on the outer layer is 3/3 mil; therefore, to manufacture products with the line width spacing of less than 3/3mil, the thickness of base copper needs to be reduced, and with 5-micron base copper, the problem that the base copper is thin and exposes out of a base material or a finished copper sheet is layered due to the biting action of the microetching liquid of the copper-deposited wire, so that 2/2mil manufacturing cannot be realized.
Disclosure of Invention
The invention provides a processing method of a class carrier plate with a minimum line width spacing of 2/2mil, which aims to solve at least one technical problem.
In order to solve the above problems, as an aspect of the present invention, a method for processing a carrier board of minimum line width spacing 2/2mil is provided, including:
step 1, copper/plate deposition
Carrying out oxidation-reduction reaction on the plate in a copper deposition cylinder to form a copper layer with the base copper thickness of 5um, thickening the hole copper and the surface copper by 3um in a whole-plate electroplating mode, and connecting the hole with the outer-layer copper;
Attaching a layer of photosensitive dry film on a plated plate, selectively exposing by using a plating hole film to form a required pattern, developing by using weak alkaline liquid medicine, exposing holes needing copper plating and thickening and covered edges, and covering a copper surface without copper plating by the dry film;
Electroplating copper is carried out on the plate plated with the hole dry film in an electroplating mode to thicken the plate to be more than or equal to 15 um;
step 4, polishing the hole mantle
After the dry film is removed, polishing and flattening the copper layer protruding from the orifice;
step 5, brown oxidation copper reduction 2
The total copper thickness of the surface copper is reduced to 5um through a uniform chemical copper biting mode, and the hole copper is reduced to 8um at the same time;
step 6, external light imaging
Adhering a dry film on the board surface under certain temperature and pressure, aligning the dry film with a negative film, irradiating the dry film on an exposure machine by using ultraviolet light to react the dry film which is not shielded by the negative film to form a required circuit pattern on the board surface, dissolving the film which is not irradiated by the light under the action of a developing solution through a developing section, and exposing a region which needs to be plated with copper and tin;
step 7, pattern electroplating
Cleaning the plate surface through pretreatment, dissolving copper ions and tin ions from the anode of a copper plating cylinder and a tin plating cylinder, moving the copper ions and the tin ions to the cathode under the action of an electric field to obtain electrons, and plating a metal copper layer and a tin layer for anti-etching protection on a conductive area of the plate in sequence from inside to outside;
step 8, outer layer etching
Under the action of alkali liquor, removing the film to expose the copper surface to be etched, reacting copper with copper ions in an etching cylinder to produce cuprous to achieve the etching effect, and removing a tin coating layer to expose the copper surface of the circuit bonding pad due to the reaction of nitric acid with the tin surface in a tin stripping cylinder;
step 9, depositing gold
And depositing a metallic nickel layer and a gold layer on the copper surface through chemical displacement reaction.
The invention adds the processes of plating holes and brownification copper reduction on the basis of the conventional manufacturing process, removes the copper plating of a primary plate and simultaneously thins the thickness of the base copper, thereby reducing the thickness of the etching base copper and meeting the requirement of manufacturing the line width spacing of 2/2 mils. After the heavy electrolytic copper of normal hole metallization with 7um basic copper thickness, add to plate about 12um with surface copper thickness, then further thicken metal hole copper to 15um through the plating hole mode, reduce the thick brown of surface copper to 5um after the membrane moves back, metal hole copper reduces copper to 8um, satisfies the thick preparation of 5um etching basic copper when realizing the hole metallization.
Drawings
Fig. 1 schematically shows a cross-sectional view after copper deposition in step 1;
FIG. 2 schematically shows a cross-sectional view of the plated board in step 1;
FIG. 3 schematically shows a cross-sectional view of step 2;
FIG. 4 schematically shows a cross-sectional view of step 3;
FIG. 5 schematically shows a cross-sectional view after removing the dry film in step 4;
FIG. 6 schematically shows a cross-sectional view after step 4 removal grinding;
FIG. 7 schematically shows a cross-sectional view of step 5;
FIG. 8 schematically shows a cross-sectional view of step 6;
FIG. 9 schematically shows a cross-sectional view of step 7;
FIG. 10 schematically shows a cross-sectional view of step 8;
fig. 11 schematically shows a cross-sectional view of step 9.
Reference numbers in the figures: a copper layer 1; a copper layer 2; a dry film 3; electroplating copper 4; a copper layer 5; the total copper thickness is 6; a copper via 7; a dry film 8; a metallic copper layer 9; a tin layer 10; a circuit pad copper surface 11; a metallic nickel layer 12; a gold layer 13.
Detailed Description
The following detailed description of embodiments of the invention, but the invention can be practiced in many different ways, as defined and covered by the claims.
According to the invention, the hole plating and copper brown reducing processes are added on the basis of the conventional manufacturing process, and the thickness of the base copper is reduced while the copper plating of the board is removed, so that the thickness of the etching base copper is reduced, and the requirement of 2/2mil manufacturing of line width spacing is met. After the heavy electrolytic copper of normal hole metallization with 7um basic copper thickness, add to plate about 12um with surface copper thickness, then further thicken metal hole copper to 15um through the plating hole mode, reduce the thick brown of surface copper to 5um after the membrane moves back, metal hole copper reduces copper to 8um, satisfies the thick preparation of 5um etching basic copper when realizing the hole metallization.
The invention relates to a carrier plate-like PCB structure, and the key process and the description are as follows: the front process → brown oxidation copper reduction 1 → drilling → copper deposition → plate plating → plated hole dry film → plated hole → brown oxidation copper reduction 2 → external light imaging → rear process.
As an aspect of the present invention, a method for processing a carrier board with a minimum line width spacing of 2/2mil is provided, including:
step 1, copper/plate deposition
Carrying out redox reaction on the plate in a copper deposition cylinder to form a copper layer 1 with the base copper thickness of 5um, thickening the hole copper and the surface copper by using a whole-plate electroplating mode to form a copper layer 2 with the thickness of 3um, and connecting the hole with the outer-layer copper;
Attaching a layer of photosensitive dry film 3 on the plated plate, selectively exposing by using a plating hole film to form a required pattern, developing by using weak alkaline liquid medicine, exposing the hole needing copper plating and thickening and the covered edge, and covering the copper surface without copper plating by the dry film;
Electroplating copper 4 is carried out on the plate plated with the hole dry film in an electroplating mode to thicken the plate to be more than or equal to 15 um;
step 4, polishing the hole mantle
After removing the dry film 3, polishing and flattening the copper layer 5 protruding from the orifice;
step 5, copper reduction by browning 2
The total copper thickness of the surface copper is reduced from 6 brown to 5um and the pore copper is reduced from 7 to 8um in a uniform chemical copper biting way;
step 6, external light imaging
Adhering a dry film 8 on the board surface under certain temperature and pressure, aligning with a negative plate, irradiating by using ultraviolet light on an exposure machine to enable the dry film which is not shielded by the negative plate to react to form a required circuit pattern on the board surface, dissolving the film which is not irradiated by the light under the action of a developing solution through a developing section, and exposing a region which needs to be plated with copper and tin;
step 7, pattern electroplating
Cleaning the plate surface through pretreatment, dissolving copper ions and tin ions from the anode of a copper plating cylinder and a tin plating cylinder, moving the copper ions and the tin ions to the cathode under the action of an electric field to obtain electrons, and plating a metal copper layer 9 and a tin layer 10 for anti-etching protection on the conductive area of the plate in sequence from inside to outside;
step 8, outer layer etching
Under the action of alkali liquor, removing the film 8 to expose the copper surface to be etched, reacting copper with copper ions in an etching cylinder to produce cuprous to achieve the etching effect, and removing a tin coating layer to expose the circuit bonding pad copper surface 11 due to the reaction of nitric acid and the tin surface in a tin stripping cylinder;
step 9, depositing gold
A metallic nickel layer 12 and a gold layer 13 are deposited on the copper surface 11 by a chemical displacement reaction.
In the prior art, the thickness of the etching base copper is thin, and under the existing manufacturing method in the industry, the thickness of the etching base copper is equal to the thickness of the base copper plus the thickness of the copper plated plate. Under the manufacturing method of the invention, the etching base copper thickness is equal to the base copper thickness of-2 um, so the invention is suitable for manufacturing products with the minimum line width spacing of 2/2 mil.
The invention adds the processes of plating holes and brownification copper reduction on the basis of the conventional manufacturing process, removes the copper plating of a primary plate and simultaneously thins the thickness of the base copper, thereby reducing the thickness of the etching base copper and meeting the requirement of manufacturing the line width spacing of 2/2 mils. After the heavy electrolytic copper of normal hole metallization with 7um basic copper thickness, add to plate about 12um with surface copper thickness, then further thicken metal hole copper to 15um through the plating hole mode, reduce the thick brown of surface copper to 5um after the membrane moves back, metal hole copper reduces copper to 8um, satisfies the thick preparation of 5um etching basic copper when realizing the hole metallization.
In the present invention:
(1) in the PCB plane structure diagram of the similar carrier plate, the line width is 2mil, the spacing is 2mil, the diameter of a BGA bonding pad is 6mil, the diameter of a hole is 4mil, the diameter of a hole ring is 1.5mil, and the spacing of hole walls is 6 mil;
(2) in a slice image after hole plating, the thickness of base copper is 7um, the surface copper of a primary plate is 5um, the hole copper of the primary plate is 5um, and the hole copper of the primary plate is 10 um;
(3) in the slice picture after the copper 2 is subtracted in the brown oxidation, the etching base copper is 5um thick, the primary plate is plated with 5um of hole copper, and the plated with hole copper is 2um thick.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (1)
1. A processing method of a type carrier plate with a minimum line width spacing of 2/2mil is characterized by comprising the following steps:
step 1, copper/plate deposition
Carrying out redox reaction on the plate in a copper deposition cylinder to form a copper layer (1) with the base copper thickness of 5um, thickening the hole copper and the surface copper by using a whole-plate electroplating mode to form a copper layer (2) with the thickness of 3um, and connecting the hole with the outer-layer copper;
step 2, plating a hole dry film
Attaching a layer of photosensitive dry film (3) on the plated plate, selectively exposing by using a plating hole film to form a required pattern, developing by using weak alkaline liquid medicine, exposing holes needing copper plating and thickening and covered edges, and covering the copper surface without copper plating by the dry film;
step 3, plating holes
Electroplating copper (4) is carried out on the plate plated with the hole dry film in an electroplating mode to thicken the plate to be more than or equal to 15 um;
step 4, polishing the hole mantle
After the dry film (3) is removed, polishing the copper layer (5) protruding from the orifice to be flat;
step 5, copper reduction by browning 2
The total copper thickness (6) of the surface copper is reduced to 5um through brown oxidation by a uniform chemical copper biting mode, and the hole copper (7) is reduced to 8 um;
step 6, external light imaging
At a certain temperature and under certain pressure, a dry film (8) is pasted on the board surface, the negative is used for contraposition, finally, the dry film which is not shielded by the negative is made to react by utilizing the irradiation of ultraviolet light on an exposure machine, a required circuit pattern is formed on the board surface, then the film which is not irradiated by the light is dissolved under the action of a developing solution through a developing section, and the area which needs to be plated with copper and tin is exposed;
step 7, pattern electroplating
Cleaning the plate surface through pretreatment, dissolving copper ions and tin ions out of the anode of a copper plating cylinder and a tin plating cylinder, moving the anode to the cathode under the action of an electric field to obtain electrons, and plating a metal copper layer (9) and a tin layer (10) for anti-etching protection on a conductive area of the plate in sequence from inside to outside;
step 8, outer layer etching
Under the action of alkali liquor, removing the film (8) to expose the copper surface to be etched, reacting copper with copper ions in an etching cylinder to produce cuprous to achieve the etching effect, and removing a tin coating layer to expose the copper surface (11) of the circuit bonding pad in a tin stripping cylinder due to the reaction of nitric acid and the tin surface;
step 9, depositing gold
A metallic nickel layer (12) and a gold layer (13) are deposited on the copper surface (11) by a chemical displacement reaction.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210489529.9A CN114807934A (en) | 2022-05-06 | 2022-05-06 | Processing method of class carrier plate with minimum line width spacing of 2/2mil |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210489529.9A CN114807934A (en) | 2022-05-06 | 2022-05-06 | Processing method of class carrier plate with minimum line width spacing of 2/2mil |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN114807934A true CN114807934A (en) | 2022-07-29 |
Family
ID=82511973
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210489529.9A Pending CN114807934A (en) | 2022-05-06 | 2022-05-06 | Processing method of class carrier plate with minimum line width spacing of 2/2mil |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114807934A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115052429A (en) * | 2022-08-13 | 2022-09-13 | 四川英创力电子科技股份有限公司 | Circuit board production method |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101951735A (en) * | 2010-09-17 | 2011-01-19 | 深圳市集锦线路板科技有限公司 | Coppering and porefilling process for circuit board |
| CN106341950A (en) * | 2016-09-29 | 2017-01-18 | 深圳市迅捷兴科技股份有限公司 | Circuit board manufacturing method adopting resin plugging |
| CN106993381A (en) * | 2017-05-10 | 2017-07-28 | 深圳市深联电路有限公司 | A kind of preparation method of the intensive the electroplates in hole filling perforations of high-frequency ultrathin PCB |
| CN113194616A (en) * | 2021-05-21 | 2021-07-30 | 深圳市迅捷兴科技股份有限公司 | Method for manufacturing resin plug hole without plating filling |
| CN113260163A (en) * | 2021-05-07 | 2021-08-13 | 深圳市迅捷兴科技股份有限公司 | Method for manufacturing circuit board fine line |
-
2022
- 2022-05-06 CN CN202210489529.9A patent/CN114807934A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101951735A (en) * | 2010-09-17 | 2011-01-19 | 深圳市集锦线路板科技有限公司 | Coppering and porefilling process for circuit board |
| CN106341950A (en) * | 2016-09-29 | 2017-01-18 | 深圳市迅捷兴科技股份有限公司 | Circuit board manufacturing method adopting resin plugging |
| CN106993381A (en) * | 2017-05-10 | 2017-07-28 | 深圳市深联电路有限公司 | A kind of preparation method of the intensive the electroplates in hole filling perforations of high-frequency ultrathin PCB |
| CN113260163A (en) * | 2021-05-07 | 2021-08-13 | 深圳市迅捷兴科技股份有限公司 | Method for manufacturing circuit board fine line |
| CN113194616A (en) * | 2021-05-21 | 2021-07-30 | 深圳市迅捷兴科技股份有限公司 | Method for manufacturing resin plug hole without plating filling |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115052429A (en) * | 2022-08-13 | 2022-09-13 | 四川英创力电子科技股份有限公司 | Circuit board production method |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7802361B2 (en) | Method for manufacturing the BGA package board | |
| US6815126B2 (en) | Printed wiring board with conformally plated circuit traces | |
| KR100632577B1 (en) | Electrolytic gold plating method of printed circuit board | |
| CN108617104B (en) | Method for manufacturing printed circuit board with thickened copper local pattern | |
| CN101466207B (en) | Circuit board and preparation method thereof | |
| CN112867275B (en) | Method for plating nickel and gold on part without lead | |
| US20070207607A1 (en) | Ball grid array substrate having window and method of fabricating same | |
| US7169313B2 (en) | Plating method for circuitized substrates | |
| CN107567196B (en) | Method for manufacturing top nickel-palladium-gold and bottom hard gold plate | |
| US20060070769A1 (en) | Printed circuit board and method of fabricating same | |
| CN110798988B (en) | Additive process for manufacturing high-frequency antenna packaging substrate and AiP packaging antenna structure | |
| JP2006093650A (en) | Manufacturing method of package substrate using electroless nickel plating | |
| CN114222434B (en) | Manufacturing method of ladder circuit and circuit board | |
| CN101442885B (en) | Method for preparing circuit board guide hole | |
| CN114807934A (en) | Processing method of class carrier plate with minimum line width spacing of 2/2mil | |
| JP2001110940A (en) | Semiconductor package substrate and manufacturing method thereof | |
| JP4730222B2 (en) | Wiring board manufacturing method | |
| JPH05327224A (en) | Manufacture of multilayer wiring board and multi-layer wiring board manufactured by the manufacture | |
| CN101472406B (en) | Method for manufacturing wiring substrate | |
| JP2007214338A (en) | Manufacturing method of one-side polyimide wiring board | |
| JP4705972B2 (en) | Printed wiring board and manufacturing method thereof | |
| CN111556662A (en) | Flexible circuit board preparation method, flexible circuit board and electronic equipment | |
| CN113660787B (en) | Manufacturing method, production line and high-frequency plate capable of enabling side copper of high-frequency plate to be flush with base material | |
| KR20110057729A (en) | Manufacturing method of pcb using double gold plating process | |
| CN118398707A (en) | Preparation process of high-precision printing carrier plate |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20220729 |
|
| RJ01 | Rejection of invention patent application after publication |