CN114579198B - Memory chip starting method and device, computer equipment and storage medium - Google Patents

Memory chip starting method and device, computer equipment and storage medium Download PDF

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Publication number
CN114579198B
CN114579198B CN202210069376.2A CN202210069376A CN114579198B CN 114579198 B CN114579198 B CN 114579198B CN 202210069376 A CN202210069376 A CN 202210069376A CN 114579198 B CN114579198 B CN 114579198B
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Prior art keywords
memory
chip
target
identifier
target memory
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CN114579198A (en
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王红悦
陈才
张道明
王兴珍
王家兴
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Phytium Technology Co Ltd
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Phytium Technology Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/445Program loading or initiating
    • G06F9/44505Configuring for program initiating, e.g. using registry, configuration files
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A method, a device, a computer device and a storage medium for starting a memory chip relate to the technical field of electronics and solve the problem of high implementation cost when the memory chip is started. The starting method of the memory chip is applied to computer equipment, and the computer equipment comprises the following steps: at least one memory chip, discernment chip and with discernment chip connected first storage, include: acquiring a target memory identifier based on a first memory connected with the identification chip, wherein the target memory identifier is used for indicating a target memory chip, the target memory chip is any one of at least one memory chip, and the target memory identifier is stored in the first memory; when the pre-stored memory identifier set comprises a target memory identifier, acquiring a target memory parameter corresponding to the target memory identifier, wherein the target memory parameter is used for starting a target memory chip; and controlling the starting of the target memory chip according to the target memory parameter.

Description

Memory chip starting method and device, computer equipment and storage medium
Technical Field
The present disclosure relates to the field of electronic technologies, and in particular, to a method and apparatus for starting a memory chip, a computer device, and a storage medium.
Background
The computer equipment comprises a processor, a memory and memory chips of different types, and a starting program corresponding to each type of memory chip is included in the computer equipment and is used for starting the memory chips.
In the use process of memory chips with different types, various starting programs corresponding to the memory chips need to be generated and maintained, so that the problem of high cost exists when the computer equipment starts various different memory chips.
Disclosure of Invention
The application provides a method, a device, computer equipment and a storage medium for starting a memory chip, which solve the problem of higher implementation cost when the memory chip is started.
In order to achieve the above purpose, the present application adopts the following technical scheme:
in a first aspect, an embodiment of the present application provides a method for starting a memory chip, where the method is applied to a computer device, and the computer device includes: at least one memory chip, discernment chip and with discernment chip connected first storage, include: acquiring a target memory identifier based on a first memory connected with the identification chip, wherein the target memory identifier is used for indicating a target memory chip, the target memory chip is any one of at least one memory chip, and the target memory identifier is stored in the first memory; when the pre-stored memory identifier set comprises a target memory identifier, acquiring a target memory parameter corresponding to the target memory identifier, wherein the target memory parameter is used for starting a target memory chip; and controlling the starting of the target memory chip according to the target memory parameter.
In this way, the target memory identifier is obtained from the memory connected with the identification chip, and when the pre-stored memory identifier set comprises the target memory identifier, the target memory parameter corresponding to the target memory identifier is obtained, and finally, according to the target memory parameter, the starting of the memory chips of various types can be controlled by one starting program, and various starting programs are not required to be generated and maintained, so that the cost can be reduced.
In one possible implementation of the present application, the computer device further includes: the processor, the processor includes first interface, and the processor passes through first interface connection with discernment chip, obtains target memory sign based on the first memory that is connected with discernment chip, includes:
and after receiving the memory identification instruction, acquiring the target memory identification from the first memory based on the first interface and the identification chip.
In one possible implementation manner of the present application, obtaining, based on the first interface and the identification chip, the target memory identifier from the first memory includes:
acquiring a target memory identifier from a first memory based on a communication protocol of the first interface simulated by the identification chip;
and acquiring the target memory identification from the identification chip based on the first interface.
In a possible implementation manner of the present application, the computer device further includes a second memory, the processor further includes a second interface, the processor and the second memory are connected through the second interface, and the obtaining the target memory parameter corresponding to the target memory identifier includes: acquiring a target storage position corresponding to the target memory identifier according to a mapping relation between the pre-stored memory identifier and the storage position, wherein the target storage position is a position for storing target memory parameters; and acquiring the target memory parameter according to the target storage position based on the second interface.
In one possible implementation manner of the present application, the method further includes:
when the memory identifier set does not comprise the target memory identifier, acquiring preset memory parameters;
and controlling the starting of the target memory chip according to the preset memory parameters.
In one possible implementation manner of the present application, controlling the starting of the target memory chip according to the target memory parameter includes:
adding the target memory parameters into a pre-stored starting algorithm;
and controlling the starting of the target memory chip according to the starting algorithm added with the target memory parameter.
In one possible implementation of the present application, the set of memory identifiers includes at least one memory identifier, where the one memory identifier is used to indicate one memory chip, and the method further includes:
acquiring chip information of a memory chip;
determining the memory identification of the memory chip according to the chip information of the memory chip;
and storing the memory identifier into a memory identifier set.
In one possible implementation manner of the present application, the method further includes:
configuring memory parameters corresponding to the memory chip according to the chip information of the memory chip;
and storing the memory parameters to preset storage positions, and establishing a mapping relation between each memory identifier in the memory identifier set and the storage positions of the memory parameters.
In one possible implementation of the present application, the chip information includes at least one of: chip type, chip bit width, and chip capacity.
In a second aspect, an embodiment of the present application provides a device for starting a memory chip, where the device is located in a computer device, and the computer device includes: at least one memory chip, discernment chip and with discernment chip connected first storage, include:
the first acquisition module is used for acquiring a target memory identifier based on a first memory connected with the identification chip, wherein the target memory identifier is used for indicating a target memory chip, the target memory chip is any one of at least one memory chip, and the target memory identifier is stored in the first memory;
the second acquisition module is used for acquiring target memory parameters corresponding to the target memory identifiers when the pre-stored memory identifier set comprises the target memory identifiers, and the target memory parameters are used for starting the target memory chip;
and the control module is used for controlling the starting of the target memory chip according to the target memory parameters.
In one possible implementation of the present application, the computer device further includes: the processor comprises a first interface, the processor is connected with the identification chip through the first interface, and the first acquisition module is specifically used for:
and after receiving the memory identification instruction, acquiring the target memory identification from the first memory based on the first interface and the identification chip.
In one possible implementation manner of the present application, the first obtaining module is specifically configured to:
acquiring a target memory identifier from a first memory based on a communication protocol of the first interface simulated by the identification chip;
and acquiring the target memory identification from the identification chip based on the first interface.
In a possible implementation manner of the present application, the computer device further includes a second memory, the processor further includes a second interface, the processor and the second memory are connected through the second interface, and the second obtaining module is specifically configured to:
acquiring a target storage position corresponding to the target memory identifier according to a mapping relation between the pre-stored memory identifier and the storage position, wherein the target storage position is a position for storing target memory parameters;
and acquiring the target memory parameter according to the target storage position based on the second interface.
In one possible implementation manner of the present application, the second obtaining module is further configured to:
when the memory identifier set does not comprise the target memory identifier, acquiring preset memory parameters;
the control module is also used for: and controlling the starting of the target memory chip according to the preset memory parameters.
In one possible implementation manner of the present application, the control module is specifically configured to:
adding the target memory parameters into a pre-stored starting algorithm;
and controlling the starting of the target memory chip according to the starting algorithm added with the target memory parameter.
In one possible implementation manner of the present application, the memory identifier set includes at least one memory identifier, where one memory identifier is used to indicate one memory chip, and the apparatus further includes a configuration module, where the configuration module is configured to:
acquiring chip information of a memory chip;
determining the memory identification of the memory chip according to the chip information of the memory chip;
and storing the memory identifier into a memory identifier set.
In one possible implementation of the present application, the configuration module is further configured to:
configuring memory parameters corresponding to the memory chip according to the chip information of the memory chip;
and storing the memory parameters to preset storage positions, and establishing a mapping relation between each memory identifier in the memory identifier set and the storage positions of the memory parameters.
In one possible implementation of the present application, the chip information includes at least one of: chip type, chip bit width, and chip capacity.
In a third aspect, an embodiment of the present application provides a computer device, where the device includes a memory and a processor, where the memory stores a computer program, and where the computer program, when executed by the processor, implements a method for starting up a memory chip as provided in the first aspect of the embodiment of the present application.
In a fourth aspect, embodiments of the present application provide a computer readable storage medium having a computer program stored thereon, where the computer program, when executed by a processor, implements a method for starting a memory chip as provided in the first aspect of the embodiments of the present application.
In a fifth aspect, the present application provides a computer program product comprising computer instructions which, when run on a starting device of a memory chip, cause the starting device of the memory chip to perform the starting method of the memory chip as in the first aspect and any one of its possible implementations.
For a detailed description of the second to fifth aspects and various implementations thereof in this application, reference may be made to the detailed description of the first aspect and various implementations thereof; moreover, the advantages of the second aspect and the various implementations thereof may be referred to as analyzing the advantages of the first aspect and the various implementations thereof, and will not be described herein.
These and other aspects of the present application will be more readily apparent from the following description.
Drawings
Fig. 1 is a schematic structural diagram of a starting device of a memory chip according to an embodiment of the present application;
FIG. 2 is a flowchart of a method for starting a memory chip according to an embodiment of the present disclosure;
FIG. 3 is a schematic diagram of a connection between a processor and a memory according to an embodiment of the present disclosure;
FIG. 4 is a second flowchart of a method for starting up a memory chip according to an embodiment of the present disclosure;
fig. 5 is a schematic structural diagram of an activation device for a memory chip according to an embodiment of the present application.
Detailed Description
In this application, the terms "exemplary" or "such as" and the like are used to mean serving as an example, instance, or illustration. Any embodiment or design described herein as "exemplary" or "for example" should not be construed as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "such as" is intended to present related concepts in a concrete fashion. In the description of the embodiments of the present application, unless otherwise indicated, "at least one" means one or more, and "a plurality" means two or more.
The computer equipment comprises a processor, a memory and memory chips of different types, and a starting program corresponding to each type of memory chip is included in the computer equipment and is used for starting the memory chips.
In the use process of memory chips with different types, various starting programs corresponding to the memory chips need to be generated and maintained, so that the problem of high cost exists when the computer equipment starts various different memory chips.
In order to solve the above technical problems, embodiments of the present application provide a method and an apparatus for starting a memory chip, which are capable of reducing cost by acquiring a target memory identifier from a memory connected to an identification chip, acquiring a target memory parameter corresponding to the target memory identifier when the set of pre-stored memory identifiers includes the target memory identifier, and finally controlling the starting of multiple types of memory chips by a starting program according to the target memory parameter, without generating and maintaining multiple starting programs.
The execution body of the starting method of the memory chip provided by the embodiment of the application is a starting device of the memory chip. The starting device of the memory chip can be a computer device or a chip on a main board in the computer device.
In some embodiments, the computer device may be a terminal device, a server, a cloud computing platform, or a device including a startup device of a memory chip. The terminal device may be a mobile phone (mobile phone), a tablet computer, a notebook computer, a palm computer, a computer, etc.
The memory chip activation device may include the elements included in the memory chip activation device shown in fig. 1. The hardware configuration of the computer device will be described below by taking the starting device of the memory chip shown in fig. 1 as an example.
As shown in fig. 1, the starting device of the memory chip may include: processor 11, memory 12, motherboard 13, bus 14. The processor 11, the memory 12 and the motherboard 13 may be connected by a bus 14. The main board 13 may include: at least one memory chip 15 and an identification chip 16.
The processor 11 is a control center of a memory chip starting device, and may be a general purpose processor (central processing units, CPU), a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits for controlling program execution in the present application.
Memory 12 may be, but is not limited to, read-only memory (ROM) or other type of static storage device that can store static information and instructions, random access memory (random access memory, RAM) or other type of dynamic storage device that can store information and instructions, as well as electrically erasable programmable read-only memory (EEPROM), magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer.
In a possible implementation, the memory 12 may exist separately from the processor 11, and the memory 12 may be connected to the processor 11 through the bus 14 for storing instructions or program code. When the processor 11 invokes and executes the instructions or the program codes stored in the memory 12, the method for starting the memory chip provided in the following embodiments of the present application can be implemented.
In another possible implementation, the memory 12 may also be integrated with the processor 11.
The motherboard 13, which may be a rectangular circuit board, has mounted thereon the main circuitry that makes up the computer, including at least one memory chip 15, an identification chip 16, and the like.
Bus 14 may be an industry standard architecture (industry standard architecture, ISA) bus, an external device interconnect (peripheral component interconnect, PCI) bus, or an extended industry standard architecture (extended industry standard architecture, EISA) bus, or a high speed serial computer extended bus standard (peripheral component interconnect express, PCIE) bus, among others. The bus may be classified as an address bus, a data bus, a control bus, etc.
The memory chip 15, which may be referred to as "memory granule", is the core component in the memory stripe, and is the storage medium of the memory, and the quality of the memory chip 15 directly relates to the performance of the memory.
The identification chip 16 may be a complex programmable logic device (Complex Programmable logic device, CPLD), a field programmable gate array (Field Programmable Gate Array, FPGA) or a single chip microcomputer. The identification chip 16 is mainly used for storing the memory identifier of the memory chip 15 into the memory 12 in the present application.
It should be noted that the structure shown in fig. 1 does not constitute a limitation of the activation device of the memory chip, and the activation device of the memory chip may include more or less components than those shown in fig. 1, or may combine some components, or may be arranged with different components.
Based on the description of the hardware architecture of the host, the embodiment of the application provides a method for starting a memory chip, and the method for starting the memory chip provided by the embodiment of the application is described below with reference to the accompanying drawings.
As shown in fig. 2, the method for starting the memory chip may include the following steps 201 to 203.
In the embodiment of the present application, the method for starting the memory chip provided in the embodiment of the present application is described by taking an example that at least one memory chip is inserted into a motherboard of a computer device.
201. The computer device obtains the target memory identification based on a first memory connected to the identification chip.
The target memory identifier is used for indicating a target memory chip, and the target memory chip can be any one of at least one memory chip inserted in the main board.
Optionally, the identification chip may be any one of a CPLD, an FPGA, and a single chip microcomputer, and the embodiment of the present application does not limit which chip is specifically the identification chip. The memory connected to the identification chip may also be implemented in a variety of ways. As a possible implementation, the memory may be a memory chip inside the computer device, i.e. the memory may be the memory 12 in fig. 1, e.g. the memory 12 may be a ROM. As another possible implementation, the memory may be a memory chip that is external to the computer device. For example, the memory may be a ROM external to the computer device. The implementation of the memory connected to the identification chip is not specifically limited in this embodiment of the present application.
Optionally, in an embodiment of the present invention, the computer device may further include a processor, in addition to at least one memory chip and the identification chip, where the processor is connected to each memory chip inserted in the computer device through a bus. In this case, the process of the computer device obtaining the target memory identifier based on the first storage device is: after receiving the memory identification instruction, the processor acquires the target memory identification from the first memory through a first interface connected with the identification chip.
It is understood that the indication information of the target memory chip is used to indicate the memory chip to be started.
Optionally, the specific process of obtaining the target memory identifier from the first memory through the first interface connected to the identification chip may be: the identification chip simulates a communication protocol of the first interface to acquire the target memory identification from the first memory, and the processor acquires the target memory identification from the identification chip through the first interface.
In the actual implementation process, when the computer equipment acquires the target memory identifier based on the memory connected with the identification chip, the identification chip needs to be initialized first, then the target memory identifier is acquired from the identification chip through the identification chip simulation (Inter-Integrated Circuit, I2C) protocol first memory, and then the processor acquires the target memory identifier from the identification chip through the I2C interface.
202. When the pre-stored memory identifier set comprises a target memory identifier, the computer equipment acquires a target memory parameter corresponding to the target memory identifier, wherein the target memory parameter is used for starting the target memory chip.
After the computer device obtains the target memory identifier based on the memory connected to the identification chip, it may determine whether the set of pre-stored memory identifiers includes the target memory identifier. If the pre-stored memory identifier set includes the target memory identifier, the related information of the target memory chip indicated by the target memory identifier, such as the memory parameter for starting the target memory chip, is pre-stored in the computer device. In this case, the computer device may obtain the target memory parameter corresponding to the target memory identifier, for starting the target memory chip. If the pre-stored memory identifier set does not comprise the target memory identifier, the related information of the target memory chip indicated by the target memory identifier is not pre-stored in the computer equipment. In this case, the computer device may obtain the pre-stored memory parameters from the storage, and control the start of the target memory chip according to the pre-stored memory parameters. It is easy to understand that the pre-stored memory parameter may be a default general-purpose memory parameter (a memory parameter capable of adapting to various memory chips) for starting a memory chip without pre-stored information. Therefore, whether the memory identifier set comprises the target memory identifier or not can be guaranteed, normal starting of the target memory chip indicated by the target memory identifier can be achieved, and further the use of the target memory chip is guaranteed.
It will be appreciated that the memory for storing the preset memory parameters and the memory connected to the identification chip in step 201 may be the same memory or different memories.
Optionally, the memory identifier set and the memory parameters corresponding to each memory identifier in the memory identifier set are stored in another memory. The first memory is used for storing the target memory identifier, and the second memory is used for storing the memory identifier set and memory parameters corresponding to each memory identifier in the memory identifier set. As shown in fig. 3, the processor includes a serial peripheral interface (Serial Peripheral Interface, SPI) and (Low pin count, LPC), and is connected to the identification chip through the LPC interface, the identification chip is connected to the first memory, and the processor is connected to the second memory through the SPI interface.
It can be understood that the pre-stored memory identifier set includes memory identifiers corresponding to the memory chips.
In the actual implementation process, after the processor receives a chip starting instruction, a target memory identifier can be obtained from the first memory through the identification chip by the LPC interface, a memory identifier set is obtained from the second memory through the SPI interface, whether the memory identifier set comprises the target memory identifier is judged, and if the pre-stored memory identifier set comprises the target memory identifier, a target memory parameter corresponding to the target memory identifier is obtained.
It should be noted that, the above description is made by taking the memory chip as a plurality of types, where when the memory chips are two types, when the pre-stored memory identifier set includes the target memory identifier, the computer device obtains the target memory parameter corresponding to the target memory identifier, and may also be: the processor judges whether the target memory identifier is a first preset value, and if the target memory identifier is the first preset value, the processor acquires a first memory parameter. If the target memory identifier is not the first preset value, the processor acquires the second memory parameter.
203. And the computer equipment controls the starting of the target memory chip according to the target memory parameter.
Optionally, in a specific implementation, after the processor acquires the target memory parameter, the processor may add the target memory parameter to a pre-stored starting algorithm. Thus, the processor can control the starting of the target memory chip according to the starting algorithm added with the target memory parameter.
It can be understood that the starting algorithm is used for starting the memory chips, wherein parameters in the starting algorithm of each memory chip are inconsistent, so that corresponding target memory parameters of the target memory chip need to be obtained, and after the target memory parameters are added to the pre-stored starting algorithm, the starting algorithm added with the target memory parameters is used for controlling the starting of the target memory chip.
Optionally, the starting algorithm is stored in the second memory, and the memory parameter may be stored in a corresponding location in the starting algorithm. For example, the startup algorithm may be stored in one folder of the second memory, each memory parameter may be stored in a next-level folder of the one folder, and names of folders storing different memory parameters may be different.
In an actual implementation process, the processor may further load a startup algorithm including the target memory parameter according to the target storage location of the target memory parameter to control startup of the target memory chip.
The embodiment of the application provides a method and a device for starting a memory chip, which are characterized in that a target memory identifier is obtained from a memory connected with an identification chip, when a pre-stored memory identifier set comprises the target memory identifier, a target memory parameter corresponding to the target memory identifier is obtained, and finally, according to the target memory parameter, the starting of multiple types of memory chips can be controlled through a starting program, and multiple starting programs are not required to be generated and maintained, so that the cost can be reduced.
Alternatively, in the embodiment of the present application, as shown in fig. 2 and fig. 4, the above step 202 may be specifically implemented by the following steps 204 to 205.
204. When the pre-stored memory identifier set comprises the target memory identifier, the processor acquires a target storage position corresponding to the target memory identifier according to the mapping relation between the pre-stored memory identifier and the storage position.
It is understood that the target storage location is a location where the target memory parameter is stored.
Memory parameters corresponding to the memory parameters are stored in preset positions in the second memory. The processor can determine the storage position of the target memory parameter according to the mapping relation between the pre-stored memory identifier and the storage position, and acquire the corresponding memory parameter.
Optionally, the memory identifier set includes at least one memory identifier, and the one memory identifier is used for indicating one memory chip. The computer device may pre-store the set of memory identifiers to prepare for the start-up of the memory chip before performing steps 201-203 described above. Taking the storage of an identifier of a memory chip as an example for illustration, in a specific implementation, the processor may first obtain the chip information of the memory chip to be stored, determine the memory identifier of the memory chip according to the chip information of the memory chip, and then store the determined memory identifier into the memory identifier set.
Optionally, the chip information is at least one of a chip type, a chip bit width, and a chip capacity of the memory chip. When the processor determines the memory identifier of the memory chip based on the chip information of the memory chip, any one of the chip type, the chip bit width and the chip capacity, or a combination of multiple information can be used as the memory identifier of the memory chip. Of course, the processor may also use other information corresponding to the chip information, such as a binary file, as the memory identifier according to the chip information. The specific implementation of determining the memory identifier based on the chip information is not limited herein.
For example, the chip type of the memory chip may be a manufacturer of the memory chip, the chip bit width of the memory chip may be X8 bit width or X16 bit width, and the capacity of the memory chip may be 4 Gigabytes (GB) or 8 GB.
It will be appreciated that the chip identifier may be represented by a binary file, which may be formed based on chip information of the memory chip, for example, the binary file may be: 012001, wherein the first byte may represent the chip type, the second byte may represent the bit width of the chip, and the third byte may represent the capacity of the chip.
205. The processor obtains the target memory parameter according to the target storage position.
Optionally, before the computer device obtains the target memory identifier based on the preset first storage, the following procedure may be further executed: the computer equipment acquires the chip information of the memory chip, configures the memory parameters corresponding to the memory chip according to the chip information, stores the memory parameters to a preset storage position, and establishes the mapping relation between each memory identifier in the memory identifier set and the storage position of the memory parameters.
In the actual implementation process, the processor may obtain chip information of various memory chips in advance, and pre-configure memory parameters corresponding to the various memory chips according to the obtained chip information, and store the memory parameters to preset positions in the memory, and at the same time, the processor may pre-establish a mapping relationship between memory identifiers of the memory chips and storage positions of the memory parameters corresponding to the memory chips.
The foregoing description of the solution provided in the embodiments of the present application has been mainly presented in terms of a method. To achieve the above functions, it includes corresponding hardware structures and/or software modules that perform the respective functions. Those of skill in the art will readily appreciate that the elements and algorithm steps of the examples described in connection with the embodiments disclosed herein may be implemented as hardware or combinations of hardware and computer software. Whether a function is implemented as hardware or computer software driven hardware depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
Fig. 5 is a schematic structural diagram of a starting device of a memory chip according to an embodiment of the present application, where the starting device of a memory chip is used to execute the starting method of a memory chip shown in fig. 2. The starting device of the memory chip is located in a computer device, and the computer device comprises: at least one memory chip, an identification chip and a first storage connected with the identification chip, the starting device of the memory chip can comprise: a first acquisition module 51, a second acquisition module 52, a control module 53 and a configuration module 54.
The first obtaining module 51 is configured to obtain a target memory identifier based on a first memory connected to the identification chip, where the target memory identifier is used to indicate a target memory chip, and the target memory chip is any one of at least one memory chip, and the first memory stores the target memory identifier;
the second obtaining module 52 is configured to obtain, when the pre-stored set of memory identifiers includes a target memory identifier, a target memory parameter corresponding to the target memory identifier, where the target memory parameter is used to start a target memory chip;
the control module 53 is configured to control the starting of the target memory chip according to the target memory parameter.
In one possible implementation of the present application, the computer device further includes: the processor, the processor includes the first interface, and the processor is connected with the identification chip through the first interface, and the first acquisition module 51 is specifically configured to:
and after receiving the memory identification instruction, acquiring the target memory identification from the first memory based on the first interface and the identification chip.
In one possible implementation manner of the present application, the first obtaining module 51 is specifically configured to:
acquiring a target memory identifier from a first memory based on a communication protocol of the first interface simulated by the identification chip;
and acquiring the target memory identification from the identification chip based on the first interface.
In a possible implementation manner of the present application, the computer device further includes a second memory, the processor further includes a second interface, and the processor and the second memory are connected through the second interface, and the second obtaining module 52 is specifically configured to:
acquiring a target storage position corresponding to the target memory identifier according to a mapping relation between the pre-stored memory identifier and the storage position, wherein the target storage position is a position for storing target memory parameters;
and acquiring the target memory parameter according to the target storage position based on the second interface.
In one possible implementation of the present application, the second obtaining module 52 is further configured to:
when the memory identifier set does not comprise the target memory identifier, acquiring preset memory parameters;
the control module is also used for: and controlling the starting of the target memory chip according to the preset memory parameters.
In one possible implementation of the present application, the control module 53 is specifically configured to:
adding the target memory parameters into a pre-stored starting algorithm;
and controlling the starting of the target memory chip according to the starting algorithm added with the target memory parameter.
In one possible implementation of the present application, the set of memory identifiers includes at least one memory identifier, where one memory identifier is used to indicate one memory chip, and the apparatus further includes a configuration module 54, where the configuration module 54 is configured to:
acquiring chip information of a memory chip;
determining the memory identification of the memory chip according to the chip information of the memory chip;
and storing the memory identifier into a memory identifier set.
In one possible implementation of the present application, the configuration module 54 is further configured to:
configuring memory parameters corresponding to the memory chip according to the chip information of the memory chip;
and storing the memory parameters to preset storage positions, and establishing a mapping relation between each memory identifier in the memory identifier set and the storage positions of the memory parameters.
In one possible implementation of the present application, the chip information includes at least one of: chip type, chip bit width, and chip capacity.
Of course, the starting device of the memory chip provided in the embodiment of the present application includes, but is not limited to, the above module.
Another embodiment of the present application further provides a computer readable storage medium, where computer instructions are stored in the computer readable storage medium, and when the computer instructions run on a starting device of a memory chip, the starting device of the memory chip executes each step executed by a starting method of the memory chip in a method flow shown in the foregoing method embodiment.
The other embodiment of the application also provides a chip system which is applied to the starting device of the memory chip. The system-on-chip includes one or more interface circuits, and one or more processors. The interface circuit and the processor are interconnected by a wire. The interface circuit is configured to receive signals from a memory of the initiator device of the memory chip and to send signals to the processor, the signals including computer instructions stored in the memory. When the processor executes the computer instructions, the starting device of the memory chip executes each step executed by the starting method of the memory chip in the method flow shown in the method embodiment.
In another embodiment of the present application, there is further provided a computer program product, where the computer program product includes computer instructions, which when executed on a starting device of a memory chip, cause the starting device of the memory chip to execute each step of the starting method of the memory chip in the method flow shown in the foregoing method embodiment.
In the above embodiments, it may be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented using a software program, it may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer-executable instructions are loaded and executed on a computer, the processes or functions in accordance with embodiments of the present application are fully or partially produced. The computer may be a general purpose computer, a special purpose computer, a computer network, or other programmable apparatus. The computer instructions may be stored in or transmitted from one computer-readable storage medium to another, for example, a website, computer, server, or data center via a wired (e.g., coaxial cable, fiber optic, digital subscriber line (digital subscriber line, DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. Computer readable storage media can be any available media that can be accessed by a computer or data storage devices including one or more servers, data centers, etc. that can be integrated with the media. The usable medium may be a magnetic medium (e.g., a floppy disk, a hard disk, a magnetic tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a Solid State Disk (SSD)), or the like.
The above is merely a specific embodiment of the present application. Variations and alternatives will occur to those skilled in the art from the detailed description provided herein and are intended to be included within the scope of the present application.

Claims (18)

1. The method for starting the memory chip is applied to computer equipment and is characterized in that the computer equipment comprises the following steps: at least one memory chip, discernment chip and with discernment chip connected first storage, include:
acquiring a target memory identifier based on a first memory connected with the identification chip, wherein the target memory identifier is used for indicating a target memory chip, the target memory chip is any one of the at least one memory chip, and the target memory identifier is stored in the first memory;
when a pre-stored memory identifier set comprises the target memory identifier, acquiring a target memory parameter corresponding to the target memory identifier, wherein the target memory parameter is used for starting the target memory chip;
controlling the starting of the target memory chip according to the target memory parameter;
the computer device further comprises: the processor, the processor includes first interface, the processor with the discernment chip passes through first interface connection, based on with the discernment chip is connected first memory acquires the target memory sign, include:
and after receiving a memory identification instruction, acquiring the target memory identification from the first memory based on the first interface and the identification chip.
2. The method of claim 1, wherein the obtaining the target memory identifier from the first memory based on the first interface and the identification chip comprises:
the target memory identification is obtained from the first storage based on the communication protocol of the first interface simulated by the identification chip;
and acquiring the target memory identifier from the identification chip based on the first interface.
3. The method of claim 1, wherein the computer device further comprises a second memory, the processor further comprises a second interface, the processor and the second memory are connected through the second interface, and the obtaining the target memory parameter corresponding to the target memory identifier comprises:
acquiring a target storage position corresponding to the target memory identifier according to a mapping relation between a pre-stored memory identifier and a storage position, wherein the target storage position is a position for storing the target memory parameter;
and acquiring the target memory parameter according to the target storage position based on the second interface.
4. The method according to claim 1, wherein the method further comprises:
when the memory identifier set does not comprise the target memory identifier, acquiring a preset memory parameter;
and controlling the starting of the target memory chip according to the preset memory parameters.
5. The method of claim 1, wherein controlling the activation of the target memory chip according to the target memory parameter comprises:
adding the target memory parameters into a pre-stored starting algorithm;
and controlling the starting of the target memory chip according to a starting algorithm added with the target memory parameters.
6. The method of claim 1, wherein the set of memory identifiers includes at least one memory identifier, one memory identifier being used to indicate one memory chip, the method further comprising:
acquiring chip information of the memory chip;
determining a memory identifier of the memory chip according to the chip information of the memory chip;
and storing the memory identifier into the memory identifier set.
7. The method of claim 5, wherein the method further comprises:
configuring memory parameters corresponding to the memory chip according to the chip information of the memory chip;
and storing the memory parameters to preset storage positions, and establishing a mapping relation between each memory identifier in the memory identifier set and the storage positions of the memory parameters.
8. The method of claim 7, wherein the chip information includes at least one of: chip type, chip bit width, and chip capacity.
9. A starting device of a memory chip, located in a computer device, wherein the computer device includes: at least one memory chip, discernment chip and with discernment chip connected first storage, include:
the first acquisition module is used for acquiring a target memory identifier based on a first memory connected with the identification chip, wherein the target memory identifier is used for indicating a target memory chip, the target memory chip is any one of the at least one memory chip, and the target memory identifier is stored in the first memory;
the second acquisition module is used for acquiring a target memory parameter corresponding to the target memory identifier when the pre-stored memory identifier set comprises the target memory identifier, wherein the target memory parameter is used for starting the target memory chip;
the control module is used for controlling the starting of the target memory chip according to the target memory parameter;
the computer device further comprises: the processor comprises a first interface, the processor is connected with the identification chip through the first interface, and the first acquisition module is specifically configured to:
and after receiving a memory identification instruction, acquiring the target memory identification from the first memory based on the first interface and the identification chip.
10. The apparatus of claim 9, wherein the first acquisition module is specifically configured to:
the target memory identification is obtained from the first storage based on the communication protocol of the first interface simulated by the identification chip;
and acquiring the target memory identifier from the identification chip based on the first interface.
11. The apparatus of claim 9, wherein the computer device further comprises a second memory, the processor further comprises a second interface, the processor and the second memory are connected through the second interface, and the second acquisition module is specifically configured to:
acquiring a target storage position corresponding to the target memory identifier according to a mapping relation between a pre-stored memory identifier and a storage position, wherein the target storage position is a position for storing the target memory parameter;
and acquiring the target memory parameter according to the target storage position based on the second interface.
12. The apparatus of claim 9, wherein the second acquisition module is further configured to:
when the memory identifier set does not comprise the target memory identifier, acquiring a preset memory parameter;
the control module is further configured to: and controlling the starting of the target memory chip according to the preset memory parameters.
13. The apparatus of claim 9, wherein the control module is specifically configured to:
adding the target memory parameters into a pre-stored starting algorithm;
and controlling the starting of the target memory chip according to a starting algorithm added with the target memory parameters.
14. The apparatus of claim 9, wherein the set of memory identifiers includes at least one memory identifier, one memory identifier being used to indicate one memory chip, the apparatus further comprising a configuration module configured to:
acquiring chip information of the memory chip;
determining a memory identifier of the memory chip according to the chip information of the memory chip;
and storing the memory identifier into the memory identifier set.
15. The apparatus of claim 14, wherein the configuration module is further configured to:
configuring memory parameters corresponding to the memory chip according to the chip information of the memory chip;
and storing the memory parameters to preset storage positions, and establishing a mapping relation between each memory identifier in the memory identifier set and the storage positions of the memory parameters.
16. The apparatus of claim 15, wherein the chip information comprises at least one of: chip type, chip bit width, and chip capacity.
17. A computer device comprising a memory and a processor, the memory storing a computer program which, when executed by the processor, implements the method of starting up a memory chip according to any one of claims 1 to 8.
18. A computer readable storage medium, characterized in that the computer readable storage medium stores a computer program which, when executed by a processor, implements the method of starting up a memory chip according to any of claims 1 to 8.
CN202210069376.2A 2022-01-20 2022-01-20 Memory chip starting method and device, computer equipment and storage medium Active CN114579198B (en)

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Citations (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104809013A (en) * 2015-04-21 2015-07-29 北京创毅视讯科技有限公司 Embedded system starting method and device
GB201615562D0 (en) * 2016-09-13 2016-10-26 Imagination Tech Ltd Build-time memory manangement for multi-core embedded system
CN107766153A (en) * 2017-10-17 2018-03-06 华为技术有限公司 A kind of EMS memory management process and device
CN107766128A (en) * 2016-08-17 2018-03-06 华为技术有限公司 A kind of method and device for starting application
CN108427579A (en) * 2018-03-01 2018-08-21 杭州朔天科技有限公司 A method of from SOC chip to a variety of external series flash memory loading codes
CN108984219A (en) * 2018-08-29 2018-12-11 迈普通信技术股份有限公司 Memory parameter configuration method and electronic equipment
CN110209490A (en) * 2018-04-27 2019-09-06 腾讯科技(深圳)有限公司 A kind of EMS memory management process and relevant device
CN111367671A (en) * 2020-03-03 2020-07-03 深信服科技股份有限公司 Memory allocation method, device, equipment and readable storage medium
CN111382087A (en) * 2018-12-28 2020-07-07 华为技术有限公司 Memory management method and electronic equipment
CN111522673A (en) * 2020-04-26 2020-08-11 腾讯科技(深圳)有限公司 Memory data access method and device, computer equipment and storage medium
CN112560120A (en) * 2020-11-25 2021-03-26 深圳市金泰克半导体有限公司 Secure memory bank and starting method thereof
CN112639727A (en) * 2018-06-29 2021-04-09 高通股份有限公司 Combining load or store instructions
CN112800123A (en) * 2021-02-08 2021-05-14 腾讯科技(深圳)有限公司 Data processing method, data processing device, computer equipment and storage medium
CN113127071A (en) * 2019-12-31 2021-07-16 珠海全志科技股份有限公司 Starting method and device based on solidified starting code, computer equipment and storage medium
CN113448720A (en) * 2020-03-27 2021-09-28 腾讯科技(深圳)有限公司 Memory allocation method, device, equipment and storage medium
CN113485754A (en) * 2021-06-22 2021-10-08 新华三半导体技术有限公司 Chip starting method and device and electronic equipment

Patent Citations (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104809013A (en) * 2015-04-21 2015-07-29 北京创毅视讯科技有限公司 Embedded system starting method and device
CN107766128A (en) * 2016-08-17 2018-03-06 华为技术有限公司 A kind of method and device for starting application
GB201615562D0 (en) * 2016-09-13 2016-10-26 Imagination Tech Ltd Build-time memory manangement for multi-core embedded system
CN107766153A (en) * 2017-10-17 2018-03-06 华为技术有限公司 A kind of EMS memory management process and device
CN108427579A (en) * 2018-03-01 2018-08-21 杭州朔天科技有限公司 A method of from SOC chip to a variety of external series flash memory loading codes
CN110209490A (en) * 2018-04-27 2019-09-06 腾讯科技(深圳)有限公司 A kind of EMS memory management process and relevant device
CN112639727A (en) * 2018-06-29 2021-04-09 高通股份有限公司 Combining load or store instructions
CN108984219A (en) * 2018-08-29 2018-12-11 迈普通信技术股份有限公司 Memory parameter configuration method and electronic equipment
CN111382087A (en) * 2018-12-28 2020-07-07 华为技术有限公司 Memory management method and electronic equipment
CN113127071A (en) * 2019-12-31 2021-07-16 珠海全志科技股份有限公司 Starting method and device based on solidified starting code, computer equipment and storage medium
CN111367671A (en) * 2020-03-03 2020-07-03 深信服科技股份有限公司 Memory allocation method, device, equipment and readable storage medium
CN113448720A (en) * 2020-03-27 2021-09-28 腾讯科技(深圳)有限公司 Memory allocation method, device, equipment and storage medium
CN111522673A (en) * 2020-04-26 2020-08-11 腾讯科技(深圳)有限公司 Memory data access method and device, computer equipment and storage medium
CN112560120A (en) * 2020-11-25 2021-03-26 深圳市金泰克半导体有限公司 Secure memory bank and starting method thereof
CN112800123A (en) * 2021-02-08 2021-05-14 腾讯科技(深圳)有限公司 Data processing method, data processing device, computer equipment and storage medium
CN113485754A (en) * 2021-06-22 2021-10-08 新华三半导体技术有限公司 Chip starting method and device and electronic equipment

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