CN114579198A - Memory chip starting method and device, computer equipment and storage medium - Google Patents

Memory chip starting method and device, computer equipment and storage medium Download PDF

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Publication number
CN114579198A
CN114579198A CN202210069376.2A CN202210069376A CN114579198A CN 114579198 A CN114579198 A CN 114579198A CN 202210069376 A CN202210069376 A CN 202210069376A CN 114579198 A CN114579198 A CN 114579198A
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memory
chip
target
target memory
identifier
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CN114579198B (en
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王红悦
陈才
张道明
王兴珍
王家兴
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Phytium Technology Co Ltd
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Phytium Technology Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/445Program loading or initiating
    • G06F9/44505Configuring for program initiating, e.g. using registry, configuration files
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Stored Programmes (AREA)

Abstract

A starting method and a device of a memory chip, computer equipment and a storage medium relate to the technical field of electronics and solve the problem of high implementation cost when the memory chip is started. A starting method of a memory chip is applied to computer equipment, and the computer equipment comprises the following steps: at least one memory chip, discernment chip and with discernment chip connection's first memory includes: acquiring a target memory identifier based on a first storage connected with the identification chip, wherein the target memory identifier is used for indicating a target memory chip, the target memory chip is any one of at least one memory chip, and the target memory identifier is stored in the first storage; when the pre-stored memory identification set comprises a target memory identification, acquiring a target memory parameter corresponding to the target memory identification, wherein the target memory parameter is used for starting a target memory chip; and controlling the starting of the target memory chip according to the target memory parameters.

Description

Memory chip starting method and device, computer equipment and storage medium
Technical Field
The present application relates to the field of electronic technologies, and in particular, to a method and an apparatus for starting a memory chip, a computer device, and a storage medium.
Background
The computer equipment comprises a processor, a memory and memory chips of different models, and the computer equipment comprises a starting program corresponding to the memory chips of each model, wherein the starting program is used for starting the memory chips.
In the use process of memory chips of different models, a plurality of corresponding start-up programs need to be generated and maintained, so that the problem of higher cost exists when computer equipment starts up a plurality of different memory chips.
Disclosure of Invention
The application provides a starting method and device of a memory chip, computer equipment and a storage medium, and solves the problem of high implementation cost when the memory chip is started.
In order to achieve the purpose, the technical scheme is as follows:
in a first aspect, an embodiment of the present application provides a method for starting a memory chip, which is applied to a computer device, where the computer device includes: at least one memory chip, discernment chip and with discernment chip connection's first memory includes: acquiring a target memory identifier based on a first memory connected with the identification chip, wherein the target memory identifier is used for indicating a target memory chip, the target memory chip is any one of at least one memory chip, and the target memory identifier is stored in the first memory; when the pre-stored memory identification set comprises a target memory identification, acquiring a target memory parameter corresponding to the target memory identification, wherein the target memory parameter is used for starting a target memory chip; and controlling the starting of the target memory chip according to the target memory parameters.
Therefore, the target memory identification is obtained from the memory connected with the identification chip, the target memory parameter corresponding to the target memory identification is obtained when the target memory identification is included in the prestored memory identification set, and finally, starting of various types of memory chips can be controlled through one starting program according to the target memory parameter, various starting programs do not need to be generated and maintained, and cost can be reduced.
In one possible implementation manner of the present application, the computer device further includes: the processor, the processor includes first interface, and the processor passes through first interface connection with the discernment chip, obtains the target memory sign based on the first memory that is connected with the discernment chip, includes:
and after receiving the memory identification instruction, acquiring a target memory identifier from the first memory based on the first interface and the identification chip.
In a possible implementation manner of the present application, acquiring a target memory identifier from a first storage based on a first interface and an identification chip includes:
acquiring a target memory identifier from a first memory based on a communication protocol of a first interface simulated by a recognition chip;
and acquiring a target memory identifier from the identification chip based on the first interface.
In a possible implementation manner of the present application, the computer device further includes a second storage, the processor further includes a second interface, and the processor and the second storage are connected through the second interface to obtain a target memory parameter corresponding to the target memory identifier, including: acquiring a target storage position corresponding to a target memory identifier according to a mapping relation between pre-stored memory identifiers and storage positions, wherein the target storage position is a position for storing target memory parameters; and acquiring target memory parameters according to the target storage position based on the second interface.
In one possible implementation manner of the present application, the method further includes:
when the memory identification set does not comprise the target memory identification, acquiring preset memory parameters;
and controlling the starting of the target memory chip according to the preset memory parameters.
In one possible implementation manner of the present application, controlling the starting of the target memory chip according to the target memory parameter includes:
adding the target memory parameter into a prestored starting algorithm;
and controlling the starting of the target memory chip according to the starting algorithm added with the target memory parameters.
In a possible implementation manner of the present application, the memory identifier set includes at least one memory identifier, where one memory identifier is used to indicate one memory chip, and the method further includes:
acquiring chip information of a memory chip;
determining the memory identification of the memory chip according to the chip information of the memory chip;
and storing the memory identification into the memory identification set.
In one possible implementation manner of the present application, the method further includes:
configuring memory parameters corresponding to the memory chip according to the chip information of the memory chip;
and storing the memory parameters to a preset storage position, and establishing a mapping relation between each memory identifier in the memory identifier set and the storage position of the memory parameters.
In one possible implementation manner of the present application, the chip information includes at least one of the following: chip type, chip bit width, and chip capacity.
In a second aspect, an embodiment of the present application provides a starting apparatus for a memory chip, where the starting apparatus is located in a computer device, and the computer device includes: at least one memory chip, discernment chip and with discernment chip connection's first memory includes:
the first acquisition module is used for acquiring a target memory identifier based on a first storage connected with the identification chip, the target memory identifier is used for indicating a target memory chip, the target memory chip is any one of at least one memory chip, and the target memory identifier is stored in the first storage;
the second obtaining module is used for obtaining a target memory parameter corresponding to the target memory identifier when the pre-stored memory identifier set comprises the target memory identifier, and the target memory parameter is used for starting a target memory chip;
and the control module is used for controlling the starting of the target memory chip according to the target memory parameters.
In one possible implementation manner of the present application, the computer device further includes: the processor comprises a first interface, the processor is connected with the identification chip through the first interface, and the first acquisition module is specifically used for:
and after receiving the memory identification instruction, acquiring a target memory identifier from the first memory based on the first interface and the identification chip.
In a possible implementation manner of the present application, the first obtaining module is specifically configured to:
acquiring a target memory identifier from a first memory based on a communication protocol of a first interface simulated by a recognition chip;
and acquiring a target memory identifier from the identification chip based on the first interface.
In a possible implementation manner of the present application, the computer device further includes a second memory, the processor further includes a second interface, the processor and the second memory are connected through the second interface, and the second obtaining module is specifically configured to:
acquiring a target storage position corresponding to a target memory identifier according to a mapping relation between pre-stored memory identifiers and storage positions, wherein the target storage position is a position for storing target memory parameters;
and acquiring target memory parameters according to the target storage position based on the second interface.
In a possible implementation manner of the present application, the second obtaining module is further configured to:
when the memory identification set does not comprise the target memory identification, acquiring preset memory parameters;
the control module is further configured to: and controlling the starting of the target memory chip according to the preset memory parameters.
In one possible implementation manner of the present application, the control module is specifically configured to:
adding the target memory parameter into a prestored starting algorithm;
and controlling the starting of the target memory chip according to the starting algorithm added with the target memory parameters.
In a possible implementation manner of the present application, the memory identifier set includes at least one memory identifier, where one memory identifier is used to indicate one memory chip, and the apparatus further includes a configuration module, where the configuration module is configured to:
acquiring chip information of a memory chip;
determining the memory identification of the memory chip according to the chip information of the memory chip;
and storing the memory identification into the memory identification set.
In one possible implementation manner of the present application, the configuration module is further configured to:
configuring memory parameters corresponding to the memory chips according to the chip information of the memory chips;
and storing the memory parameters to a preset storage position, and establishing a mapping relation between each memory identifier in the memory identifier set and the storage position of the memory parameters.
In one possible implementation manner of the present application, the chip information includes at least one of the following: chip type, chip bit width, and chip capacity.
In a third aspect, an embodiment of the present application provides a computer device, where the computer device includes a memory and a processor, where the memory stores a computer program, and the computer program, when executed by the processor, implements the method for starting the memory chip according to the first aspect of the embodiment of the present application.
In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, on which a computer program is stored, where the computer program, when executed by a processor, implements the method for starting the memory chip provided in the first aspect of the embodiment of the present application.
In a fifth aspect, the present application provides a computer program product, which includes computer instructions that, when run on a startup device of a memory chip, cause the startup device of the memory chip to execute the startup method of the memory chip according to the first aspect and any possible implementation manner thereof.
For a detailed description of the second to fifth aspects and their various implementations in this application, reference may be made to the detailed description of the first aspect and its various implementations; moreover, the beneficial effects of the second aspect to the fifth aspect and the various implementation manners thereof may refer to the beneficial effect analysis of the first aspect and the various implementation manners thereof, and are not described herein again.
These and other aspects of the present application will be more readily apparent from the following description.
Drawings
Fig. 1 is a schematic structural diagram of a starting apparatus of a memory chip according to an embodiment of the present disclosure;
fig. 2 is a flowchart of a method for starting a memory chip according to an embodiment of the present disclosure;
FIG. 3 is a schematic diagram of a processor and a memory according to an embodiment of the present disclosure;
fig. 4 is a second flowchart of a method for starting a memory chip according to an embodiment of the present disclosure;
fig. 5 is another schematic structural diagram of a starting device of a memory chip according to an embodiment of the present disclosure.
Detailed Description
In this application, the words "exemplary" or "such as" are used to mean serving as an example, instance, or illustration. Any embodiment or design described herein as "exemplary" or "e.g.," is not necessarily to be construed as preferred or advantageous over other embodiments or designs. Rather, use of the word "exemplary" or "such as" is intended to present concepts related in a concrete fashion. In the description of the embodiments of the present application, "at least one" means one or more, and "a plurality" means two or more unless otherwise specified.
The computer equipment comprises a processor, a memory and memory chips of different models, and the computer equipment comprises a starting program corresponding to the memory chips of each model, wherein the starting program is used for starting the memory chips.
In the use process of memory chips of different models, a plurality of corresponding start-up programs need to be generated and maintained, so that the problem of higher cost exists when computer equipment starts up a plurality of different memory chips.
In order to solve the foregoing technical problems, embodiments of the present application provide a method and an apparatus for starting a memory chip, where a target memory identifier is obtained from a memory connected to an identification chip, and when a pre-stored memory identifier set includes the target memory identifier, a target memory parameter corresponding to the target memory identifier is obtained, and finally, according to the target memory parameter, starting of multiple types of memory chips can be controlled through one starting program, and multiple starting programs do not need to be generated and maintained, so that cost can be reduced.
The execution main body of the starting method of the memory chip provided by the embodiment of the application is a starting device of the memory chip. The starting device of the memory chip can be computer equipment, and can also be a chip on a mainboard in the computer equipment.
In some embodiments, the computer device may be a terminal device, a server, a cloud computing platform, or the like that includes a boot device with a memory chip. The terminal device may be a mobile phone (mobile phone), a tablet computer, a notebook computer, a palm computer, a computer, or the like.
The starting device of the memory chip may include the elements included in the starting device of the memory chip shown in fig. 1. The hardware structure of the computer device will be described below by taking the starting apparatus of the memory chip shown in fig. 1 as an example.
As shown in fig. 1, the starting apparatus of the memory chip may include: processor 11, memory 12, motherboard 13, bus 14. The processor 11, the memory 12, and the motherboard 13 may be connected by a bus 14. The main board 13 may include: at least one memory chip 15 and an identification chip 16.
The processor 11 is a control center of a starting device of a memory chip, and may be a general processing unit (CPU), a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits for controlling the execution of programs according to the present application.
The memory 12 may be, but is not limited to, a read-only memory (ROM) or other type of static storage device that can store static information and instructions, a Random Access Memory (RAM) or other type of dynamic storage device that can store information and instructions, an electrically erasable programmable read-only memory (EEPROM), a magnetic disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer.
In a possible implementation, the memory 12 may be present separately from the processor 11, and the memory 12 may be connected to the processor 11 via a bus 14 for storing instructions or program code. When the processor 11 calls and executes the instructions or program codes stored in the memory 12, the method for starting the memory chip according to the following embodiments of the present application can be implemented.
In another possible implementation, the memory 12 may also be integrated with the processor 11.
The main board 13, which may be a rectangular circuit board, has mounted thereon the main circuitry that constitutes the computer, including at least one memory chip 15 and an identification chip 16, etc.
The bus 14 may be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, an Extended ISA (EISA) bus, a PCI (peripheral component interconnect) bus, or a PCIE bus. The bus may be divided into an address bus, a data bus, a control bus, etc.
The memory chip 15, which may also be referred to as a "memory granule," is the most core component in the memory bank, and is the storage medium of the memory, and the quality of the memory chip 15 directly relates to the performance of the memory.
The identification chip 16 may be a Complex Programmable Logic Device (CPLD), a Field Programmable Gate Array (FPGA), or a single chip. The identification chip 16 is used in this application primarily to store the memory identification of the memory chip 15 in the memory 12.
It is noted that the structure shown in fig. 1 does not constitute a limitation of the activation device of the memory chip, which may include more or less components than those shown in fig. 1, or some components in combination, or a different arrangement of components, in addition to the components shown in fig. 1.
Based on the introduction of the hardware architecture of the host, the embodiment of the present application provides a method for starting a memory chip, and the method for starting a memory chip provided by the embodiment of the present application is described below with reference to the accompanying drawings.
As shown in fig. 2, the method for starting up a memory chip may include the following steps 201 to 203.
It should be noted that, in the embodiment of the present application, a method for starting a memory chip provided in the embodiment of the present application is described by taking an example in which at least one memory chip is inserted into a motherboard of a computer device.
201. The computer device obtains the target memory identification based on the first memory connected with the identification chip.
The target memory identifier is used to indicate a target memory chip, and the target memory chip may be any one of at least one memory chip inserted into the motherboard.
Optionally, the identification chip may be any one of a CPLD, an FPGA, and a single chip, and the specific type of the identification chip is not limited herein in the embodiment of the present application. The memory connected to the identification chip may also be implemented in various ways. As a possible implementation, the memory may be a memory chip inside the computer device, that is, the memory may be the memory 12 in fig. 1, for example, the memory 12 may be a ROM. As another possible implementation, the memory may be a memory chip that is extended outside the computer device. For example, the memory may be ROM external to the computer device. The embodiment of the present application does not specifically limit an implementation manner of the memory connected to the identification chip.
Optionally, in the embodiment of the present invention, the computer device may further include a processor, in addition to the at least one memory chip and the identification chip, where the processor is connected to each memory chip inserted in the computer device through a bus. In this case, the process of the computer device acquiring the target memory identifier based on the first storage is as follows: after receiving the memory identification instruction, the processor acquires the target memory identifier from the first memory through the first interface connected with the identification chip.
It is to be understood that the indication information of the target memory chip is used to indicate the memory chip to be booted.
Optionally, the specific process of obtaining the target memory identifier from the first storage through the first interface connected to the identification chip may be as follows: the identification chip simulates a communication protocol of the first interface to acquire a target memory identifier from the first storage, and the processor acquires the target memory identifier from the identification chip through the first interface.
In an actual implementation process, when the computer device obtains the target memory identifier based on the storage connected to the identification chip, the identification chip needs to be initialized first, then the target memory identifier is obtained from the first storage through an Inter-Integrated Circuit (I2C) protocol, and then the processor obtains the target memory identifier from the identification chip through the I2C interface.
202. When the pre-stored memory identification set comprises a target memory identification, the computer equipment acquires a target memory parameter corresponding to the target memory identification, and the target memory parameter is used for starting a target memory chip.
After obtaining the target memory identifier based on the storage connected to the identification chip, the computer device may determine whether the target memory identifier is included in the set of prestored memory identifiers. If the pre-stored memory identifier set includes the target memory identifier, it indicates that the information related to the target memory chip indicated by the target memory identifier, such as the memory parameters for starting the target memory chip, is pre-stored in the computer device. In this case, the computer device may obtain a target memory parameter corresponding to the target memory identifier, so as to be used for starting the target memory chip. If the pre-stored memory identifier set does not include the target memory identifier, it indicates that the relevant information of the target memory chip indicated by the target memory identifier is not pre-stored in the computer device. In this case, the computer device may obtain the pre-stored memory parameters from the memory, and control the starting of the target memory chip according to the pre-stored memory parameters. It is easy to understand that the pre-stored memory parameters may be default general memory parameters (which can be adapted to the memory parameters of various memory chips) for starting the memory chip that has not pre-stored information. Therefore, whether the target memory identification is included in the memory identification set or not can be guaranteed, the target memory chip indicated by the target memory identification can be normally started, and the use of the target memory chip is further guaranteed.
It is understood that the memory for storing the preset memory parameters and the memory connected to the identification chip in step 201 may be the same memory or different memories.
Optionally, the memory parameter corresponding to each memory identifier in the memory identifier set and the memory identifier set is stored in another memory. The first storage is used for storing a target memory identifier, and the second storage is used for storing a memory identifier set and memory parameters corresponding to each memory identifier in the memory identifier set. As shown in fig. 3, the processor includes a Serial Peripheral Interface (SPI) and a Low Pin Count (LPC), the processor is connected to the identification chip through the LPC Interface, the identification chip is connected to the first memory, and the processor is connected to the second memory through the SPI Interface.
It can be understood that the pre-stored memory identifier set includes memory identifiers corresponding to the memory chips.
In an actual implementation process, after the processor receives a chip start instruction, a target memory identifier may be obtained from the first memory through the LPC interface by the identification chip, a memory identifier set may be obtained from the second memory through the SPI interface, and it is determined whether the memory identifier set includes the target memory identifier, and if the pre-stored memory identifier set includes the target memory identifier, a target memory parameter corresponding to the target memory identifier is obtained.
It should be noted that, the above description is given by taking the memory chips as multiple types, where when the memory chips are two types, the computer device obtains the target memory parameter corresponding to the target memory identifier when the pre-stored memory identifier set includes the target memory identifier, and may further include: the processor judges whether the target memory mark is a first preset value or not, and if the target memory mark is the first preset value, the processor acquires a first memory parameter. And if the target memory identifier is not the first preset value, the processor acquires a second memory parameter.
203. And the computer equipment controls the starting of the target memory chip according to the target memory parameters.
Optionally, in a specific implementation, after the processor acquires the target memory parameter, the processor may add the target memory parameter to a pre-stored start algorithm. Thus, the processor can control the starting of the target memory chip according to the starting algorithm added with the target memory parameters.
It can be understood that the starting algorithm is used for starting the memory chips, where parameters in the starting algorithm of each memory chip are not consistent, and therefore, the target memory parameter corresponding to the target memory chip needs to be obtained, and after the target memory parameter is added to the pre-stored starting algorithm, the starting algorithm to which the target memory parameter is added is used to control the starting of the target memory chip.
Optionally, the start-up algorithm is stored in the second storage, and the memory parameter may be stored in a corresponding location in the start-up algorithm. For example, the start algorithm may be stored in one folder of the second storage, each memory parameter may be stored in a next folder of the one folder, and names of folders for storing different memory parameters may be different.
In an actual implementation process, the processor may further load a start algorithm including the target memory parameter according to the target storage location of the target memory parameter to control the start of the target memory chip.
The embodiment of the application provides a starting method and a starting device of a memory chip, a target memory identifier is obtained from a memory connected with an identification chip, when a prestored memory identifier set comprises the target memory identifier, a target memory parameter corresponding to the target memory identifier is obtained, and finally starting of various types of memory chips can be controlled through one starting program according to the target memory parameter, so that various starting programs do not need to be generated and maintained, and cost can be reduced.
Optionally, in this embodiment of the application, with reference to fig. 2, as shown in fig. 4, the step 202 may be specifically implemented by the following steps 204 to 205.
204. And when the pre-stored memory identification set comprises the target memory identification, the processor acquires the target storage position corresponding to the target memory identification according to the mapping relation between the pre-stored memory identification and the storage position.
It is to be understood that the target storage location is the location where the target memory parameter is stored.
And the memory parameters corresponding to the memory parameters are stored in a preset position in the second memory. The processor may determine a storage location of the target memory parameter according to a mapping relationship between a pre-stored memory identifier and the storage location, and obtain a corresponding memory parameter.
Optionally, the memory identifier set includes at least one memory identifier, and one memory identifier is used to indicate one memory chip. Before executing the above steps 201 to 203, the computer device may pre-store the memory identifier set so as to prepare for the booting of the memory chip. In a specific implementation, the processor may first obtain chip information of a memory chip to be stored, determine a memory identifier of the memory chip according to the chip information of the memory chip, and then store the determined memory identifier into the memory identifier set.
Optionally, the chip information is at least one of a chip type, a chip bit width, and a chip capacity of the memory chip. When determining the memory identifier of the memory chip based on the chip information of the memory chip, the processor may use any one of the chip type, the chip bit width, and the chip capacity, or a combination of multiple information as the memory identifier of the memory chip. Of course, the processor may also use other information corresponding to the chip information, such as a binary file, as the memory identifier according to the chip information. The embodiment of the present application does not limit the specific implementation manner of determining the memory identifier based on the chip information.
For example, the chip type of the memory chip may be a manufacturer of the memory chip, the chip bit width of the memory chip may be X8 bit width or X16 bit width, and the capacity of the memory chip may be 4 Gigabytes (GB) or 8GB, and the like.
It is understood that the chip id may be represented by a binary file, and the binary file may be formed according to the chip information of the memory chip, for example, the binary file may be: 011001, wherein the first byte can represent a chip type, the second byte can represent a bit width of the chip, and the third byte can represent a capacity of the chip.
205. And the processor acquires target memory parameters according to the target storage position.
Optionally, before the computer device obtains the target memory identifier based on the preset first storage, the following process may be further performed: the computer equipment acquires the chip information of the memory chip, configures the memory parameters corresponding to the memory chip according to the chip information, stores the memory parameters to a preset storage position, and establishes a mapping relation between each memory identifier in the memory identifier set and the storage position of the memory parameters.
In an actual implementation process, the processor may obtain chip information of a plurality of memory chips in advance, pre-configure memory parameters corresponding to the memory chips according to the obtained chip information, store the memory parameters to a preset position in the memory, and meanwhile, pre-establish a mapping relationship between a memory identifier of each memory chip and a storage position of the memory parameter corresponding to each memory chip.
The scheme provided by the embodiment of the application is mainly introduced from the perspective of a method. In order to implement the above functions, it includes a hardware structure and/or a software module for performing each function. Those of skill in the art would readily appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as hardware or combinations of hardware and computer software. Whether a function is performed as hardware or computer software drives hardware depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
Fig. 5 is a schematic structural diagram of a starting device of a memory chip according to an embodiment of the present disclosure, where the starting device of the memory chip is configured to execute the starting method of the memory chip shown in fig. 2. The starting device of the memory chip is positioned in computer equipment, and the computer equipment comprises: at least one memory chip, discernment chip and the first memory who is connected with discernment chip, the starting drive of this memory chip can include: a first acquisition module 51, a second acquisition module 52, a control module 53 and a configuration module 54.
A first obtaining module 51, configured to obtain a target memory identifier based on a first storage connected to the identification chip, where the target memory identifier is used to indicate a target memory chip, the target memory chip is any one of at least one memory chip, and the first storage stores the target memory identifier;
a second obtaining module 52, configured to obtain a target memory parameter corresponding to the target memory identifier when the pre-stored memory identifier set includes the target memory identifier, where the target memory parameter is used to start a target memory chip;
and a control module 53, configured to control starting of the target memory chip according to the target memory parameter.
In one possible implementation manner of the present application, the computer device further includes: the processor includes a first interface, the processor is connected to the identification chip through the first interface, and the first obtaining module 51 is specifically configured to:
and after receiving the memory identification instruction, acquiring a target memory identifier from the first memory based on the first interface and the identification chip.
In a possible implementation manner of the present application, the first obtaining module 51 is specifically configured to:
acquiring a target memory identifier from a first memory based on a communication protocol of a first interface simulated by a recognition chip;
and acquiring a target memory identifier from the identification chip based on the first interface.
In a possible implementation manner of the present application, the computer device further includes a second memory, the processor further includes a second interface, the processor and the second memory are connected through the second interface, and the second obtaining module 52 is specifically configured to:
acquiring a target storage position corresponding to a target memory identifier according to a mapping relation between pre-stored memory identifiers and storage positions, wherein the target storage position is a position for storing target memory parameters;
and acquiring target memory parameters according to the target storage position based on the second interface.
In a possible implementation manner of the present application, the second obtaining module 52 is further configured to:
when the memory identification set does not comprise the target memory identification, acquiring preset memory parameters;
the control module is further configured to: and controlling the starting of the target memory chip according to the preset memory parameters.
In one possible implementation manner of the present application, the control module 53 is specifically configured to:
adding the target memory parameter into a prestored starting algorithm;
and controlling the starting of the target memory chip according to the starting algorithm added with the target memory parameters.
In a possible implementation manner of the present application, the memory identifier set includes at least one memory identifier, where one memory identifier is used to indicate one memory chip, the apparatus further includes a configuration module 54, and the configuration module 54 is configured to:
acquiring chip information of a memory chip;
determining the memory identification of the memory chip according to the chip information of the memory chip;
and storing the memory identification into the memory identification set.
In one possible implementation manner of the present application, the configuration module 54 is further configured to:
configuring memory parameters corresponding to the memory chip according to the chip information of the memory chip;
and storing the memory parameters to a preset storage position, and establishing a mapping relation between each memory identifier in the memory identifier set and the storage position of the memory parameters.
In one possible implementation manner of the present application, the chip information includes at least one of the following: chip type, chip bit width, and chip capacity.
Certainly, the starting device of the memory chip provided in the embodiment of the present application includes, but is not limited to, the above modules.
Another embodiment of the present application further provides a computer-readable storage medium, where the computer-readable storage medium stores computer instructions, and when the computer instructions are executed on a starting apparatus of a memory chip, the starting apparatus of the memory chip is enabled to execute each step executed by the starting method of the memory chip in the method flow shown in the foregoing method embodiment.
Another embodiment of the present application further provides a chip system, where the chip system is applied to a starting device of a memory chip. The chip system includes one or more interface circuits, and one or more processors. The interface circuit and the processor are interconnected by a line. The interface circuit is configured to receive signals from the memory of the startup device of the internal memory chip and to send signals to the processor, the signals including computer instructions stored in the memory. When the processor executes the computer instructions, the starting device of the memory chip executes each step executed by the starting method of the memory chip in the method flow shown in the above method embodiment.
In another embodiment of the present application, a computer program product is further provided, where the computer program product includes computer instructions, and when the computer instructions are run on a starting apparatus of a memory chip, the starting apparatus of the memory chip executes each step executed by the starting method of the memory chip in the method flow shown in the foregoing method embodiment.
In the above embodiments, the implementation may be wholly or partially realized by software, hardware, firmware, or any combination thereof. When implemented using a software program, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. The processes or functions according to the embodiments of the present application are generated in whole or in part when the computer-executable instructions are loaded and executed on a computer. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored on a computer readable storage medium or transmitted from one computer readable storage medium to another computer readable storage medium, for example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wire (e.g., coaxial cable, fiber optic, Digital Subscriber Line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.). Computer-readable storage media can be any available media that can be accessed by a computer or can comprise one or more data storage devices, such as servers, data centers, and the like, that can be integrated with the media. The usable medium may be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., Solid State Disk (SSD)), among others.
The above are only specific embodiments of the present application. Those skilled in the art can conceive of changes or substitutions based on the specific embodiments provided in the present application, and all such changes or substitutions are intended to be included within the scope of the present application.

Claims (20)

1. A starting method of a memory chip is applied to computer equipment, and the computer equipment is characterized by comprising the following steps: at least one memory chip, discernment chip and with the first memory that discerns the chip connection include:
acquiring a target memory identifier based on a first memory connected with the identification chip, wherein the target memory identifier is used for indicating a target memory chip, the target memory chip is any one of the at least one memory chip, and the target memory identifier is stored in the first memory;
when the pre-stored memory identification set comprises the target memory identification, acquiring a target memory parameter corresponding to the target memory identification, wherein the target memory parameter is used for starting the target memory chip;
and controlling the starting of the target memory chip according to the target memory parameter.
2. The method of claim 1, wherein the computer device further comprises: the processor comprises a first interface, the processor is connected with the identification chip through the first interface, and the obtaining of the target memory identifier based on the first memory connected with the identification chip comprises:
and after a memory identification instruction is received, acquiring the target memory identifier from the first memory based on the first interface and the identification chip.
3. The method of claim 2, wherein obtaining the target memory identifier from the first storage based on the first interface and the identification chip comprises:
acquiring the target memory identifier from the first storage based on the communication protocol of the first interface simulated by the identification chip;
and acquiring the target memory identifier from the identification chip based on the first interface.
4. The method according to claim 2, wherein the computer device further includes a second storage, the processor further includes a second interface, the processor and the second storage are connected through the second interface, and the obtaining the target memory parameter corresponding to the target memory identifier includes:
acquiring a target storage position corresponding to the target memory identifier according to a mapping relation between pre-stored memory identifiers and storage positions, wherein the target storage position is a position for storing the target memory parameters;
and acquiring the target memory parameters according to the target storage position based on the second interface.
5. The method according to claim 1 or 2, characterized in that the method further comprises:
when the memory identifier set does not comprise the target memory identifier, acquiring preset memory parameters;
and controlling the starting of the target memory chip according to the preset memory parameters.
6. The method according to claim 1 or 2, wherein the controlling the booting of the target memory chip according to the target memory parameter comprises:
adding the target memory parameter into a prestored starting algorithm;
and controlling the starting of the target memory chip according to the starting algorithm added with the target memory parameters.
7. The method according to claim 1 or 2, wherein the memory id set includes at least one memory id, and one memory id is used to indicate one memory chip, the method further comprising:
acquiring chip information of the memory chip;
determining the memory identification of the memory chip according to the chip information of the memory chip;
and storing the memory identification into the memory identification set.
8. The method of claim 6, further comprising:
configuring memory parameters corresponding to the memory chip according to the chip information of the memory chip;
and storing the memory parameters to a preset storage position, and establishing a mapping relation between each memory identifier in the memory identifier set and the storage position of the memory parameters.
9. The method of claim 8, wherein the chip information comprises at least one of: chip type, chip bit width, and chip capacity.
10. A memory chip starting device is located in a computer device, and the computer device comprises: at least one memory chip, discernment chip and with the first memory that discerns the chip connection include:
a first obtaining module, configured to obtain a target memory identifier based on a first storage connected to the identification chip, where the target memory identifier is used to indicate a target memory chip, the target memory chip is any one of the at least one memory chip, and the target memory identifier is stored in the first storage;
a second obtaining module, configured to obtain a target memory parameter corresponding to the target memory identifier when a pre-stored memory identifier set includes the target memory identifier, where the target memory parameter is used to start the target memory chip;
and the control module is used for controlling the starting of the target memory chip according to the target memory parameters.
11. The apparatus of claim 10, wherein the computer device further comprises: the processor comprises a first interface, the processor is connected with the identification chip through the first interface, and the first acquisition module is specifically configured to:
and after a memory identification instruction is received, acquiring the target memory identifier from the first memory based on the first interface and the identification chip.
12. The apparatus of claim 11, wherein the first obtaining module is specifically configured to:
acquiring the target memory identifier from the first storage based on the communication protocol of the first interface simulated by the identification chip;
and acquiring the target memory identifier from the identification chip based on the first interface.
13. The apparatus according to claim 11, wherein the computer device further includes a second memory, the processor further includes a second interface, the processor and the second memory are connected via the second interface, and the second obtaining module is specifically configured to:
acquiring a target storage position corresponding to the target memory identifier according to a mapping relation between pre-stored memory identifiers and storage positions, wherein the target storage position is a position for storing the target memory parameters;
and acquiring the target memory parameters according to the target storage position based on the second interface.
14. The apparatus of claim 10 or 11, wherein the second obtaining module is further configured to:
when the memory identifier set does not comprise the target memory identifier, acquiring preset memory parameters;
the control module is further configured to: and controlling the starting of the target memory chip according to the preset memory parameters.
15. The apparatus according to claim 10 or 11, wherein the control module is specifically configured to:
adding the target memory parameter into a prestored starting algorithm;
and controlling the starting of the target memory chip according to the starting algorithm added with the target memory parameters.
16. The apparatus according to claim 10 or 11, wherein the memory id set includes at least one memory id, and one memory id is used to indicate one memory chip, and the apparatus further includes a configuration module, and the configuration module is configured to:
acquiring chip information of the memory chip;
determining the memory identification of the memory chip according to the chip information of the memory chip;
and storing the memory identifier into the memory identifier set.
17. The apparatus of claim 16, wherein the configuration module is further configured to:
configuring memory parameters corresponding to the memory chips according to the chip information of the memory chips;
and storing the memory parameters to a preset storage position, and establishing a mapping relation between each memory identifier in the memory identifier set and the storage position of the memory parameters.
18. The apparatus of claim 17, wherein the chip information comprises at least one of: chip type, chip bit width, and chip capacity.
19. A computer device comprising a memory and a processor, the memory storing a computer program which, when executed by the processor, implements the startup method of a memory chip according to any one of claims 1 to 9.
20. A computer-readable storage medium, characterized in that the computer-readable storage medium stores a computer program which, when executed by a processor, implements the startup method of a memory chip according to any one of claims 1 to 9.
CN202210069376.2A 2022-01-20 2022-01-20 Memory chip starting method and device, computer equipment and storage medium Active CN114579198B (en)

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