CN114968864B

CN114968864B - Verification environment construction method, chip verification method and system

Info

Publication number: CN114968864B
Application number: CN202210901657.XA
Authority: CN
Inventors: 贾亚平; 杨庆娜; 戴梅芝; 王红灵; 王忠弈
Original assignee: Phytium Technology Co Ltd
Current assignee: Phytium Technology Co Ltd
Priority date: 2022-07-28
Filing date: 2022-07-28
Publication date: 2022-10-25
Anticipated expiration: 2042-07-28
Also published as: CN114968864A

Abstract

The invention provides a method for building a verification environment, a method and a system for verifying a chip. The descriptor table indicates filling positions of data of each part of the DMA descriptor in a standard mode, so that the DMA descriptor is displayed in front of a user more intuitively, the DMA descriptor generated by the user based on the descriptor table has better inheritability, other users can modify the DMA descriptor by modifying the data in the descriptor table, the descriptor table is simple and easy to use, complete data writing and generating operation of the DAM descriptor is not required to be performed once for each DMA operation in the building process of the verification environment, the generation efficiency of the DMA descriptor is improved, and the building efficiency of the whole verification environment is improved.

Description

Verification environment construction method, chip verification method and system

Technical Field

The present disclosure relates to functional verification technologies in the field of computer applications, and in particular, to a method for building a verification environment, a method and a system for verifying a chip.

Background

Functional Verification (Functional Verification) is a Verification process in electronic design automation to verify whether a digital circuit conforms to a predetermined standard function.

When a DUT (Design Under Test) based on protocols such as SATA (Serial Advanced Technology Attachment), USB (Universal Serial Bus), MAC (Media Access Control), and custom DMA (Direct Memory Access) controllers is verified, a required DMA descriptor needs to be constructed in a storage model of a verification link or a Memory of a chip before the controller is started.

At present, when a DMA descriptor is constructed in a functional verification process, a complete DMA descriptor construction operation needs to be executed for each DMA operation, so that the efficiency of functional verification is low.

Disclosure of Invention

In view of the above, the embodiments of the present specification are directed to providing a method for building an authentication environment to improve the inheritance and usability of a constructed DMA descriptor.

In a first aspect, the present specification provides a method for building a verification environment, which is applied to a terminal device, where a descriptor table is stored in the terminal device, and the method for building the verification environment includes:

obtaining a constructed model of a Direct Memory Access (DMA) descriptor generated based on initial data, wherein the initial data is carried in a descriptor table, the descriptor table comprises a first part and a second part, the first part is used for storing first content of the initial data, the second part is used for storing second content of the initial data, the first content and the second content are associated, the first content is used for describing format information of the DMA descriptor, and the second content is used for describing data block information of the DMA descriptor; the construction model of the DMA descriptor comprises a construction task or a construction function of the DMA descriptor;

integrating the build model of the DMA descriptor into a verification environment of a DUT;

calling a construction model of the DMA descriptor, generating the DMA descriptor, wherein the DMA descriptor is associated with a DMA operation, the construction task of the DMA descriptor is used for a UVM-based verification environment, and the construction function of the DMA descriptor is used for a bare computer system level verification environment.

The method for building the verification environment generates a DMA descriptor building model based on initial data borne by a descriptor table, and after the DMA descriptor building model is integrated into the verification environment of a DUT, the DMA descriptor building model is called to generate the DMA descriptor. The descriptor table indicates filling positions of data of each part of the DMA descriptor in a standard mode, so that the DMA descriptor is displayed in front of a user more intuitively, the DMA descriptor generated by the user based on the descriptor table has better inheritability, namely, other subsequent users can better understand the DMA descriptor generated by other users through the descriptor table, and other users can modify the DMA descriptor through modifying the data in the descriptor table.

In a possible embodiment, the descriptor table comprises a plurality of sub-tables, the first part and the second part being located in different sub-tables.

The first part and the second part are located in different sub-tables, so that the partition of the descriptor table can be more definite, and a user can conveniently know the data attribution of the DMA descriptor filled in each part. In addition, the first part and the second part are distributed in different sub-tables, so that a plurality of cache data parts filled in the second part can share the descriptor part filled in the first part, the filling difficulty of the descriptor table is reduced, and the usability is improved.

In one possible implementation, the first content includes a type of the DMA descriptor and a command format of the DMA descriptor, and the second content includes the type of the DMA descriptor, a specific format of a data block of the DMA descriptor, and an initial value;

the first part comprises a first identification area and a command area, and the second part comprises a second identification area and a data area;

the first identification area and the second identification area are both used for bearing the type of the DMA descriptor, the command area is used for bearing the command format of the DMA descriptor, the data area is used for bearing the specific format and initial value of the data block of the DMA descriptor, and the type of the same DMA descriptor borne in the first identification area and the second identification area is used for associating the command format with the specific format and initial value of the data block in at least one DMA descriptor.

When the first part and the second part are located in different sub-tables, the descriptor part (i.e. the first content) of the DMA descriptor and the at least one data buffer part (i.e. the second content) may be associated through the device column of the first identification area and the device column of the second identification area, or, it may be said that the format information of the DMA descriptor is associated with at least one of the data blocks. For example, when the descriptor parts of the DMA descriptors are the same and the databuffer parts are different, multiple identical device or protocol names may be filled in the device column in the second part, so as to associate the multiple databuffer parts with the same device column in the first part, and thus, one descriptor part may be associated with multiple databuffer parts, thereby reducing filling complexity and improving usability.

In a possible embodiment, the command area is also used to indicate the declaration method of the name and initial value of the field segment of the DMA descriptor, the filling of the field of the variable parameters of the DMA descriptor, the filling of the fixed value field segment of the command format, the declaration of the field segment name and the declaration of the DMA descriptor command with data.

Since the command format is the key for determining whether the generated data is correct in the descriptor part of the DMA descriptor, the command area also defines the declaration method of the name and initial value of the field segment of the DMA descriptor in the command format, the filling method of the field of the variable parameter of the DMA descriptor, the filling method of the fixed value field segment of the command format, the declaration method of the field segment name, and the declaration method of the DMA descriptor command with data, which is beneficial to the filling of the specified command format and facilitates the understanding of other users on the DMA descriptor.

In a possible embodiment, the data field is further used to indicate the filling of fixed values, parameter variables to be operated on, and data field segments to be randomized in the data blocks of the DMA descriptor.

Similarly, the specification of the data area for the filling mode of the fixed value, the filling mode of the parameter variable to be operated and the filling mode of the data field segment to be randomized in the data block (or called the cache data part) of the DMA descriptor is beneficial to the filling of the specification command format and is convenient for other users to understand the DMA descriptor.

In one possible implementation, the method for building the verification environment further includes:

and if the data filling mode of the initial data loaded in the descriptor table is not the small-end mode, sending first prompt information, wherein the first prompt information is used for prompting that the data filling mode of the initial data is wrong.

Because the DMA descriptors of various protocols indicate that the documents are all in the small-end mode, the computer usually stores data in the small-end mode, and engineers are also used to analyze data in the small-end mode, the data is filled in the small-end mode, so that the learning cost of users is reduced, and the usability of the method is improved. In an embodiment of the present specification, the method for establishing a verification environment may further perform verification of a data filling mode on the initial data, and send first prompt information to prompt a user to change the data filling mode when the data filling mode of the initial data is a non-small-end mode.

In a possible implementation manner, the method for building the verification environment further includes:

and if the first content is borne on the second part and/or the second content is borne on the first part, sending out second prompt information, wherein the second prompt information is used for prompting that the data filling position is wrong.

When the construction method of the verification environment can also verify the filling position of the initial data and send out second prompt information when the filling position of the initial data does not meet the corresponding indication of the descriptor table, the method is beneficial to helping a user to find problems in time and improving the filling efficiency.

In one possible implementation, the verification environment further includes: the DUT controller, the method for building the verification environment further comprises:

starting the DUT controller to enable the DUT controller to perform DMA operation based on the DMA descriptor, and verifying the DMA descriptor according to the DMA operation result.

In a second aspect, an embodiment of the present specification provides a chip verification method, which is applied to a verification environment built according to any one of the verification environment building methods described above, where the chip verification method includes:

and performing functional verification on at least one DUT (device under test) included in the chip by using the verification environment and the DMA descriptor.

In a third aspect, an embodiment of the present specification further provides a verification system for a chip, where the verification system includes a verification environment built by the verification environment building method according to any one of the above, and the verification environment is configured to perform functional verification on at least one DUT included in the chip by using the DMA descriptor.

In one possible implementation, the verification environment includes a UVM environment or a bare metal system level verification environment.

In a fourth aspect, an embodiment of the present specification further provides a device for building an authentication environment, where a descriptor table is stored in the terminal device, and the device for building an authentication environment includes:

an obtaining module, configured to obtain a constructed model of a Direct Memory Access (DMA) descriptor generated based on initial data, where the initial data is carried in a descriptor table, the descriptor table includes a first part and a second part, the first part is used for storing a first content of the initial data, the second part is used for storing a second content of the initial data, the first content and the second content are associated, the first content is used for describing format information of the DMA descriptor, and the second content is used for describing data block information of the DMA descriptor; the construction model of the DMA descriptor comprises a construction task or a construction function of the DMA descriptor;

an integration module to integrate the build model of the DMA descriptor into a verification environment of a DUT;

and the calling module is used for calling the construction model of the DMA descriptor and generating the DMA descriptor, and the DMA descriptor is associated with one DMA operation.

In a fifth aspect, the embodiments of the present specification further provide a computing device, where the computing device has a function of implementing part or all of the design of the method in the first aspect. These functions may be implemented by hardware, or by hardware executing corresponding software. The hardware or software includes one or more units corresponding to the above functions.

In a sixth aspect, embodiments of the present specification further provide a computing device comprising an input output interface, a processor, and a memory. The processor is configured to control the input/output interface to input or output information, the memory is configured to store a computer program, and the processor is configured to call and run the computer program from the memory, so that the computing device executes the method of the first aspect.

In a seventh aspect, a computer program product is provided, the computer program product comprising: computer program code which, when run on a computer, causes the computer to perform the method of the above-mentioned aspects.

In an eighth aspect, a computer-readable medium is provided, which stores program code that, when run on a computer, causes the computer to perform the method in the above-mentioned aspects.

One or more embodiments of the present specification provide a method for building a verification environment, a method for verifying a chip, and a system, where the method for building a verification environment generates a DMA descriptor building model based on initial data loaded in a descriptor table, and generates a DMA descriptor by calling the DMA descriptor building model after the DMA descriptor building model is integrated into a verification environment of a DUT. The descriptor table indicates filling positions of data of each part of the DMA descriptor in a standard mode, so that the DMA descriptor is displayed in front of a user more intuitively, the DMA descriptor generated by the user based on the descriptor table has better inheritability, namely, other subsequent users can better understand the DMA descriptor generated by other users through the descriptor table, and other users can modify the DMA descriptor through modifying the data in the descriptor table.

Drawings

Fig. 1 is a schematic structural diagram of a UVM environment according to an embodiment of the present disclosure.

FIG. 2 is a schematic structural diagram of a logical system-level verification environment according to an embodiment of the present disclosure.

Fig. 3 is a flowchart illustrating a method for building a verification environment according to an embodiment of the present disclosure.

Fig. 4 is a schematic structural diagram of a computing device according to an embodiment of the present specification.

Detailed Description

The technical solutions in the embodiments of the present specification will be clearly and completely described below with reference to the drawings in the embodiments of the present specification, and it is obvious that the described embodiments are only a part of the embodiments of the present specification, and not all of the embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments in the present specification without any creative effort belong to the protection scope of the present specification.

The method for building a verification environment provided in this specification embodiment may be applied to function verification processes of different protocols (where the DUT may be, for example, an Integrated Circuit (Integrated Circuit) or a chip) in a module-level environment and a system-level environment of a DUT (where the different protocols may be, for example, SATA, USB, MAC, universal DMAC (Direct Memory Access Control), MMCSD (Multi Media Card/Secure Digital, digital Secure Memory Card), and the like), and is particularly applicable to function verification of an Integrated Circuit that requires DMA descriptors for DUTs in the module-level environment and the system-level environment. Functional verification is used to verify the functionality of the DUT. Functional verification exists in the sense that it continually provides iterative key ideas to the design process of the DUT. For example, the problems found in the function verification process, such as performance unsatisfied, design code function bug, and integration error, can be fed back to the design process to improve the efficiency of the design process.

First, several terms referred to in this specification are explained:

a Universal Verification Methodology (UVM) Verification framework inherits a Verification platform built by a hardware description and Verification language (System Verilog, SV). The UVM-based functional verification system is intended to create a general verification system (abbreviated as "UVM verification system"), so that a verification engineer can build a UVM environment by using the UVM verification system to perform functional verification on a DUT. In order to ensure the universality of the UVM verification system, the functional verification process is divided into separate sub-processes in the UVM verification system, and different sub-processes can be realized through different UVM components. In this way, when a verification engineer builds a UVM environment for verifying different DUTs, the verification engineer may select an appropriate UVM component from the UVM verification system. Common UVM components may include a driver (driver), a stimulus router (sequence), a monitor (monitor), an agent (agent), a reference model (reference model), a score board (scoreboard), a UVM container, a verification top layer (test top), and the like.

The MAC defines how data frames are transmitted over the medium. The MAC controller is used to implement a function of a lower sublayer of a data link layer in an OSI (open system interconnection) model, that is, the MAC controller is mainly responsible for controlling and connecting a physical medium of a physical layer, and can implement a data transceiving function. The structure of the OSI model may include a processor, a MAC controller, and a PHY (Physical Layer) chip, wherein the PHY chip may be used to implement the functionality of the first Layer (i.e., the Physical Layer) in the OSI model. The processor may be configured to implement the functionality of the third and higher layers in the OSI model, namely the network layer, the transport layer, the session layer, the presentation layer and the application layer. The network layer may also be referred to as an Intellectual Property core (IP) layer.

SATA is a serial hardware driver interface specification based on industry standard, and the SATA bus uses embedded clock frequency signals, has stronger error correction capability than before, can check transmission instructions (not only data), and if errors are found, the data can be automatically corrected, so that the reliability of data transmission is improved.

USB is an external high-speed serial bus standard used to standardize the connection and communication of computer systems to external devices. The USB has the advantages of high transmission speed, convenience in use, support for hot plug, flexibility in connection, independent power supply and the like, and can be connected with various peripherals such as a keyboard, a mouse, a large-capacity storage device and the like.

DMA is a computer technology for directly accessing data from a memory and an external device, such as a memory access, and the use of DMA has an advantage in that it directly serves the external device without intervention of a CPU (Central Processing Unit), so that the CPU can process other transactions, thereby improving the efficiency of the system.

The DMA descriptor may be a set of data stored in memory (or memory model) to initiate a series of operations for DMA. The DMA descriptor contains the same parameters as those typically programmed into the DMA control register set. However, the DMA descriptor may also allow multiple DMA operation sequences to be chained together. In DMA operations based on DMA descriptors, one DMA channel can be programmed, and another DMA transfer can be automatically set and initiated after the current sequence of operations is completed. The DMA descriptor based approach provides maximum flexibility for managing DMA transfers in the system.

Taking SATA as an example, fig. 1 is a block level verification environment provided in this specification, and fig. 2 is a system level verification environment provided in this specification. Before specifically describing FIGS. 1 and 2, a description of a module-level verification environment and a system-level verification environment will be provided. The module level verification means that the DUT is a part of a chip, the DUT cannot directly load a program and run like a CPU, and a correct sequence must be input at a module interface by means of a UVM environment, so that whether the function is correct or not is judged according to the internal signal state and output of the module. In the process of performing the verification of SATA, USB, MAC, etc., it is generally necessary to construct a correct DMA descriptor in a UVM environment for correct data transmission, that is, in a module-level verification environment, the DMA descriptor is generally constructed in SV language.

The system level verification means that the design to be tested is a whole complete chip, at this time, the DUT can directly load a program and run the program, but the simulation speed of software is generally slow, so the general system level software simulation does not add an operating system for verification, and is generally a relatively simple test for loading instructions and running.

Fig. 1 illustrates a module-level Verification environment using SATA as an example, where a DUT and a UVM container are deployed in a UVM environment, the DUT includes a SATA controller and a corresponding PHY (Physical Layer), a downstream interface of the DUT is a differential signal and is connected to a corresponding SATA _ VIP (Verification intellectual property kernel), which may be a hard disk. The upstream interface of the DUT includes a slave interface for register access and a master interface for DMA access. The UVM container mainly comprises a UVM component of a Master Driver (Master Driver), a slave Driver (slave Driver), a sequence manager (sequence) and a memory model of a memory. After the UVM environment is operated, firstly, data of the DMA descriptor needs to be written into a storage model of the UVM container at a top layer of the verification environment, and then the DUT is configured through the host driver, so that initialization and data read-write enabling of the DUT are completed. After receiving the enable signal, the DUT acquires the DMA descriptor in the storage model from the host interface through DMA access, and completes the data movement between the SATA _ VIP and the storage model according to the DMA descriptor.

Fig. 2 shows a (bare computer) system level verification environment with SATA as an example, where the DUT is a top Chip layer and mainly includes a clock and reset module, a SATA controller and a corresponding PHY, a Network On Chip (NOC), a processor core, a Low Speed peripheral (LSD) controller, a DDR (Double Data Rate) controller and a corresponding PHY. The chip is externally connected with a hard disk model (SATA _ VIP), a Flash memory (Flash) and a memory (memory), instructions and data operated by the chip are stored in the Flash memory, the memory is the internal memory of the chip, and the SATA _ VIP is the storage hard disk of the chip. Before the chip is started, the top layer of the verification environment needs to store instruction data required by the chip into a flash memory, wherein the instruction data and the data comprise DMA descriptors required by SATA. After the chip is started, the processor core executes the instructions and data fetched from the flash memory, completes the clock configuration of the chip, the system reset and the initialization of relevant modules, wherein the clock configuration, the system reset and the initialization of relevant modules comprise the writing of DMA descriptors required by the SATA into the memory, and the initialization and the enabling of the SATA are completed. And finally, after the DMA descriptor in the memory is acquired by the SATA, the data transfer between the SATA _ VIP and the memory is completed.

The USB and MAC based verification environment is similar to the SATA based verification environment, and details thereof are not repeated herein.

In both the module-level verification environment shown in fig. 1 and the bare computer system-level verification environment shown in fig. 2, a DMA descriptor needs to be constructed, and unlike the real chip and operating system environment, the command of the DMA descriptor can be constructed by general-purpose driver software, there are two methods commonly used in the verification environment for constructing the DMA descriptor: one is to get the data directly according to the DMA descriptor format and requirement and then write it into the storage model, but since the DMA descriptor constructed by this method exists directly in the form of data, it is not easy to modify and reuse, so it is not generally recommended to adopt.

And the other is writing an SV (System Verilog) -based task or a C-based function according to the DMA descriptor format, setting a corresponding field segment as a parameter value, and completing the writing of the DMA descriptor into the memory model by calling the task or the function. This method usually requires the writing of SV tasks or C-based functions for each DMA descriptor, which is inefficient.

In order to improve the inheritance and the usability of the constructed DMA descriptor, so that a user can intuitively know the format of the DMA descriptor and can allow the user to modify and utilize the constructed DMA descriptor based on the previously constructed DMA descriptor, the embodiment of the present specification provides a method for constructing an authentication environment, which is applied to a terminal device, in which a descriptor table is stored, and the terminal device can refer to any device with operation and storage functions, for example: a desktop computer, a notebook computer, a tablet computer, a smart phone or other intelligent communication devices capable of implementing network connection, which is not limited herein.

The method for establishing the verification environment is applied to terminal equipment, the descriptor table is stored in the terminal equipment, and specifically, with reference to fig. 3, the method for establishing the verification environment comprises the following steps:

and (3) table initialization process:

s101: a descriptor table is created, the descriptor table configured as a first portion and a second portion.

The first part and the second part may be divided according to a structure of the DMA descriptor, the first part may be used to indicate a filling location of a first content of the DMA descriptor (for example, data of a descriptor part may be used, and since this part is generally used to define a format of the DMA descriptor, it may also be said that the data of the first content/descriptor part is used to describe format information of the DMA descriptor), and the second part may be used to indicate a filling location of a second content of the DMA descriptor (for example, data of a databuffer part may be used).

The first content may include a type of the DMA descriptor and a command format of the DMA descriptor, and the second content may include the type of the DMA descriptor, a specific format of a data block of the DMA descriptor, and an initial value.

The first portion may include a first identification area and a command area, and the second portion includes a second identification area and a data area. The second portion may include a second identification area and a data area.

The first identification area and the second identification area are both used for bearing the type of the DMA descriptor, the command area is used for bearing the command format of the DMA descriptor, the data area is used for bearing the specific format and initial value of the data block of the DMA descriptor, and the type of the same DMA descriptor borne in the first identification area and the second identification area is used for associating the command format with the specific format and initial value of the data block in at least one DMA descriptor. The type of the DMA descriptor includes at least one of a device to which the DMA descriptor belongs and a protocol to which the DMA descriptor belongs. In an optional embodiment, the first identification area includes a device column and a descriptor _ name column, where the device column and the descriptor _ name column are used to indicate a type of the DMA descriptor and a filling position of the identity of the DMA descriptor, respectively.

The command area is used to indicate a filling position of a command format of the DMA descriptor, and the command area may specifically include a BYTE3 (BYTE 3 for identifying a data field) column, a BYTE2 column, a BYTE1 column, and a BYTE0 column, where the BYTE3 column, the BYTE2 column, the BYTE1 column, and the BYTE0 column are used to indicate filling contents of BYTE3, BYTE2, BYTE1, and BYTE0, respectively, of the command format of the DMA descriptor.

As described above, the second identification area is used to indicate a type of the DMA descriptor and a filling position of a data type of the DMA descriptor, and the type of the DMA descriptor includes at least one of a device and a protocol to which the DMA descriptor belongs, similarly to the first identification area. The data type of the DMA descriptor is used for characterizing the type of the initialization task or function name for generating the DMA descriptor data. Optionally, the second identifier region may include a device column and a type column, the device column of the second identifier region is used to indicate a filling position of the type of the DMA descriptor, the device column of the second identifier region is the same as the filling content used for indicating by the device column of the first identifier region, and in an actual application, the device column of the first identifier region and the device column of the second identifier region may be paired to implement association between first content (e.g., a descriptor part) and second content (e.g., a data buffer part) of the DMA descriptor.

In particular, the descriptor table may include a plurality of sub-tables, and when the first part and the second part are located in different sub-tables, the descriptor section and the at least one data buffer section of the DMA descriptor may be associated through the device column of the first identification area and the device column of the second identification area, and more particularly, the command format of the DMA descriptor may be associated with the specific format and the initial value of at least one of the data blocks. For example, when the descriptor parts of the DMA descriptors are the same and the databuffer parts are different, multiple identical device or protocol names may be filled in the device column in the second part, so as to associate the multiple databuffer parts with the same device column in the first part, and thus, one descriptor part may be associated with multiple databuffer parts, thereby reducing filling complexity and improving usability.

By creating the descriptor table comprising the first part and the second part and configuring the filling contents used for indication respectively in the first part and the second part, the filling specifications of the descriptor (descriptor) part and the data buffer (cache data) part of the DMA descriptor can be improved, so that a subsequent user can know the contents contained in the DMA descriptor conveniently, the subsequent user can add the data/contents of the DMA descriptor conveniently according to new requirements, and the descriptor table is normalized into the first part and the second part, so that the DMA descriptor construction function or task generated according to the descriptor table subsequently can be simplified, and the verification efficiency of the DUT can be improved.

Since the DMA descriptors of various protocols describe the small-end mode adopted by the document, the computer usually adopts the small-end mode for data storage, and the engineer is also used to analyze the data in the small-end mode, in an embodiment of the present specification, the method for building the verification environment further includes: and if the data filling mode of the initial data loaded in the descriptor table is not the small-end mode, sending first prompt information, wherein the first prompt information is used for prompting that the data filling mode of the initial data is wrong. The small-end mode means that the high byte of data is stored in the high address of the memory, and the low byte of data is stored in the low address of the memory, specifically, in the first part and the second part, that is, the high byte data is filled from the left side of each row, and the low byte data is filled from the upper side of each column. Optionally, of course, in some embodiments of the present specification, the first part and the second part are further used to indicate that the data filling mode is a big-end mode, so as to meet the requirement of more application scenarios and improve the applicability of the DMA descriptor generation method.

When the first and second parts indicate the data filling pattern, after the DMA descriptor data (data of a descriptor part and data of a data buffer part) is acquired, the filling position of the acquired DMA descriptor data may be checked to determine whether or not the acquired DMA descriptor data satisfies the data filling pattern indicated by the first and second parts. When the obtained DMA descriptor data does not satisfy the data filling pattern indicated by the first part or the second part (for example, the data filling pattern of the initial data carried in the descriptor table is not in a small-end mode), a first prompt message may be issued, where the first prompt message is used to prompt that the DMA descriptor data filling pattern is incorrect.

Optionally, in an embodiment of the present specification, the method for building a verification environment further includes:

and if the first content is borne on the second part and/or the second content is borne on the first part, sending second prompt information, wherein the second prompt information is used for prompting data filling position errors.

Similarly, when the first content and/or the second content are/is carried on the wrong part (for example, the first content is carried on the second part and the second content is carried on the first part), a second prompt message may be sent to prompt the user that the data filling position is wrong, so as to help the user to quickly modify the data filling position.

In the descriptor part of the DMA descriptor, the command format is the key to decide whether the generated data is correct, and therefore, in one embodiment of the present specification, data filling in the command area of the first part is also restricted. These limitations include:

1. the command field is also used to indicate the filling location and the method of declaring the name and initial value of the field segment of the DMA descriptor, e.g., for a field segment of a DMA descriptor, the name and initial value of the field segment may be declared at its highest bits, and computer symbols including, but not limited to, ":" and "=" symbols may be used to convey different meanings as desired when declared.

2. The command area is also used to indicate the way in which the fields of the variable parameters of the DMA descriptor are filled, for example for the fields of the variable parameters, the computer symbol ":" can be used to distinguish, the symbol being preceded by a parameter variable and also indicating the name of the DMA descriptor to the field segment, the symbol being followed by the initial value of the parameter variable. Of course, other computer symbols can be used for distinguishing according to actual needs.

3. The command area is also used to indicate the way in which a fixed value field segment of the command format is filled, for example for a fixed value field segment, a distinction can be made using the symbol "=", the symbol preceding merely indicating the name of the DMA descriptor to the field segment, the symbol following by a fixed value for the field segment.

4. The command area is also used for indicating the declaration mode of the domain segment name, for example, when declaring the domain segment name, only the name of the domain segment may be declared, and the name and bit width of the domain segment may also be declared. That is, for domain segment A, which is a to b wide, the domain segment may be declared at the a bit of the descriptor table using A or A [ a: b ].

5. The command field is also used to indicate the way in which the DMA descriptor of the tape data is asserted, e.g., for a DMA descriptor of the tape data, there is a field segment that points to the start address of the data, also indicated by the ":" symbol, but which has three values, representing the domain name, the initial value, and the name of the data block. The name of the data block is associated with the databuffer table, and the descriptor command is ensured to be in one-to-one correspondence with the data.

In light of the above limitations, one embodiment of the present specification provides a partial example of the first part of an exemplary descriptor table, referred to as table 1.

Table 1 first part of descriptor table

In table 1, the device column and the descriptor _ name column are the first identification area of the first part of the descriptor table, and the device column is used to indicate the filling position of the type of the DMA descriptor, that is, the gmac characterizes the data of the DMA descriptor belonging to the device gmac, which is filled in the subsequent descriptor _ name column and command area, and besides, the device column may also be filled with data characterizing the belonging protocol, which may be, for example, descriptors such as MAC, SATA, USB, and custom DMAC. The name of the DMA descriptor is characterized by data such as rx _ des _32 \uno stamp, rx _ des _32_ have _stamp, etc. filled in the descriptor _ name column, which can be used to name the task or function of the subsequently generated DMA descriptor.

The command format includes BYTE3, BYTE2, BYTE1 and BYTE0 columns (only the BYTE3 column is shown in table 1), in the next row of the BYTE3 column 31, 30, 29, 28, 27, 26, 25 and 24 represent 8-bit data in the BYTE3 column, 23, 22 represent two-bit data in the BYTE2 column (the remaining data is not shown), taking the data in 31 bits as an example, buffer _ add [31 ]:0 x11000, rx _ tag [31 ]:0 x11000 and buffer _ add [31 ]:0 x11000 are variable parameters, 0x11000 is the initial value of the parameter variables buffer _ add [ 31.

The initial values of the fixed value domain segments are characterized by rx _ tag =0x0, second:: 0x0, rev =0x0, used =0x0 and the like, namely the initial values of the fixed value domain segments rx _ tag, second, rev and used are all 0x0.buffer _ add::0x30000:: SNAP _ DATA represents a DMA descriptor with DATA, indicating that the initial value of the field segment with the buffer _ add is 0x30000 and the DATA block name is SNAP _ DATA.

The second identification area of the second part is explained above, and the data filling limitation of the data area of the second part is explained below. The filled data information in the data area is used for indicating the specific format and initial value of the data block in the DMA descriptor and is used for describing the specific information of the data block. The data information can be described by two lines, wherein the upper line is used for describing the domain segment name of the data block, so that a user can conveniently understand the meaning of the domain segment, and the lower line is used for describing the value of the domain segment. Optionally, the data area is further configured to indicate that the description of the data information adopts a mode of describing from a low domain value to a high domain value, so that it can be ensured that data of any size can be well constructed without being limited by the size of the data block, and a domain of a general data block that needs to give a value with emphasis is at a low level, and the high level can be random, so that the description mode from the low domain value to the high domain value is more reasonable.

Optionally, the data area is further configured to limit filling of the data information as follows:

1. the data area is also used for indicating the filling mode of the fixed value of the data block of the DMA descriptor to be filling given data;

2. the data area is also used to indicate the parameter variables to be filled in a manner including parameter bit width and parameter variables, and may be represented by using the symbols "a:: b", for example, the former a is the bit width of the parameter and is in bytes, and the latter b represents the parameter variables.

3. The data area is further configured to indicate a filling manner of parameter variables that need to be operated, and specifically, the data area is further configured to indicate that the parameter variables that need to be operated are filled in a first preset format, where the first preset format includes a parameter variable name, a parameter variable bit width, and operations performed on the parameter variables that are connected by symbols, and for example, the symbols "c:: d:: e" may be used to indicate that c indicates the bit width of the parameter variables, d indicates the parameter variable name, and e indicates operations that need to be performed on d, such as "+1" or "-1", and the like.

4. The data area is further used for randomizing the data field segment, and the second preset format includes a data block bit width, a data block name, a data block length and a data block initialization mode which are connected by symbols, for example, symbols "f:: g:: H:: i" may be used, f represents a data block bit width, H represents a data block name, and g represents a data block length, the data length which really needs to be initialized needs to be obtained after operation, and i represents a data block initialization mode, and i may specifically include R, H, L and HL, where R represents randomization, H represents initialization to 1, L represents initialization to 0, HL initialization to a 01 sequence, and so on.

In light of the above limitations, one embodiment of the present specification provides a partial example of the second portion of an exemplary descriptor table, see table 2.

Table 2 descriptor table second part

The device column in the second part is used to indicate the filling position of the type of the DMA descriptor, i.e. gmac represents the data of the DMA descriptor that the data filled in the subsequent type column and data area belong to the device gmac, and sata represents the data of the DMA descriptor that the data filled in the subsequent type column and data area belong to the sata protocol. The device column in the second part may be associated with the device column in the first part, for example, data with the first part device column of gmac may be associated with data with the second part device column of gmac, and when a DMA descriptor is generated subsequently based on the descriptor table, data of a device or a protocol with the same name as that in the first part device column and the second part device column may be used as generation data of the DMA descriptor.

In addition, the first part and the second part can be divided into two forms, so that the filled descriptor part of the first part can be linked with the plurality of data buffer (cache data) parts filled in the second part through the device columns in the first part and the second part, and thus when a DMA descriptor is subsequently generated, a plurality of DMA descriptors can be generated according to the filled descriptor part of the first part and the plurality of data buffer (cache data) parts linked with the descriptor part of the first part, which is beneficial to simplifying the filling content of the descriptor table and improving the usability of the establishment method of the verification environment.

The type column of the second part is used to indicate the type of DMA descriptor data initialization task or DMA descriptor data initialization function name to be generated, and the filled values of the column are used to identify the type of data block. For example, IP _ DATA and SNAP _ DATA respectively characterize the type of name of the DMA descriptor DATA initialization task/function.

The data column of the second portion is used to indicate the format description data of the DMA descriptor data portion to be generated, and the filled data of the column is used to describe the specific content and format of the DMA descriptor data portion.

After the descriptor table is created, the step S101 does not need to be repeatedly executed in the subsequent DMA descriptor generation process, that is, after the descriptor table is created, the subsequent DMA descriptor generation process may repeatedly use the descriptor table created in the step S101 without repeatedly creating the descriptor table, unless the descriptor table is modified as needed, the descriptor table created in the step S101 may be appropriately added or deleted. The DMA descriptor generation process is described below.

DMA descriptor generation Process:

s102: obtaining a constructed model of a Direct Memory Access (DMA) descriptor generated based on initial data, wherein the initial data is carried in a descriptor table, the descriptor table comprises a first part and a second part, the first part is used for storing first content of the initial data, the second part is used for storing second content of the initial data, the first content and the second content are associated, the first content is used for describing format information of the DMA descriptor, and the second content is used for describing data block information of the DMA descriptor; the building model of the DMA descriptor comprises a building task or a building function of the DMA descriptor.

The initial data may be obtained by a user filling in a descriptor table, or may be automatically filled in by a computer according to an instruction of the descriptor table based on a document including the initial data. During the filling of the data in the descriptor table, a step of checking whether the filling data conforms to the indication of the descriptor table may be included, and when the position of the filling data does not conform to the indication requirement of the descriptor table, a prompt message such as "XX data filling position error in the table" may be sent to prompt the user.

Of course, the process of checking the filling data may also be performed after the initial data is completely filled in the descriptor table, which is not limited in this specification. The verification of the filling data may also include verification of an association relationship between the first part and the second part, and when the first part includes data of a descriptor part that is not associated with the second part or the second part includes data of a data buffer part that is not associated with the first part, prompt information such as "including unassociated data in a table" may also be sent to prompt the user. The prompt information is sent, so that the user can be helped to find out possible data filling errors, and the usability is improved.

The specific process of generating the DMA descriptor construction task or the DMA descriptor construction function may include:

s1021: and respectively parsing first content and second content from a first part and a second part of the descriptor table based on a preset tool, wherein the first content can be data of a descriptor part of the DMA descriptor filled in the first part, and the second content can be data of a data buffer part of the DMA descriptor filled in the second part, and the initial data comprises the first content and the second content.

The DMA descriptor construction task can be a construction task adopting a System Verilog language, the DMA descriptor constructed by the DMA descriptor construction task can be used for a verification environment based on UVM, and the DMA descriptor can be constructed in a storage model of the UVM environment.

The building function of the DMA descriptor can be a building function adopting C language, the generated DMA descriptor building function can be used in a bare computer system level verification environment, and the building of the DMA descriptor in the system memory can be completed by calling the DMA descriptor building functions in a main program.

After step S1021, generation of a DMA descriptor data initialization construction function or a DMA descriptor data initialization construction task may be performed based on the first content, and generation of a DMA descriptor initialization construction function or a DMA descriptor initialization construction task may be performed based on the second content.

After the DMA descriptor data initialization construction task/function and the DMA descriptor initialization construction task/function are constructed, the generation of the DMA descriptor construction task or the DMA descriptor construction function is completed. Optionally, the DMA descriptor building task includes a DMA descriptor data initialization building task and a DMA descriptor initialization building task, and the DMA descriptor building function includes a DMA descriptor data initialization building function and a DMA descriptor initialization building function.

In order to correctly generate the DMA descriptor, after step S102, the method further includes:

s103: integrating the build model of the DMA descriptor into a verification environment of a DUT such that the verification environment of the DUT invokes the build model of the DMA descriptor, generating the DMA descriptor, the DMA descriptor associated with one DMA operation.

Optionally, the integrating the constructed model of the DMA descriptor into the verification environment of the DUT so that the verification environment of the DUT calls the constructed model of the DMA descriptor, and the generating the DMA descriptor may specifically include:

integrating the DMA descriptor construction task or the DMA descriptor construction function into the DUT verification environment, so that the DUT verification environment generates the DMA descriptor based on the DMA descriptor construction task or the DMA descriptor construction function, and performs functional verification based on the DMA descriptor.

More specifically, the step may include: s1031: and integrating the generated DMA descriptor construction task into a UVM environment or integrating the generated DMA descriptor construction function into a bare metal system-level environment.

S1032: and generating the DMA descriptor by calling the DMA descriptor constructing task in a UVM environment or calling the DMA descriptor constructing function in a bare metal system level environment.

The generated DMA descriptor building task is integrated into the UVM environment, and a specific process of generating the DMA descriptor by calling the DMA descriptor building task in the UVM environment may include:

the generated DMA descriptor construction task is added into base _ sequence (the base class of sequence in UVM environment) through include (the way that one file is added into another file in verification environment), and the DMA descriptor construction task is called in pre _ body of base _ sequence, so that the generation of DMA descriptor is realized.

The generated DMA descriptor building function is integrated into a UVM bare metal system-level environment, and the DMA descriptor building function is called in the bare metal system-level environment, and the specific process of generating the DMA descriptor may include: and adding the generated DMA descriptor building functions into a pre-compiled library through include, and calling the functions in the main function to generate the DMA descriptor.

In an exemplary embodiment of the present specification, the verification environment further comprises: the DUT controller, after generating the DMA descriptor, may further include:

s104: starting the DUT controller to enable the DUT controller to perform DMA operation based on the DMA descriptor, and verifying the DMA descriptor according to the DMA operation result.

Step S104 may specifically include: and according to the programming flow of the DUT controller corresponding to the DMA descriptor, checking whether the constructed DMA descriptor can be read correctly after the controller is enabled, and enabling the data processing flow to accord with the corresponding DMA descriptor function.

The DUT controller may be a SATA controller, a USB controller, or a MAC controller.

Step S104 is added to perform correctness verification on the DMA descriptor, and meanwhile, functional verification on the DUT by using the generated DMA descriptor can also be realized.

To sum up, the method for building the verification environment provided by the embodiment of the present specification indicates, in a standard manner, the filling position of data of each portion of the DMA descriptor based on the created descriptor table, so that the DMA descriptor is more visually displayed in front of the user, and thus the DMA descriptor generated by the user based on the descriptor table has better inheritability, that is, other subsequent users can better understand the DMA descriptor generated by other users through the descriptor table, and the other users can modify the DMA descriptor through modifying the data in the descriptor table, which is simple and easy to use, and improves the usability of the method for building the verification environment.

The present specification further provides a verification method for a chip, which is applied to a verification environment set up by the verification environment setting-up method according to any of the embodiments described above, and the verification method for a chip includes:

Optionally, the verification environment comprises a UVM environment or a bare metal system environment.

Exemplary devices and systems

Corresponding to the establishment method of the verification environment, an embodiment of the present specification further provides an establishment device of a verification environment, where the terminal device stores a descriptor table, and the establishment device of the verification environment includes:

Corresponding to the verification method of the chip, an embodiment of the present specification further provides a verification apparatus of a chip, which is applied to a terminal device, where a descriptor table is stored in the terminal device, and the establishment method of a verification environment is used to perform functional verification on a DUT to be tested, and is applied to the verification environment established by the establishment method of the verification environment according to any one of the embodiments, where the verification method of the chip includes:

and the DUT verification module is used for performing functional verification on at least one DUT (device under test) included in the chip by utilizing the verification environment and the DMA descriptor.

Optionally, the verification environment comprises a UVM environment or a bare metal system level environment.

The device for building the verification environment and the device for verifying the chip provided by the embodiment belong to the same application concept as the method for building the verification environment and the method for verifying the chip provided by the embodiments of the present application, can respectively execute the method for building the verification environment and the method for verifying the chip provided by any embodiment of the present application, and have functional modules and beneficial effects corresponding to the method for building the verification environment and the method for verifying the chip. For details of the technology that are not described in detail in this embodiment, reference may be made to specific processing contents of the verification environment construction method and the chip verification method provided in the foregoing embodiments of the present application, and details are not described here again.

The embodiment of the present specification further provides a verification system of a chip for a module-level verification environment, including: universal validation methodology UVM vessels and DUTs; wherein,

the UVM container includes a first interface and a second interface, where the first interface is configured to receive the DMA descriptor constructed model generated by the verification environment construction method according to any of the above embodiments, so that the UVM container generates and stores the DMA descriptor according to the DMA descriptor constructed model; the build model of the DMA descriptor includes a build task of the DMA descriptor.

The second interface is used for transmitting the DMA descriptor to the DUT so that the DUT executes the DMA operation associated with the DMA descriptor according to the DMA descriptor.

Referring to fig. 1, taking the example of verifying a SATA protocol-based DUT, which includes a SATA controller and a corresponding physical layer PHY, the DUT can perform data transfers between a storage model and a hard disk based on DMA descriptors. When authenticating to a USB protocol based DUT, which includes a USB controller and corresponding physical layer PHY, the DUT may perform data transfers between a storage model in the UVM container and a USB device model based on the DMA descriptor.

Similarly, when authenticating to a MAC protocol based DUT, which includes a MAC controller and corresponding physical layer PHY, the DUT may be data-shifted between a storage model in a UVM container and a MAC device model based on DMA descriptors.

An embodiment of the present specification further provides a verification system of a chip for a bare metal system level verification environment, including: the DUT and the storage model, wherein,

the storage model is used for acquiring a building model of the DMA descriptor generated by the method for building the verification environment according to any embodiment; the build model of the DMA descriptor includes a build function of the DMA descriptor.

The DUT is used for calling the constructed model of the DMA descriptor, generating the DMA descriptor and executing the DMA operation associated with the DMA descriptor according to the DMA descriptor.

Similar to the module-level verification environment, the verification system for the chip in the bare computer system-level verification environment can also implement functional verification of the DUT based on protocols such as SATA, USB, MAC, and the like, which is not described herein again.

Exemplary computing device

The embodiment of the present specification further provides a computing device, where the computing device has a function of implementing part or all of the method for building the verification environment described in any of the above embodiments. These functions may be implemented by hardware, or by hardware executing corresponding software. The hardware or software includes one or more units corresponding to the above functions.

Embodiments of the present specification also provide a computing device comprising an input output interface, a processor, and a memory. The processor is configured to control the input/output interface to input or output information, the memory is configured to store a computer program, and the processor is configured to call and run the computer program from the memory, so that the computing device executes the method for building an authentication environment according to any of the above embodiments.

The internal interface of the computing device provided by the embodiments of the present description may be as shown in fig. 4, and the computing device includes a processor, a memory, an input/output interface, a network interface, and an input device, which are connected by a system bus. Wherein the processor of the computing device is configured to provide computing and control capabilities. The memory of the central control device comprises a nonvolatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of an operating system and computer programs in the non-volatile storage medium. The network interface of the computing device is used for communicating with an external terminal through a network connection. The computer program is executed by a processor to perform the steps of the method for detecting a third party component according to various embodiments of the present specification described in the embodiments of the present specification.

The processor may include a main processor and may also include a baseband chip, modem, and the like.

The memory stores programs for executing the technical scheme of the invention and also stores an operating system and other key services. In particular, the program may include program code comprising computer operating instructions. More specifically, the memory may include read-only memory (ROM), other types of static storage devices that may store static information and instructions, random Access Memory (RAM), other types of dynamic storage devices that may store information and instructions, disk storage, flash, and the like.

The processor may be a general-purpose processor, such as a general-purpose Central Processing Unit (CPU), microprocessor, etc., an application-specific integrated circuit (ASIC), or one or more ics for controlling the execution of programs in accordance with the inventive arrangements. But may also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), an off-the-shelf programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components.

The input device may include means for receiving data and information input by a user, such as a keyboard, mouse, camera, scanner, light pen, voice input device, touch screen, pedometer, or gravity sensor, among others.

Output devices may include devices that allow output of information to a user, such as a display screen, printer, speakers, etc.

The communication interface may include any means for using a transceiver or the like to communicate with other devices or communication networks, such as ethernet, radio Access Network (RAN), wireless Local Area Network (WLAN), etc.

The processor executes the program stored in the memory, and invokes other devices, which can be used to implement the steps of any one of the third party component detection methods provided in the embodiments of the present application.

The computing equipment can also comprise a display component and a voice component, the display component can be a liquid crystal display screen or an electronic ink display screen, and the input device of the computing equipment can be a touch layer covered on the display component, a key, a track ball or a touch pad arranged on the shell of the computing equipment, an external keyboard, a touch pad or a mouse and the like.

Those skilled in the art will appreciate that the architecture shown in fig. 4 is a block diagram of only a portion of the architecture associated with the subject specification, and is not intended to limit the computing devices to which the subject specification may be applied, as a particular computing device may include more or less components than those shown, or may combine certain components, or have a different arrangement of components.

Exemplary computer program product and computer-readable storage Medium

In addition to the above methods and apparatus, embodiments of the present description may also be a computer program product comprising computer program instructions which, when executed by a processor, cause the processor to perform the method of building a verification environment or the method of verifying a chip described in the "exemplary methods" section of the present description above.

The computer program product may include program code for carrying out operations for embodiments of the present description in any combination of one or more programming languages, including an object oriented programming language such as Java, C + + or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computing device, partly on the user's device, as a stand-alone software package, partly on the user's computing device and partly on a remote computing device, or entirely on the remote computing device or server.

The computer-readable storage medium may take any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may include, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or a combination of any of the foregoing. More specific examples (a non-exhaustive list) of the readable storage medium include: an electrical connection having one or more wires, a portable diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

The basic principles of the present specification have been described above with reference to specific embodiments, but it should be noted that advantages, effects, and the like, mentioned in the specification are only examples and are not limiting, and the advantages, effects, and the like, should not be considered as necessarily possessed by various embodiments of the specification. Furthermore, the foregoing disclosure of specific details is provided for purposes of illustration and understanding only, and is not intended to limit the disclosure to the particular details which may be employed.

The block diagrams of devices, apparatuses, devices, systems referred to in this specification are only given as illustrative examples and are not intended to require or imply that the devices, apparatuses, devices, systems, and systems must be connected, arranged, or configured in the manner shown in the block diagrams. These devices, apparatuses, devices, systems may be connected, arranged, configured in any manner, as will be appreciated by one skilled in the art. Words such as "including," "comprising," "having," and the like are open-ended words that mean "including, but not limited to," and are used interchangeably therewith. The words "or" and "as used herein mean, and are used interchangeably with, the word" and/or, "unless the context clearly dictates otherwise. The word "such as" is used herein to mean, and is used interchangeably with, the phrase "such as but not limited to".

It should also be noted that in the devices, apparatuses, and methods of the present specification, components or steps may be broken down and/or re-combined. Such decomposition and/or recombination should be regarded as an equivalent solution of the present specification.

The previous description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present description. Various modifications to these aspects will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other aspects without departing from the scope of the disclosure. Thus, the present description is not intended to be limited to the aspects shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

The foregoing description has been presented for purposes of illustration and description. Furthermore, this description is not intended to limit embodiments of the specification to the form in which the embodiments of the specification are described. While a number of example aspects and embodiments have been discussed above, those of skill in the art will recognize certain variations, modifications, alterations, additions and sub-combinations thereof.

Claims

1. A method for building a verification environment is applied to a terminal device, a descriptor table is stored in the terminal device, and the method for building the verification environment comprises the following steps:

calling a build model of the DMA descriptor, generating the DMA descriptor, the DMA descriptor being associated with a DMA operation, a build task of the DMA descriptor being for a UVM-based verification environment, a build function of the DMA descriptor being for a bare machine system level verification environment.

2. The method of claim 1, wherein the descriptor table comprises a plurality of sub-tables, and wherein the first portion and the second portion are located in different sub-tables.

3. The method of claim 1, wherein the method for building the verification environment further comprises:

4. The method of claim 1, wherein the method for building the verification environment further comprises:

5. The method of claim 1, wherein the first content comprises a type of the DMA descriptor and a command format of the DMA descriptor, and wherein the second content comprises the type of the DMA descriptor, a specific format of a data block of the DMA descriptor, and an initial value;

6. The method of claim 5, wherein the command area is further configured to indicate a declaration method of a name and an initial value of a field segment of the DMA descriptor, a filling manner of a field of a variable parameter of the DMA descriptor, a filling manner of a fixed value field segment of a command format, a declaration manner of a field segment name, and a declaration manner of a DMA descriptor command with data.

7. The method of claim 5, wherein the data field is further used for indicating filling modes of a fixed value, a parameter variable required to be operated on and a data field segment to be randomized in the data block of the DMA descriptor.

8. The method of any of claims 1-7, wherein the verification environment further comprises: the DUT controller, the method for building the verification environment further comprises:

starting the DUT controller to enable the DUT controller to perform a DMA operation based on the DMA descriptor to verify the DMA descriptor according to the DMA operation result.

9. A chip verification method is applied to a verification environment built by the verification environment building method according to any one of claims 1 to 8, and comprises the following steps:

10. A system for verifying a chip, comprising: universal validation methodology UVM vessels and DUTs; wherein,

the UVM container comprises a first interface and a second interface, wherein the first interface is used for receiving a constructed model of the DMA descriptor generated according to the construction method of the verification environment of any one of claims 1 to 8, so that the UVM container generates and stores the DMA descriptor according to the constructed model of the DMA descriptor; the building model of the DMA descriptor comprises a building task of the DMA descriptor, and the building task of the DMA descriptor is used for a verification environment based on UVM;

11. A system for verifying a chip, comprising: the DUT and the storage model, wherein,

the storage model is used for obtaining a constructed model of the DMA descriptor generated according to the construction method of the verification environment of any one of claims 1-8; the building model of the DMA descriptor comprises a building function of the DMA descriptor, and the building function of the DMA descriptor is used for a bare metal system level verification environment;

12. A computing device, comprising: a processor and a memory, the memory for storing a computer program, the processor for invoking and running the computer program from the memory to cause the computing device to perform the method of building an authentication environment of any one of claims 1-8.