CN101625705A - Verification environment system and construction method thereof - Google Patents
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Abstract
本发明实施例公开了一种验证环境系统及其搭建方法,其中,验证环境的搭建方法包括:获取搭建验证环境所需的端口信息,产生验证环境的分层结构;根据源自被测设计顶层的端口信号,以反配置数据流的方向逐层搭建验证环境的分层结构所需部件。实施本发明,可实现验证环境的有效重用和快速搭建。
The embodiment of the present invention discloses a verification environment system and its construction method, wherein the construction method of the verification environment includes: obtaining the port information required to build the verification environment, generating a hierarchical structure of the verification environment; The required components of the hierarchical structure of the verification environment are built layer by layer in the direction of anti-configuration data flow. The implementation of the present invention can realize the effective reuse and rapid construction of the verification environment.
Description
技术领域 technical field
本发明涉及验证技术领域,尤其涉及一种验证环境系统及其搭建方法。The invention relates to the technical field of verification, in particular to a verification environment system and a construction method thereof.
背景技术 Background technique
验证是芯片产品开发环节中为了证明设计功能是否实现并正确实现的一个必不可少的过程,而为了更好地完成验证,验证人员需要经常围绕设计搭建贴切、高效的验证环境。随着近20年来芯片验证领域的快速发展,验证环境的搭建有了各种各样的方法。目前在业界比较常用的是围绕仿真顶层来搭建,围绕仿真顶层是为了根据仿真顶层信息产生刚刚好满足于该被测设计(DUT,DesignUnder Test)的验证环境,具有简单和灵活的优势。Verification is an indispensable process in the chip product development process to prove whether the design function is realized and implemented correctly. In order to better complete the verification, the verification personnel need to often build an appropriate and efficient verification environment around the design. With the rapid development of the field of chip verification in the past 20 years, there are various methods to build the verification environment. At present, it is more commonly used in the industry to build around the top-level simulation. The purpose of building around the top-level simulation is to generate a verification environment that just satisfies the design under test (DUT, DesignUnder Test) based on the top-level simulation information. It has the advantages of simplicity and flexibility.
围绕仿真顶层来搭建,通常把环境需要的各功能模块和控制模块事先准备好,然后在仿真顶层中统一例化和连接它们,以完成整个验证环境的搭建。该方式很好地解决了与验证业务特点相结合的问题,使得验证具有针对性,善于发现设计漏洞,结构也比较简单,控制也灵活。To build around the top layer of the simulation, the functional modules and control modules required by the environment are usually prepared in advance, and then they are uniformly instantiated and connected in the top layer of the simulation to complete the construction of the entire verification environment. This method solves the problem of combining with the characteristics of the verification business, makes the verification more targeted, is good at finding design loopholes, and has a relatively simple structure and flexible control.
围绕仿真顶层来搭建验证环境的主要思想是以仿真顶层为本,在其内部统一定义所需要的信号、例化DUT顶层模块、编写和例化所需要的各功能时序模块或验证IP(VIP,Verification Intellectual Property,验证重用部件)模块,并最终完成各模块间信号的连接和调试。围绕仿真顶层的验证环境搭建过程如下图1所示。The main idea of building a verification environment around the top-level simulation is based on the top-level simulation, which uniformly defines the required signals, instantiates the DUT top-level modules, writes and instantiates the required functional timing modules or verification IP (VIP, Verification Intellectual Property, verify the reused parts) module, and finally complete the connection and debugging of signals between modules. The process of building the verification environment around the top layer of the simulation is shown in Figure 1 below.
围绕仿真顶层来搭建验证环境的特点在于:The characteristics of building a verification environment around the top layer of simulation are:
1、按调用方向,时序层部件的产生依赖于封装层和功能层;1. According to the call direction, the generation of sequential layer components depends on the encapsulation layer and functional layer;
2、各功能时序模块或验证IP模块和DUT在仿真顶层内被统一例化,它们具有同等的地位;2. Each functional timing module or verification IP module and DUT are uniformly instantiated in the simulation top layer, and they have the same status;
3、各个功能时序模块或验证IP模块以及DUT之间的关系全部体现在仿真顶层内;3. The relationship between each functional timing module or verification IP module and DUT is all reflected in the simulation top layer;
4、封装层、功能层内各验证部件以及参考模型隐藏在各功能时序模块或验证IP模块下,对于仿真顶层来讲是不可见的;4. The verification components and reference models in the encapsulation layer and functional layer are hidden under each functional timing module or verification IP module, and are invisible to the top layer of simulation;
5、没有统一的搭建主线和自动化的搭建思想,需要过多地依赖于验证人员的手动编辑,但后续修改起来比较方便。5. There is no unified construction main line and automated construction ideas, and it needs to rely too much on manual editing by verifiers, but subsequent modifications are more convenient.
发明人在本发明的创造过程中,发现随着芯片业务复杂度的不断增加,现有技术提供的围绕仿真顶层来搭建验证环境的方式有如缺点:During the creation process of the present invention, the inventor found that with the increasing complexity of chip business, the method of building a verification environment around the simulation top layer provided by the prior art has some disadvantages:
现有技术提供的围绕仿真顶层来搭建验证环境的方式需要验证人员投入越来越多的精力和时间进行验证管理,并开发相关的功能模块。由于围绕仿真顶层来搭建验证环境的方式把所有的焦点都集中在了仿真顶层,并过于依赖验证人员的手动工作,同时在仿真顶层外也给了验证人员很多的随意性,故容易造成各DUT验证环境之间无法交流和重用,以及很多人为性的错误。如果仿真顶层功能模块比较多,对于验证人员的工作量也将成倍增长。在现有芯片验证规模迅速扩大,而其开发周期不断缩减以及验证质量要求不断提高等情形下,围绕仿真顶层来搭建方式并不能完全满足我们快速搭建贴切于产品特点的验证环境。The method provided by the existing technology to build a verification environment around the simulation top layer requires verification personnel to invest more and more energy and time in verification management and development of related functional modules. Because the method of building the verification environment around the top layer of the simulation focuses all the focus on the top layer of the simulation, and relies too much on the manual work of the verification personnel. At the same time, it also gives the verification personnel a lot of randomness outside the top layer of the simulation, so it is easy to cause each DUT. There is no communication and reuse between verification environments, and many human errors. If there are many top-level functional modules in the simulation, the workload for the verification personnel will also increase exponentially. With the rapid expansion of the existing chip verification scale, the continuous reduction of its development cycle and the continuous improvement of verification quality requirements, the method of building around the top layer of simulation cannot fully satisfy us to quickly build a verification environment that is appropriate to product characteristics.
发明内容 Contents of the invention
本发明实施例提供了一种验证环境的搭建方法,以及验证环境系统,可实现验证环境的有效重用和快速搭建。The embodiment of the present invention provides a method for building a verification environment and a verification environment system, which can realize effective reuse and rapid construction of the verification environment.
为解决上述问题,本发明实施例提供了一种验证环境的搭建方法,包括:In order to solve the above problems, an embodiment of the present invention provides a method for building a verification environment, including:
获取搭建验证环境所需的端口信息,产生验证环境中以被测设计顶层开始的分层结构Obtain the port information needed to build the verification environment, and generate a hierarchical structure in the verification environment starting from the top level of the design under test
根据源自被测设计顶层的端口信号,以反配置流的方向逐层搭建验证环境的分层结构所需部件。According to the port signals originating from the top layer of the design under test, the required components of the hierarchical structure of the verification environment are built layer by layer in the direction of the reverse configuration flow.
相应的,本发明实施例还提供了一种验证环境系统,所述系统以源自被测设计顶层的端口信号,以反配置流的方向逐层搭建,包括:Correspondingly, the embodiment of the present invention also provides a verification environment system. The system uses port signals originating from the top layer of the design under test, and is built layer by layer in the direction of anti-configuration flow, including:
被测设计顶层,获取搭建验证环境所需的端口信息,将所获取的端口信息转化为验证环境所能识别的端口信号;以被测设计顶层的名称命名产生验证环境中以被测设计顶层开始的分层结构;将端口信号进行分组打包并传递;The top layer of the design under test obtains the port information required to build the verification environment, and converts the obtained port information into port signals that can be recognized by the verification environment; the verification environment starts with the top layer of the design under test after being named after the top layer of the design under test The hierarchical structure; the port signals are grouped and delivered;
仿真顶层,根据被分组打包的被测设计顶层模块的端口信号同名产生,并在其中完成验证环境分层结构所需部件的例化;The simulation top layer is generated according to the port signals of the grouped and packaged top-level module of the design under test with the same name, and the instantiation of the components required for the verification environment hierarchical structure is completed in it;
时序接口层,用于与所述仿真顶层的端口信号同名的方式,在其中产生总线功能模型和监控功能模块的代码文件,并根据所述总线功能模型和监控功能模块的端口信号,连接验证IP模块或信号配置模块;The timing interface layer is used to generate the code file of the bus function model and the monitoring function module in the manner with the same name as the port signal of the simulation top layer, and connect the verification IP according to the bus function model and the port signal of the monitoring function module module or signal configuration module;
封装层,将所述总线功能模型和监控功能模块的端口信号中的标准接口信号的相关信息封装在命令和函数中,供用户通过所述命令和函数,通过验证IP模块对所述在总线功能模型和监控功能模块中的端口信号进行控制或处理;The encapsulation layer encapsulates the relevant information of the bus function model and the standard interface signal in the port signal of the monitoring function module in commands and functions, for the user to pass the commands and functions, and verify that the IP module has a correct understanding of the bus function. Control or process the port signals in the model and monitoring function modules;
功能层,将总线功能模型和监控功能模块的端口信号中的自定义接口信号以同名的方式存在于所述信号配置模块的配置用例中,供用户直接进行用例配置。In the functional layer, the self-defined interface signals of the bus function model and the port signals of the monitoring function module exist in the configuration use case of the signal configuration module with the same name, so that the user can directly configure the use case.
实施本发明的实施例,具有如下有益效果:Implementing the embodiments of the present invention has the following beneficial effects:
本发明实施例提供的验证环境系统及其搭建方法,是在DUT顶层端口信息和验证IP模块的基础上,以反配置数据流方向分层推进,逐步、快速地建立验证环境中需要的各个部件,直至配置用例,实现了验证环境的有效重用和快速搭建。The verification environment system and its construction method provided by the embodiments of the present invention are based on the DUT top-level port information and the verification IP module, and advance in layers in the direction of anti-configuration data flow, and gradually and quickly establish each component required in the verification environment , until the use case is configured, the effective reuse and rapid construction of the verification environment are realized.
附图说明 Description of drawings
图1是现有技术围绕仿真顶层的验证环境搭建过程示意图;Figure 1 is a schematic diagram of the process of building a verification environment around the simulation top layer in the prior art;
图2是本发明实施例提供的验证环境搭建方法第一实施例的流程示意图;Fig. 2 is a schematic flowchart of the first embodiment of the verification environment construction method provided by the embodiment of the present invention;
图3是本发明实施例提供的验证环境搭建方法第二实施例的流程示意图;Fig. 3 is a schematic flowchart of the second embodiment of the verification environment construction method provided by the embodiment of the present invention;
图4是本发明实施例提供的验证环境系统的结构示意图。Fig. 4 is a schematic structural diagram of a verification environment system provided by an embodiment of the present invention.
具体实施方式 Detailed ways
本发明实施例提供了一种验证环境的搭建方法,以及验证环境系统,通过DUT顶层的端口信息,以反配置流的方向传递搭建指令,实现环境部件基于信号的功能分层和有效重用,并减少设计和验证之间的隔阂。The embodiment of the present invention provides a method for building a verification environment and a verification environment system. Through the port information at the top layer of the DUT, the construction instructions are transmitted in the direction of the reverse configuration flow, so as to realize the signal-based functional layering and effective reuse of environmental components, and Reduce the gap between design and verification.
参见图2,为本发明实施例提供的验证环境搭建方法第一实施例的流程示意图。Referring to FIG. 2 , it is a schematic flowchart of the first embodiment of the verification environment building method provided by the embodiment of the present invention.
在步骤100,被测设计顶层获取外部提供的端口信息;In
在步骤101,将所获取的端口信息转化为验证环境所能识别的端口信号;In
在步骤102,根据所述端口信号,产生验证环境中以被测设计顶层开始的分层结构;In
在步骤103,以与被测设计顶层的端口信号同名的方式,产生并定义仿真顶层,在所述仿真顶层内完成验证环境分层结构所需部件的例化;具体地,在所述仿真顶层内完成被测设计顶层、总线功能模型、监控功能模块、时钟/复位信号产生模块的例化。In
在步骤104,以与所述仿真顶层的端口信号同名的方式,在时序接口层产生总线功能模型和监控功能模块的代码文件;In
在步骤105,根据所述总线功能模型和监控功能模块的端口信号中的标准接口信号,连接相应的验证IP(VIP,Verification Intellectual Property,验证重用部件)模块;具体地,包括步骤1050、步骤1051、步骤1052:In
在步骤1050,根据所述总线功能模型和监控功能模块的端口信号的标准接口信号,连接总线功能模型的验证IP模块以及监控功能模块的验证IP模块,所述标准接口信号终结在所述时序接口层;In
在步骤1051,将所述标准接口信号的相关信息传递到封装层,并封装在相应的命令和函数中;In
在步骤1052,调用所述命令或函数,通过所述总线功能模型的验证IP模块以及监控功能模块的验证IP模块,对总线功能模型以及监控功能模块中的端口信号进行控制或处理;In
在步骤106,根据所述总线功能模型和监控功能模块的端口信号中的自定义接口信号,连接相应的信号配置模块。具体地,包括步骤1060、步骤1061:In
在步骤1060,根据所述总线功能模型中的自定义接口信号和监控功能模块的非DUT端口信号中的自定义接口信号,连接以同名的方式产生的信号配置模块;并且通过各自的信号配置模块传递到配置用例中。In
在步骤1061,所述自定义接口信号继续沿端口信号流的方向传递到功能层,并以同名的方式存在于所述信号配置模块的配置用例中,供用户直接进行用例配置。所述用例配置是指用户直接对传递到用例的配置信号,进行参数配置或者场景配置。In
本发明实施例提供的验证环境的搭建方法,是在DUT顶层端口信息和验证IP模块的基础上,以反配置数据流方向分层推进,逐步、快速地建立验证环境中需要的各个部件,直至配置用例,实现了验证环境的有效重用和快速搭建。The verification environment construction method provided by the embodiment of the present invention is based on the top-level port information of the DUT and the verification IP module, and advances hierarchically in the direction of the anti-configuration data flow, and gradually and quickly establishes various components required in the verification environment until Configure use cases to realize the effective reuse and rapid construction of the verification environment.
图3是本发明实施例提供的验证环境搭建方法第二实施例的流程示意图;Fig. 3 is a schematic flowchart of the second embodiment of the verification environment construction method provided by the embodiment of the present invention;
本发明实施例提供的基于DUT顶层的验证环境的搭建方法,是以DUT顶层端口信号信息为数据流,逐步传递,逐步递减(各端口信号在相应的层上被终止传递),直至端口信号为零为止,其过程与配置数据流的方向相反,具体实现过程如下详述。The method for building the verification environment based on the DUT top layer provided by the embodiment of the present invention uses the DUT top layer port signal information as a data flow, which is gradually transmitted and gradually decreased (each port signal is terminated on the corresponding layer), until the port signal is Zero, the process is opposite to the direction of configuring the data flow, and the specific implementation process is described in detail below.
在步骤200,被测设计顶层获取外部提供的端口信息具体是:在DUT顶层有区别于其他环境的所有信息,通过自动化处理,获取搭建验证环境所需要的端口信息,并进行有效地管理。管理类别通常有以下几种(以下分类仅供参考,设计者可以根据具体使用情况而增加,但方法是一样的):In
一、时钟、复位信号;1. Clock and reset signal;
二、输入非标准协议信号;2. Input non-standard protocol signals;
三、输入标准协议信号;3. Input standard protocol signal;
四、输出非标准协议信号;4. Output non-standard protocol signals;
五、输出标准协议信号。5. Output standard protocol signal.
在步骤201,以与被分组打包的被测设计顶层的端口信号同名的方式,产生并定义仿真顶层,在所述仿真顶层内完成验证环境分层结构所需部件的例化;可以为根据从DUT顶层获取到的端口信息,以与DUT顶层端口信号同名的方式,产生并定义仿真顶层、总线功能模块(BFM,Bus Function Model)和监控功能模块(Monitor)的端口信号,并在仿真定顶层内完成各模块(DUT、BFM、Monitor、时钟/复位信号产生模块)的例化。In
在步骤202,以与所述仿真顶层的端口信号同名的方式,在时序接口层产生总线功能模型和监控功能模块的代码文件;可以为根据仿真顶层的端口信息,以与仿真顶层信号同名的方式,在时序接口层分别自动地产生BFM和Monitor代码文件。需要说明的是,所述BFM和Monitor的代码文件实际上是用来处理DUT输出信息的,所述输出信息包括对输出信号和输出信号的处理,比如将DUT的输出信号连接到标准的输出数据验证IP模块,或者对输出信号的数据或使能进行合并,分拆或者转化等操作,即把DUT输出信号的数据送到封装层进行处理。In
仿真顶层的输入信号即为BFM的输出信号,相应地,仿真顶层的输出信号即为Monitor的输入信号(注:时钟、复位和输出反馈信号都作为BFM和Monitor的输入信号),所有的配置都来源于BFM,由BFM输出给仿真顶层后,经过DUT顶层,再由仿真顶层输出给Monitor。。The input signal of the top layer of the simulation is the output signal of the BFM. Correspondingly, the output signal of the top layer of the simulation is the input signal of the Monitor (note: the clock, reset and output feedback signals are all used as the input signals of the BFM and the Monitor), and all configurations are It comes from the BFM, after being output by the BFM to the top layer of the simulation, it passes through the top layer of the DUT, and then output to the Monitor by the top layer of the simulation. .
需要说明的是,BFM和Monitor端口信号,根据功能意义,可以分为标准协议接口信号和自定义接口信号。标准协议信号自动与VIP模块相连,并终结于此;而自定义接口信号则自动与信号配置模块以同名方式相连,并继续往下传递。It should be noted that the BFM and Monitor port signals can be divided into standard protocol interface signals and user-defined interface signals according to their functional significance. The standard protocol signal is automatically connected to the VIP module and ends here; while the custom interface signal is automatically connected to the signal configuration module with the same name and continues to be passed down.
在步骤203,在所述时序接口层终结的DUT接口信号,将相关信息传递给封装层,最终由封装层来进行处理。在封装层,终结于时序接口层的DUT端口信号体现在封装好的命令或函数中,验证人员通过执行相关的命令或函数来给所述终结于时序接口层的DUT端口信号施加控制或激励,对验证DUT提供输入。In
在步骤204,未终止于时序接口层的DUT顶层接口信号(非标准接口信号、时钟、复位以及相关控制变量信号)通过信号配置模块直接传递到功能层,并以同名的方式存在于配置用例中,用户只需直接对其配置;而对于标准协议的CPU接口信号,需要平台额外管理该DUT的寄存器信息,并体现在配置用例中。In
需要说明的是,CPU不仅需要提供标准封装中的命令和函数,还需要有操作的对象。DUT的寄存器信息就是封装层操作的对象,通过自动化处理,可以使得封装的命令和函数认识这些寄存器信息,并且让这些信息体现在配置用例中。It should be noted that the CPU not only needs to provide commands and functions in the standard package, but also needs to have objects to operate on. The register information of the DUT is the object of the encapsulation layer operation. Through automatic processing, the encapsulated commands and functions can recognize these register information, and let this information be reflected in the configuration use case.
以下通过程序来说明上述验证环境的搭建过程:The following procedures illustrate the process of building the above-mentioned verification environment:
a、对于一个DUT顶层aaa模块,它从外部获取了搭建验证环境所需的端口信息。a. For a DUT top-level aaa module, it obtains the port information required to build a verification environment from the outside.
b、由DUT顶层aaa同名产生仿真顶层。b. Generate the simulation top layer from the DUT top layer aaa with the same name.
c、由仿真同名产生BFM和Monitor。c. Generate BFM and Monitor with the same name from the simulation.
BFMBFM
MonitorMonitor
本发明实施例提供的验证环境的搭建方法,是在DUT顶层端口信息和验证IP模块的基础上,以反配置数据流方向分层推进,逐步、快速地建立验证环境中需要的各个部件,直至配置用例,实现了验证环境的有效重用和快速搭建。The verification environment construction method provided by the embodiment of the present invention is based on the top-level port information of the DUT and the verification IP module, and advances hierarchically in the direction of the anti-configuration data flow, and gradually and quickly establishes various components required in the verification environment until Configure use cases to realize the effective reuse and rapid construction of the verification environment.
参见图4,是本发明实施例提供的验证环境系统的结构示意图。Referring to FIG. 4 , it is a schematic structural diagram of a verification environment system provided by an embodiment of the present invention.
所述验证环境系统,是以源自被测设计顶层的端口信号,以反配置数据流的方向逐层搭建的,包括:The verification environment system is built layer by layer in the direction of anti-configuration data flow based on port signals originating from the top layer of the design under test, including:
被测设计顶层1,获取搭建验证环境所需的端口信息,将所获取的端口信息转化为验证环境所能识别的端口信号;以被测设计顶层的名称命名产生验证环境中以被测设计顶层开始的分层结构;将端口信号进行分组打包并传递;需要说明的是,在DUT顶层1有区别于其他环境的所有信息,本发明实施例通过自动化处理,获取搭建验证环境的分层结构所需要的端口信息,并进行有效地管理。The top layer of the design under test 1, obtains the port information required to build the verification environment, and converts the obtained port information into a port signal that the verification environment can recognize; it is named after the top layer of the design under test to generate the top layer of the design under test in the verification environment The initial layered structure; the port signals are grouped and packaged and transmitted; it should be noted that, at the top layer 1 of the DUT, there are all information different from other environments, and the embodiment of the present invention obtains the layered structure of the verification environment through automatic processing. The required port information and manage it effectively.
仿真顶层2,根据被分组打包的被测设计的顶层1模块的端口信号同名产生,并在其中完成验证环境的分层结构所需部件的例化;具体地,根据从DUT顶层获取到的端口信息,以与DUT顶层端口信号同名的方式,产生并定义仿真顶层、总线功能模块210(BFM,Bus Function Model)和监控功能模块211(Monitor)的端口信号,并在仿真定顶层内完成各模块(DUT、BFM、Monitor、时钟/复位信号产生模块)的例化。
时序接口层3,用于与所述仿真顶层2的端口信号同名的方式,在其中产生总线功能模型210和监控功能模块211的代码文件,并根据所述总线功能模型210和监控功能模块211的端口信号,连接验证IP模块或信号配置模块;具体地,所述BFM210和Monitor211的端口信号,根据功能意义,可以分为标准协议接口信号和自定义接口信号。标准协议信号自动与VIP模块相连,并终结于此;而自定义接口信号则自动与信号配置模块以同名方式相连,并继续往下传递。The
封装层4,将所述总线功能模型210和监控功能模块211的端口信号中的标准接口信号的相关信息封装在相应的命令和函数中,供用户通过所述命令和函数,通过验证IP模块对所述在总线功能模型210和监控功能模块211中的端口信号进行控制或处理;The
功能层5,将总线功能模型210和监控功能模块211的端口信号中的自定义接口信号以同名的方式存在于所述信号配置模块的配置用例中,供用户直接进行用例配置。In the
参见图5,为本发明实施例提供的如图4所示的验证环境系统中被测设计顶层的结构示意图;Referring to FIG. 5 , it is a schematic structural diagram of the top layer of the design under test in the verification environment system shown in FIG. 4 provided by an embodiment of the present invention;
所述被测设计顶层1包括:The top level 1 of the design under test consists of:
信号接收模块10,用于获取外部提供的端口信息;A
信号处理模块11,用于将信号接收模块所获取的端口信息转化为验证环境所能识别的端口信号,并以被测设计顶层1的名称命名产生验证环境中以被测设计顶层开始的分层结构;需要说明的是,以被测设计顶层1的名称命名产生验证环境的分层结构,可以区别于其他环境;The
信号发送模块12,用于将经过信号处理模块处理的端口信号进行分组打包后,发送到仿真顶层。需要说明的是,被测设计顶层1的端口信号用来同名产生验证环境的分层结构中各配置信号变量和部件接口信号,这样便于识别该验证环境,有很好的可读性、维护性和移植性。The
参见图6,为本发明实施例提供的如图4所示的验证环境系统中仿真顶层的结构示意图;Referring to FIG. 6, it is a schematic structural diagram of the simulation top layer in the verification environment system shown in FIG. 4 provided by an embodiment of the present invention;
所述仿真顶层2包括:The
信号接收模块20,用于接收来自被测设计顶层信号发送模块所发出的被分组打包的端口信号;The
部件生成模块21,以被测设计的顶层端口信号同名的方式产生并定义验证环境的时序接口层、封装层和功能层等分层结构所需部件;所述部件生成模块21所产生并定义的部件包括:
总线功能模块210,用于传递验证环境的分层结构的端口信号;The
监控功能模块211,用于对验证环境的分层结构中的各种信息进行管理和控制;A
部件例化模块22,用于完成对所述时序接口层、封装层和功能层等分层结构所需部件的例化;具体地,在仿真顶层2内,完成对被测设计顶层1,总线功能模块210、监控功能模块211,以及时钟/复位信号产生模块的例化;The
信号发送模块23,用于将经过仿真顶层处理的信号发送至时序接口层。The
参见图7,为本发明实施例提供的如图4所示的验证环境系统中时序接口层的结构示意图;Referring to FIG. 7, it is a schematic structural diagram of the timing interface layer in the verification environment system shown in FIG. 4 provided by an embodiment of the present invention;
所述时序接口层3包括:The
信号接收模块30,用于接收仿真顶层2的信号发送模块20所发送的所述总线功能模型210和监控功能模块211的端口信号;The
代码生成模块31,用于以与所述仿真顶层2的端口信号同名的方式,生成总线功能模块210和监控功能模块211的代码文件;需要说明的是,所述总线功能模块210和监控功能模块211的代码文件实际上是用来处理DUT输出信息的,所述DUT输出信息包括对输入信号和输出信号的处理,比如将DUT的输出信号连接到标准的输出数据VIP模块,或者对输出信号的数据或使能进行合并,分拆或者转化等操作,即把DUT输出的数据送到封装层进行处理。The
信号处理模块32,用于根据所述总线功能模型210和监控功能模块211的端口信号中的标准接口信号,连接相应的验证IP模块;根据所述总线功能模型的自定义接口信号和监控功能模块的非DUT端口信号中的自定义接口信号,连接相应的信号配置模块;The
信号发送模块33,将所述标准接口信号的相关信息发送至封装层4;将所述自定义接口信号发送至功能层5。The
参见图8,为本发明实施例提供的如图4所示的验证环境系统中封装层的结构示意图;Referring to FIG. 8 , it is a schematic structural diagram of the encapsulation layer in the verification environment system shown in FIG. 4 provided by an embodiment of the present invention;
所述封装层4包括:Described
信号接收模块40,用于接收时序接口层3的信号发送模块32所发送的标准接口信号的相关信息;The
封装模块41,用于将所述标准接口信号的相关信息封装在相应的命令和函数中;An
验证模块42,调用所述命令或函数,通过所述总线功能模型的验证IP模块以及监控功能模块的验证IP模块,对总线功能模型210以及监控功能模块211中的端口信号进行控制或处理。需要说明的是,对于所述DUT的标准接口信号,还需要平台额外管理该DUT的寄存器信息,并体现在配置用例中。The
参见图9,为本发明实施例提供的如图4所示的验证环境系统中功能层的结构示意图;Referring to FIG. 9, it is a schematic structural diagram of the functional layer in the verification environment system shown in FIG. 4 provided by an embodiment of the present invention;
所述功能层5包括:The
信号接收模块50,用于接收时序接口层3的信号发送模块32所发送的自定义接口信号;The
信号配置模块51,用于将所述自定义接口信号以同名的方式存在于所述信号配置模块的配置用例中,供用户进行用例配置。The
本发明实施例提供的验证环境系统,是在DUT顶层端口信息和验证IP模块的基础上,以反配置数据流方向分层推进,逐步、快速地建立验证环境中需要的各个部件,直至配置用例,实现验证环境的有效重用和快速搭建,其有益效果如下:The verification environment system provided by the embodiment of the present invention is based on the top-level port information of the DUT and the verification IP module, and advances hierarchically in the direction of anti-configuration data flow, and gradually and quickly establishes each component required in the verification environment until the configuration use case , to realize the effective reuse and rapid construction of the verification environment, and its beneficial effects are as follows:
1、基于客观的信息和资源,凭借自动化控制和管理,可以快速地搭建贴切产品的验证环境,验证IP模块也能得到有效的重用;1. Based on objective information and resources, with automatic control and management, a verification environment suitable for the product can be quickly built, and the verification IP module can also be effectively reused;
2、由于该技术采用了DUT顶层端口信息来产生相应的部件,变量和信号有了统一的定义,加上自动化控制和相对管理,使得环境的可读性、维护性和移植性都非常好。同时,设计人员和验证人员统一于DUT信号的变量命名,在环境使用上存在很大的交流空间,使用隔阂(比如配置)有了很大程度的减少,效率得到提升;2. Since this technology uses DUT top-level port information to generate corresponding components, variables and signals have a unified definition, coupled with automatic control and relative management, the readability, maintainability and portability of the environment are very good. At the same time, designers and verification personnel are unified in the variable naming of DUT signals, and there is a large space for communication in environmental use, and the use gap (such as configuration) has been greatly reduced, and the efficiency has been improved;
3、取决于DUT顶层的自动化搭建,有了控制过程的统一测试,验证人员后续不需要投入过多的精力来搭建和调试,降低了验证环境搭建过程中资源的投入;3. Depending on the automatic construction of the top layer of the DUT, with the unified test of the control process, the verification personnel do not need to invest too much energy in the subsequent construction and debugging, which reduces the investment in resources during the construction of the verification environment;
4、大量地减少了人为性的手动操作,使得环境中不存在过多的人为因素,出错概率极小,而且随着接口信号的增多,工作量体现不出来;4. It greatly reduces human manual operations, so that there are no too many human factors in the environment, the probability of error is extremely small, and with the increase of interface signals, the workload cannot be reflected;
5、在各个层次上统一了架构和形式,环境质量可以得到统一的保证,也有利于评审活动的开展。5. The structure and form are unified at all levels, and the environmental quality can be guaranteed uniformly, which is also conducive to the development of review activities.
通过以上的实施方式的描述,本领域的技术人员可以清楚地了解到本发明可借助软件加必需的硬件平台的方式来实现,当然也可以全部通过硬件来实施。基于这样的理解,本发明的技术方案对背景技术做出贡献的全部或者部分可以以软件产品的形式体现出来,该计算机软件产品可以存储在存储介质中,如ROM/RAM、磁碟、光盘等,包括若干指令用以使得一台计算机设备(可以是个人计算机,服务器,或者网络设备等)执行本发明各个实施例或者实施例的某些部分所述的方法。Through the above description of the implementation manners, those skilled in the art can clearly understand that the present invention can be implemented by means of software plus a necessary hardware platform, and of course can also be implemented entirely by hardware. Based on this understanding, all or part of the contribution made by the technical solution of the present invention to the background technology can be embodied in the form of software products, and the computer software products can be stored in storage media, such as ROM/RAM, magnetic disks, optical disks, etc. , including several instructions to make a computer device (which may be a personal computer, a server, or a network device, etc.) execute the methods described in various embodiments or some parts of the embodiments of the present invention.
以上所揭露的仅为本发明一种较佳实施例而已,当然不能以此来限定本发明之权利范围,因此依本发明权利要求所作的等同变化,仍属本发明所涵盖的范围。The above disclosure is only a preferred embodiment of the present invention, which certainly cannot limit the scope of rights of the present invention. Therefore, equivalent changes made according to the claims of the present invention still fall within the scope of the present invention.
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