CN111142956A - Method, system, device and medium for modifying maximum effective load value - Google Patents

Method, system, device and medium for modifying maximum effective load value Download PDF

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Publication number
CN111142956A
CN111142956A CN201911413783.5A CN201911413783A CN111142956A CN 111142956 A CN111142956 A CN 111142956A CN 201911413783 A CN201911413783 A CN 201911413783A CN 111142956 A CN111142956 A CN 111142956A
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value
hot plug
supported
gpio
maximum
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CN111142956B (en
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钱慧娟
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Suzhou Inspur Intelligent Technology Co Ltd
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Suzhou Inspur Intelligent Technology Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/4401Bootstrapping
    • G06F9/4411Configuring for operating with peripheral devices; Loading of device drivers
    • G06F9/4413Plug-and-play [PnP]

Abstract

The invention discloses a method for modifying a maximum effective load value, which comprises the following steps based on a BIOS: initializing in response to receiving a start instruction; acquiring a GPIO value of a mainboard; determining a maximum effective load value to be acquired according to the GPIO value; judging whether hot plugging is supported; in response to the support of hot plug, acquiring a maximum payload value corresponding to when hot plug is supported based on the maximum payload value to be acquired; and updating the corresponding variable by using the maximum effective load value corresponding to the hot plug supporting. The invention also discloses a system, a computer device and a readable storage medium. The scheme provided by the invention can automatically and dynamically change the setting of PCIe Max Payload Size according to the project without manually modifying option default values and codes and recompiling, simultaneously enables a set of BIOS codes to be compatible with all projects, does not need to develop multiple sets of codes according to different projects, improves the code quality and improves the working efficiency.

Description

Method, system, device and medium for modifying maximum effective load value
Technical Field
The invention relates to the field of BIOS, in particular to a method, a system, equipment and a storage medium for modifying a maximum effective load value.
Background
The Max Payload Size parameter for PCIe determines the maximum Payload that a TLP may use. For the IIO PCIe ROOT PORT, there is an option at BIOS setup page to set its Max Payload Size: "PCI-E Port Max Payload Size", optional settings are: 128B, 256B, 512B and Auto. Auto refers to the maximum value that the device can support. Different clients may have different requirements for the parameter, such as the A client requiring that MaxPayload Size be set to 256B by default, and for ports supporting hot plug, be set to 256B by default; while the B client requires Max Payload Size to be set to Auto by default and 128B for ports supporting hot-plugging.
The existing scheme is to provide two different sets of codes for two clients, wherein the default setting of the code of the client A is 256B, and the setting is kept unchanged when the hot plug function of PCIe is opened; the "PCI-E Port Max Payload Size" in the B client's code is set to Auto by default, and is modified to 128B when the PCIe hot-plug function is on. However, when the existing scheme is used for customizing the BIOS for different clients, the default setting of the PCI-E Port Max Payload Size must be modified, and the code modification is also needed to judge whether the hot plug function of the PCIe is opened or not, and then different BIOS files are generated by recompilation and provided for different clients. That is, the existing scheme cannot be automatically adapted, multiple sets of codes must be used, and the scheme cannot be suitable for a set of BIOS codes to be compatible with all items corresponding to different users.
Disclosure of Invention
In view of the above, in order to overcome at least one aspect of the above problems, an embodiment of the present invention provides a method for modifying a maximum payload value, including performing the following steps based on a BIOS:
initializing in response to receiving a start instruction;
acquiring a GPIO value of a mainboard;
determining a maximum effective load value to be acquired according to the GPIO value;
judging whether hot plugging is supported;
in response to supporting hot plug, acquiring a maximum payload value corresponding to when hot plug is supported based on the maximum payload value to be acquired;
and updating the corresponding variable by using the maximum effective load value corresponding to the hot plug supporting.
In some embodiments, further comprising:
in response to that hot plug is not supported, acquiring a maximum effective load value corresponding to the time when hot plug is not supported based on the maximum effective load value to be acquired;
and updating the corresponding variable by using the maximum effective load value corresponding to the condition that the hot plug is not supported.
In some embodiments, obtaining the value of the GPIO of the motherboard further comprises:
judging whether the starting is the first starting according to a preset parameter corresponding to the starting times;
and acquiring the value of the GPIO in response to the first starting.
In some embodiments, further comprising:
in response to not being the first boot, no subsequent steps are performed.
In some embodiments, determining a maximum payload value to be obtained according to the value of the GPIO further comprises:
and determining an array consisting of maximum effective load values to be acquired under different conditions according to the value of the GPIO.
Based on the same inventive concept, according to another aspect of the present invention, an embodiment of the present invention further provides a system for modifying a maximum payload value, including:
an initialization module configured to initialize in response to receiving a start instruction;
the first acquisition module is configured to acquire a value of a GPIO of the mainboard;
a determination module configured to determine a maximum payload value to be obtained according to the value of the GPIO;
a judging module configured to judge whether hot plugging is supported;
a second obtaining module configured to, in response to support of hot plug, obtain, based on the maximum payload value to be obtained, a maximum payload value corresponding to when hot plug is supported;
an update module configured to update the corresponding variable with the maximum payload value corresponding to when hot plug is supported.
In some embodiments, the second obtaining module is further configured to, in response to that hot plug is not supported, obtain, based on the maximum payload value to be obtained, a maximum payload value corresponding to when hot plug is not supported;
the updating module is further configured to update the corresponding variable with the maximum payload value corresponding to when hot plug is not supported.
In some embodiments, the first obtaining module is further configured to:
judging whether the starting is the first starting according to a preset parameter corresponding to the starting times;
responding to the first starting, and acquiring the value of the GPIO;
in response to not being the first boot, no subsequent steps are performed.
Based on the same inventive concept, according to another aspect of the present invention, an embodiment of the present invention further provides a computer apparatus, including:
at least one processor; and
a memory storing a computer program operable on the processor, wherein the processor executes the program to perform the steps of any of the methods of modifying a maximum payload value as described above.
Based on the same inventive concept, according to another aspect of the present invention, an embodiment of the present invention further provides a computer-readable storage medium storing a computer program which, when executed by a processor, performs the steps of any of the methods for modifying a maximum payload value as described above.
The invention has one of the following beneficial technical effects: the scheme provided by the invention can automatically and dynamically change the setting of PCIe Max Payload Size according to the project without manually modifying option default values and codes and recompiling, simultaneously enables a set of BIOS codes to be compatible with all projects, does not need to develop multiple sets of codes according to different projects, improves the code quality, saves the time of BIOS engineers and improves the working efficiency.
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In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other embodiments can be obtained by using the drawings without creative efforts.
FIG. 1 is a flow chart illustrating a method for modifying a maximum payload value according to an embodiment of the present invention;
FIG. 2 is a schematic structural diagram of a system for modifying a maximum payload value according to an embodiment of the present invention;
FIG. 3 is a schematic structural diagram of a computer device provided in an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a computer-readable storage medium according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the following embodiments of the present invention are described in further detail with reference to the accompanying drawings.
It should be noted that all expressions using "first" and "second" in the embodiments of the present invention are used for distinguishing two entities with the same name but different names or different parameters, and it should be noted that "first" and "second" are merely for convenience of description and should not be construed as limitations of the embodiments of the present invention, and they are not described in any more detail in the following embodiments.
It should be noted that, in the embodiment of the present invention, the PCI-E Port Max Payload Size is a maximum Payload value that may be used by a TLP, a TLP (transaction Layer packet) transaction Layer packet, and a bios (basic Input Output system) basic Input Output system.
According to an aspect of the present invention, an embodiment of the present invention provides a method for modifying a maximum payload value, as shown in fig. 1, including performing the following steps based on a BIOS: s1, initializing in response to receiving the starting instruction; s2, acquiring the value of GPIO of the mainboard; s3, determining the maximum effective load value to be acquired according to the GPIO value; s4, judging whether hot plug is supported; s5, responding to the support of hot plug, and acquiring the maximum effective load value corresponding to the support of hot plug based on the maximum effective load value to be acquired; and S6, updating the corresponding variable by using the maximum effective load value corresponding to the hot plug supporting time.
The scheme provided by the invention can automatically and dynamically change the setting of PCIe Max Payload Size according to the project without manually modifying option default values and codes and recompiling, simultaneously enables a set of BIOS codes to be compatible with all projects, does not need to develop multiple sets of codes according to different projects, improves the code quality, saves the time of BIOS engineers and improves the working efficiency.
In some embodiments, in step S2, obtaining the value of the GPIO of the motherboard further includes:
judging whether the starting is the first starting according to a preset parameter corresponding to the starting times;
and acquiring the value of the GPIO in response to the first starting.
Specifically, after the BIOS is started, it may be determined that the BIOS is started for the second time according to the variable parameter, and when the BIOS is determined to be started for the first time according to the variable parameter, the maximum payload value needs to be modified, that is, the corresponding modification step needs to be performed, and at this time, the value of the GPIO is obtained.
In some embodiments, the variable parameter may be determined to be a first boot by determining whether the variable parameter exists after the BIOS is booted, i.e., the variable parameter does not exist for the first boot, and the variable parameter does not exist for the second and subsequent boots. Or, whether the starting is the first time is determined by judging the value corresponding to the variable parameter, namely, when the value of the variable parameter is 1, the starting is the first time. When the value of the variable parameter is other values, it is not the first start.
In some embodiments, the method further comprises:
in response to not being the first boot, no subsequent steps are performed.
Specifically, when the variable parameter exists or the value corresponding to the variable parameter is not 1, it is not the first start, and at this time, the step of modifying the maximum Payload value is not performed, that is, the maximum Payload value is modified only when the BIOS is started for the first time, so that it can be ensured that the PCI-E Port Max Payload Size can be successfully modified normally in SETUP.
In some embodiments, in step S3, determining the maximum payload value to be obtained according to the value of the GPIO may further include:
and determining an array consisting of maximum effective load values to be acquired under different conditions according to the value of the GPIO.
Specifically, two variables oempcpdmaxpayloydsize and oempcpdmaxpayloyeff are predefined and respectively used for storing corresponding values of the PCI-E Port Max Payload Size when hot plug is not supported and when hot plug is supported. In some embodiments, the maximum payload value requirements of different users may be grouped into a plurality of arrays by the variables oempccdmaxpaydoadsize and oempccdmaxpaydoadsizeforhp, respectively. Therefore, after the GPIO value of the mainboard is detected, the array to be acquired can be determined. For example, when the GPIO value of the mainboard is detected to judge that the item required by the user A is A, the array to be acquired is determined to be A, the variable OempCaxMaxParadSize in the array A is 256B, and the OempCdMaxParadSizeForHp is 256B; when the GPIO value of the mainboard is detected to judge that the item is the item required by the user B, the array to be acquired is determined to be B, the variable OempCdMaxParaloyAdSize in the array B is Auto, and the OempCdMaxParaloyAdSizeForHp is 128B.
It should be noted that, before obtaining and modifying the maximum payload value, the corresponding array to be obtained needs to be determined first, that is, the array formed by the maximum payload values corresponding to different situations needs to be determined first.
In some embodiments, determining the array to be obtained may be performed early in the PEI phase when the BIOS first boot initialization is flushed.
In some embodiments, after the array to be obtained is determined in the early stage of the PEI phase, the determination in step S4 is performed to determine whether hot plug is supported, and obtain the corresponding maximum payload value.
In some embodiments, the method further comprises:
in response to that hot plug is not supported, acquiring a maximum effective load value corresponding to the time when hot plug is not supported based on the maximum effective load value to be acquired;
and updating the corresponding variable by using the maximum effective load value corresponding to the condition that the hot plug is not supported.
Specifically, in the PEI phase, after the array to be obtained is determined, the corresponding maximum payload value is obtained after the PEI phase determines whether hot plug is supported. Meanwhile, because the variable value of the SETUP in the stage can only be obtained but cannot be modified, when the value of 'PCI-E Port Max Payload Size' in the SETUP is obtained, firstly, the PCIe Port is judged not to start hot plug, if the hot plug is supported, OemPcdMaxPayloadSizeForHp is returned, otherwise, OemPcdMaxPayAdSidSize is returned. Finally, step S6 is performed to update the corresponding variable with the maximum payload value corresponding to the hot plug support.
It should be noted that, the variable corresponding to the maximum payload value obtained is updated in the DXE phase, because the phase can change the value of the SETUP variable, the value of the SETUP variable is updated in the early phase of DXE, and thus, the SETUP variable is updated with oemcpctmaxpayloyadsize or oemcpctmaxpayoadsizefhaphp according to whether hot plug is supported or not.
The scheme provided by the invention can automatically and dynamically change the setting of PCIe Max Payload Size according to the project without manually modifying option default values and codes and recompiling, simultaneously enables a set of BIOS codes to be compatible with all projects, does not need to develop multiple sets of codes according to different projects, improves the code quality, saves the time of BIOS engineers and improves the working efficiency.
Based on the same inventive concept, according to another aspect of the present invention, an embodiment of the present invention further provides a system 400 for modifying a maximum payload value, as shown in fig. 2, including:
an initialization module 401, the initialization module 401 configured to initialize in response to receiving a start instruction;
a first obtaining module 402, where the first obtaining module 402 is configured to obtain a value of a GPIO of a motherboard;
a determining module 403, where the determining module 403 is configured to determine a maximum payload value to be acquired according to the value of the GPIO;
a determining module 404, where the determining module 404 is configured to determine whether hot plug is supported;
a second obtaining module 405, configured to, in response to the hot plug support, obtain a maximum payload value corresponding to when the hot plug is supported based on the maximum payload value to be obtained;
an update module 406, the update module 406 configured to update the corresponding variable with the maximum payload value corresponding to when hot plug is supported.
In some embodiments, the second obtaining module 405 is further configured to, in response to the hot plug not being supported, obtain a maximum payload value corresponding to when the hot plug is not supported based on the maximum payload value to be obtained;
the update module 406 is further configured to update the corresponding variable with the maximum payload value corresponding to when hot plug is not supported.
In some embodiments, the first obtaining module 402 is further configured to:
judging whether the starting is the first starting according to a preset parameter corresponding to the starting times;
responding to the first starting, and acquiring the value of the GPIO;
in response to not being the first boot, no subsequent steps are performed.
Based on the same inventive concept, according to another aspect of the present invention, as shown in fig. 3, an embodiment of the present invention further provides a computer apparatus 501, comprising:
at least one processor 520; and
a memory 510, the memory 510 storing a computer program 511 executable on the processor, the processor 520 executing the program to perform the steps of any of the above methods of modifying a maximum payload value.
Based on the same inventive concept, according to another aspect of the present invention, as shown in fig. 4, an embodiment of the present invention further provides a computer-readable storage medium 601, where the computer-readable storage medium 601 stores computer program instructions 610, and the computer program instructions 610, when executed by a processor, perform the steps of any one of the above maximum payload value modification methods.
Finally, it should be noted that, as will be understood by those skilled in the art, all or part of the processes of the methods of the above embodiments may be implemented by a computer program to instruct related hardware to implement the methods. The storage medium may be a magnetic disk, an optical disk, a read-only memory (ROM), a Random Access Memory (RAM), or the like. The embodiments of the computer program may achieve the same or similar effects as any of the above-described method embodiments.
In addition, the apparatuses, devices, and the like disclosed in the embodiments of the present invention may be various electronic terminal devices, such as a mobile phone, a Personal Digital Assistant (PDA), a tablet computer (PAD), a smart television, and the like, or may be a large terminal device, such as a server, and the like, and therefore the scope of protection disclosed in the embodiments of the present invention should not be limited to a specific type of apparatus, device. The client disclosed by the embodiment of the invention can be applied to any one of the electronic terminal devices in the form of electronic hardware, computer software or a combination of the electronic hardware and the computer software.
Furthermore, the method disclosed according to an embodiment of the present invention may also be implemented as a computer program executed by a CPU, and the computer program may be stored in a computer-readable storage medium. The computer program, when executed by the CPU, performs the above-described functions defined in the method disclosed in the embodiments of the present invention.
Further, the above method steps and system elements may also be implemented using a controller and a computer readable storage medium for storing a computer program for causing the controller to implement the functions of the above steps or elements.
Further, it should be appreciated that the computer-readable storage media (e.g., memory) herein can be either volatile memory or nonvolatile memory, or can include both volatile and nonvolatile memory. By way of example, and not limitation, nonvolatile memory can include Read Only Memory (ROM), Programmable ROM (PROM), Electrically Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM), which can act as external cache memory. By way of example and not limitation, RAM is available in a variety of forms such as synchronous RAM (DRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDRSDRAM), Enhanced SDRAM (ESDRAM), Synchronous Link DRAM (SLDRAM), and Direct Rambus RAM (DRRAM). The storage devices of the disclosed aspects are intended to comprise, without being limited to, these and other suitable types of memory.
Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the disclosure herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as software or hardware depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the disclosed embodiments of the present invention.
The various illustrative logical blocks, modules, and circuits described in connection with the disclosure herein may be implemented or performed with the following components designed to perform the functions herein: a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination of these components. A general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP, and/or any other such configuration.
The steps of a method or algorithm described in connection with the disclosure herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in a user terminal. In the alternative, the processor and the storage medium may reside as discrete components in a user terminal.
In one or more exemplary designs, the functions may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that can be accessed by a general purpose or special purpose computer. By way of example, and not limitation, such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a general-purpose or special-purpose computer, or a general-purpose or special-purpose processor. Also, any connection is properly termed a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, Digital Subscriber Line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium. Disk and disc, as used herein, includes Compact Disc (CD), laser disc, optical disc, Digital Versatile Disc (DVD), floppy disk, blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.
The foregoing is an exemplary embodiment of the present disclosure, but it should be noted that various changes and modifications could be made herein without departing from the scope of the present disclosure as defined by the appended claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements of the disclosed embodiments of the invention may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.
It should be understood that, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly supports the exception. It should also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items.
The numbers of the embodiments disclosed in the embodiments of the present invention are merely for description, and do not represent the merits of the embodiments.
It will be understood by those skilled in the art that all or part of the steps of implementing the above embodiments may be implemented by hardware, or may be implemented by a program instructing relevant hardware, and the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.
Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to intimate that the scope of the disclosure, including the claims, of embodiments of the invention is limited to these examples; within the idea of an embodiment of the invention, also technical features in the above embodiment or in different embodiments may be combined and there are many other variations of the different aspects of the embodiments of the invention as described above, which are not provided in detail for the sake of brevity. Therefore, any omissions, modifications, substitutions, improvements, and the like that may be made without departing from the spirit and principles of the embodiments of the present invention are intended to be included within the scope of the embodiments of the present invention.

Claims (10)

1. A method for modifying a maximum payload value, comprising, based on a BIOS:
initializing in response to receiving a start instruction;
acquiring a GPIO value of a mainboard;
determining a maximum effective load value to be acquired according to the GPIO value;
judging whether hot plugging is supported;
in response to supporting hot plug, acquiring a maximum payload value corresponding to when hot plug is supported based on the maximum payload value to be acquired;
and updating the corresponding variable by using the maximum effective load value corresponding to the hot plug supporting.
2. The method of claim 1, further comprising:
in response to that hot plug is not supported, acquiring a maximum effective load value corresponding to the time when hot plug is not supported based on the maximum effective load value to be acquired;
and updating the corresponding variable by using the maximum effective load value corresponding to the condition that the hot plug is not supported.
3. The method of claim 1, wherein obtaining the value of the GPIO for the motherboard further comprises:
judging whether the starting is the first starting according to a preset parameter corresponding to the starting times;
and acquiring the value of the GPIO in response to the first starting.
4. The method of claim 3, further comprising:
in response to not being the first boot, no subsequent steps are performed.
5. The method of claim 2, wherein determining a maximum payload value to acquire from the value of the GPIO, further comprises:
and determining an array consisting of maximum effective load values to be acquired under different conditions according to the value of the GPIO.
6. A system for modifying a maximum payload value, comprising:
an initialization module configured to initialize in response to receiving a start instruction;
the first acquisition module is configured to acquire a value of a GPIO of the mainboard;
a determination module configured to determine a maximum payload value to be obtained according to the value of the GPIO;
a judging module configured to judge whether hot plugging is supported;
a second obtaining module configured to, in response to support of hot plug, obtain, based on the maximum payload value to be obtained, a maximum payload value corresponding to when hot plug is supported;
an update module configured to update the corresponding variable with the maximum payload value corresponding to when hot plug is supported.
7. The system of claim 6,
the second obtaining module is further configured to, in response to that hot plug is not supported, obtain, based on the maximum payload value to be obtained, a maximum payload value corresponding to when hot plug is not supported;
the updating module is further configured to update the corresponding variable with the maximum payload value corresponding to when hot plug is not supported.
8. The system of claim 6, wherein the first acquisition module is further configured to:
judging whether the starting is the first starting according to a preset parameter corresponding to the starting times;
responding to the first starting, and acquiring the value of the GPIO;
in response to not being the first boot, no subsequent steps are performed.
9. A computer device, comprising:
at least one processor; and
memory storing a computer program operable on the processor, characterized in that the processor executes the program to perform the steps of the method according to any of claims 1-5.
10. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, is adapted to carry out the steps of the method according to any one of claims 1-5.
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