CN114566552B - 一种降低反向漏电流的肖特基二极管 - Google Patents

一种降低反向漏电流的肖特基二极管 Download PDF

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CN114566552B
CN114566552B CN202210157094.8A CN202210157094A CN114566552B CN 114566552 B CN114566552 B CN 114566552B CN 202210157094 A CN202210157094 A CN 202210157094A CN 114566552 B CN114566552 B CN 114566552B
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schottky diode
coefficient thermistor
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陈志耀
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Semtech Semiconductor Technology Dongguan Co Ltd
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Abstract

本发明提供了一种降低反向漏电流的肖特基二极管，其特征在于，包括阴极金属、连接在所述阴极金属上端的硅衬底、形成于所述硅衬底上端的硅外延层，所述硅外延层上端内侧形成有向下凹陷的凹槽，所述凹槽内设有与所述硅外延层相接触的金属触片，所述硅外延层上端边缘经过掺磷后形成P型半导体层，所述金属触片的底面与所述P型半导体层的底面在同一水平面上，所述金属触片上端连接有正温度系数热敏电阻，所述P型半导体层上端连接有负温度系数热敏电阻，所述正温度系数热敏电阻与所述负温度系数热敏电阻上端共同连接有阳极金属。本发明的肖特基二极管，能够解决高温反向漏电流大的问题。

Description

一种降低反向漏电流的肖特基二极管
技术领域
本发明涉及二极管技术领域，具体涉及一种降低反向漏电流的肖特基二极管。
背景技术
肖特基二极管也称肖特基势垒二极管，简称SBD，它是一种低功耗、超高速半导体器件，广泛应用于开关电源、变频器、驱动器等电路，作高频、低压、大电流整流二极管、续流二极管、保护二极管使用，或在微波通信等电路中作整流二极管、小信号检波二极管使用。肖特基二极管的最大特点是正向压降VF比较小。在同样电流的情况下，它的正向压降要小许多。但是，由于SBD的反向势垒较薄，并且在其表面极易发生击穿，所以反向击穿电压比较低。其更容易受热击穿，造成SBD的反向漏电流比PN结二极管大。因此，亟需一种肖特基二极管二极管，能够在保证其低正向压降的同时，还能改善其高温反向漏电流大的问题。
发明内容
针对以上问题，本发明提供一种降低反向漏电流的肖特基二极管，能够解决高温反向漏电流大的问题。
为实现上述目的，本发明通过以下技术方案来解决：
一种降低反向漏电流的肖特基二极管，其特征在于，包括阴极金属、连接在所述阴极金属上端的硅衬底、形成于所述硅衬底上端的硅外延层，所述硅外延层上端内侧形成有向下凹陷的凹槽，所述凹槽内设有与所述硅外延层相接触的金属触片，所述硅外延层上端边缘经过掺磷后形成P型半导体层，所述金属触片的底面与所述P型半导体层的底面在同一水平面上，所述金属触片上端连接有正温度系数热敏电阻，所述P型半导体层上端连接有负温度系数热敏电阻，所述正温度系数热敏电阻与所述负温度系数热敏电阻上端共同连接有阳极金属。
具体的，所述正温度系数热敏电阻与所述负温度系数热敏电阻在20～25℃范围内任意温度下的电阻值大小相同。
具体的，所述硅外延层上端还填充有SiO2保护层。
具体的，所述P型半导体层下端连接有多个沟槽，所述沟槽内填充有多晶硅。
具体的，所述沟槽底部为圆底结构。
具体的，所述金属触片的边缘下侧形成有P型保护环。
具体的，所述阳极金属中部形成有向下凹陷的凹陷部，所述凹陷部内填充有散热膏。
本发明的有益效果是：
本发明的肖特基二极管，在硅外延层上端设置有金属触片与P型半导体层，使得硅外延层与金属触片的交界处形成肖特基势垒面，硅外延层与P型半导体层的交界处形成PN结，并且在金属触片上端连接有正温度系数热敏电阻，正温度系数热敏电阻的电阻值随温度的升高而增大，在P型半导体层上端连接有负温度系数热敏电阻，负温度系数热敏电阻的电阻值随温度的升高而减小，在高温时，由于金属触片上端的正温度系数热敏电阻阻值大，电流方向从经过肖特基势垒面转换为经过PN结，从而解决传统SBD受限于反向势垒较薄，容易受热击穿，造成SBD的反向漏电流大的问题。
附图说明
图1为本发明的一种降低反向漏电流的肖特基二极管。
附图标记为：阴极金属1、硅衬底2、硅外延层3、金属触片4、P型半导体层5、正温度系数热敏电阻6、负温度系数热敏电阻7、阳极金属8、SiO2保护层9、沟槽10、P型保护环11、散热膏12。
具体实施方式
下面结合实施例和附图对本发明作进一步详细的描述，但本发明的实施方式不限于此。
参照图1所示：
一种降低反向漏电流的肖特基二极管，包括阴极金属1、连接在阴极金属1上端的硅衬底2、形成于硅衬底2上端的硅外延层3，硅外延层3上端内侧形成有向下凹陷的凹槽，凹槽内设有与硅外延层3相接触的金属触片4，硅外延层3与金属触片4的交界处形成肖特基势垒面，硅外延层3上端边缘经过掺磷后形成P型半导体层5，硅外延层3与P型半导体层5的交界处形成PN结，金属触片4的底面与P型半导体层5的底面在同一水平面上，金属触片4上端连接有正温度系数热敏电阻6，正温度系数热敏电阻6的电阻值随温度的升高而增大，P型半导体层5上端连接有负温度系数热敏电阻7，负温度系数热敏电阻7的电阻值随温度的升高而减小，正温度系数热敏电阻6与负温度系数热敏电阻7上端共同连接有阳极金属8，在高温时，由于金属触片上端的正温度系数热敏电阻6阻值大，电流方向从经过肖特基势垒面转换为经过PN结，从而解决传统SBD受限于反向势垒较薄，容易受热击穿，造成SBD的反向漏电流大的问题。
优选的，正温度系数热敏电阻6与负温度系数热敏电阻7在20～25℃范围内任意温度下的电阻值大小相同。
优选的，硅外延层3上端还填充有SiO2保护层9。
优选的，肖特基二极管在使用时，随着反向电压升高，容易出现击穿的现象，为了解决这一问题，本实施例在P型半导体层5下端连接有多个沟槽10，沟槽10内填充有多晶硅，随着反向电压升高，通过MOS效应，沟槽10内的多晶硅提前阻断，使得电场强度在到达硅表面之前，降为零，避免在表面击穿，提高了阻断能力。
优选的，沟槽10底部为圆底结构。
优选的，金属触片4的边缘下侧形成有P型保护环11。
优选的，为了提升肖特基二极管的散热性能，阳极金属8中部形成有向下凹陷的凹陷部，凹陷部内填充有散热膏12。
以上实施例仅表达了本发明的1种实施方式，其描述较为具体和详细，但并不能因此而理解为对本发明专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本发明构思的前提下，还可以做出若干变形和改进，这些都属于本发明的保护范围。因此，本发明专利的保护范围应以所附权利要求为准。

Claims (7)

1.一种降低反向漏电流的肖特基二极管，其特征在于，包括阴极金属（1）、连接在所述阴极金属（1）上端的硅衬底（2）、形成于所述硅衬底（2）上端的硅外延层（3），所述硅外延层（3）上端内侧形成有向下凹陷的凹槽，所述凹槽内设有与所述硅外延层（3）相接触的金属触片（4），所述硅外延层（3）上端边缘经过掺磷后形成P型半导体层（5），所述硅外延层（3）与所述P型半导体层（5）的交界处形成PN结，所述金属触片（4）的底面与所述P型半导体层（5）的底面在同一水平面上，所述金属触片（4）上端连接有正温度系数热敏电阻（6），所述P型半导体层（5）上端连接有负温度系数热敏电阻（7），所述正温度系数热敏电阻（6）与所述负温度系数热敏电阻（7）上端共同连接有阳极金属（8）。
2.根据权利要求1所述的一种降低反向漏电流的肖特基二极管，其特征在于，所述正温度系数热敏电阻（6）与所述负温度系数热敏电阻（7）在20~25℃范围内任意温度下的电阻值大小相同。
3.根据权利要求1所述的一种降低反向漏电流的肖特基二极管，其特征在于，所述硅外延层（3）上端还填充有SiO2保护层（9）。
4.根据权利要求1所述的一种降低反向漏电流的肖特基二极管，其特征在于，所述P型半导体层（5）下端连接有多个沟槽（10），所述沟槽（10）内填充有多晶硅。
5.根据权利要求4所述的一种降低反向漏电流的肖特基二极管，其特征在于，所述沟槽（10）底部为圆底结构。
6.根据权利要求1所述的一种降低反向漏电流的肖特基二极管，其特征在于，所述金属触片（4）的边缘下侧形成有P型保护环（11）。
7.根据权利要求1所述的一种降低反向漏电流的肖特基二极管，其特征在于，所述阳极金属（8）中部形成有向下凹陷的凹陷部，所述凹陷部内填充有散热膏（12）。
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Citations (4)

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Publication number Priority date Publication date Assignee Title
CN103681781A (zh) * 2012-09-18 2014-03-26 桂林斯壮微电子有限责任公司 一种掩埋pn结势垒肖特基二极管
US20170040431A1 (en) * 2015-08-06 2017-02-09 Infineon Technologies Ag Semiconductor Devices, a Semiconductor Diode and a Method for Forming a Semiconductor Device
CN113035950A (zh) * 2019-12-25 2021-06-25 株洲中车时代半导体有限公司 Igbt芯片及其制备方法
CN213752685U (zh) * 2020-12-17 2021-07-20 互创(东莞)电子科技有限公司 一种散热型碳化硅二极管

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103681781A (zh) * 2012-09-18 2014-03-26 桂林斯壮微电子有限责任公司 一种掩埋pn结势垒肖特基二极管
US20170040431A1 (en) * 2015-08-06 2017-02-09 Infineon Technologies Ag Semiconductor Devices, a Semiconductor Diode and a Method for Forming a Semiconductor Device
CN113035950A (zh) * 2019-12-25 2021-06-25 株洲中车时代半导体有限公司 Igbt芯片及其制备方法
CN213752685U (zh) * 2020-12-17 2021-07-20 互创(东莞)电子科技有限公司 一种散热型碳化硅二极管

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