CN114497306B - GaN-based LED epitaxial wafer, epitaxial growth method and LED chip - Google Patents

GaN-based LED epitaxial wafer, epitaxial growth method and LED chip Download PDF

Info

Publication number
CN114497306B
CN114497306B CN202210392701.9A CN202210392701A CN114497306B CN 114497306 B CN114497306 B CN 114497306B CN 202210392701 A CN202210392701 A CN 202210392701A CN 114497306 B CN114497306 B CN 114497306B
Authority
CN
China
Prior art keywords
temperature
low
type gan
layer
sublayer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202210392701.9A
Other languages
Chinese (zh)
Other versions
CN114497306A (en
Inventor
程龙
郑文杰
曾家明
高虹
胡加辉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Jiangxi Zhao Chi Semiconductor Co Ltd
Original Assignee
Jiangxi Zhao Chi Semiconductor Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jiangxi Zhao Chi Semiconductor Co Ltd filed Critical Jiangxi Zhao Chi Semiconductor Co Ltd
Priority to CN202210392701.9A priority Critical patent/CN114497306B/en
Publication of CN114497306A publication Critical patent/CN114497306A/en
Application granted granted Critical
Publication of CN114497306B publication Critical patent/CN114497306B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/025—Physical imperfections, e.g. particular concentration or distribution of impurities
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure

Abstract

The invention provides a GaN-based LED epitaxial wafer, an epitaxial growth method and an LED chip, wherein the GaN-based LED epitaxial wafer comprises a first low-temperature P-type GaN sublayer, a second low-temperature P-type GaN sublayer and a third low-temperature P-type GaN sublayer which are sequentially stacked, the first low-temperature P-type GaN sublayer and the second low-temperature P-type GaN sublayer are all AlInGaN layers heavily doped with Mg, the third low-temperature P-type GaN sublayer is a GaN layer, the concentration of Al components in the first low-temperature P-type GaN sublayer is greater than that of Al components in the second low-temperature P-type GaN sublayer, and the third low-temperature P-type GaN sublayer is formed by NH through atmosphere3/N2/H2Is gradually changed into NH3/N2Meanwhile, the growth is carried out in such a manner that the temperature is gradually increased. The invention can effectively solve the problem that the LED luminous efficiency is reduced because the low-temperature P-type GaN layer is difficult to grow to the bottom along the V-shaped pit in the conventional GaN-based LED epitaxial structure.

Description

GaN-based LED epitaxial wafer, epitaxial growth method and LED chip
Technical Field
The invention relates to the technical field of LEDs, in particular to a GaN-based LED epitaxial wafer, an epitaxial growth method and an LED chip.
Background
A Light Emitting Diode (LED) is a semiconductor electronic component capable of Emitting Light, and attracts more and more researchers due to its characteristics of small size, high brightness, low energy consumption, and the like, wherein the GaN-based LED has the advantages of high density, low energy consumption, long service life, short response time, no radiation, and the like, and is widely applied to the fields of illumination, display, and the like.
Among them, GaN-based LEDs have a phenomenon of quantum efficiency degradation, that is, the LED light emission efficiency is rather decreased at higher current density, and one of the main causes of this phenomenon is due to insufficient hole injection, so that the problem of how to improve the hole injection efficiency is of great concern.
The conventional GaN-based LED epitaxial structure has V-shaped pits, and the V-shaped pits have forward effects on the aspect of improving the photoelectric performance of a GaN-based LED device and mainly show two aspects of dislocation shielding and hole transmission improvement.
Disclosure of Invention
Based on the above, the invention aims to provide a GaN-based LED epitaxial wafer, an epitaxial growth method and an LED chip, and aims to solve the problem that in the existing GaN-based LED epitaxial structure, a low-temperature P-type GaN layer is difficult to grow to the bottom along a V-shaped pit, so that the LED luminous efficiency is reduced.
The GaN-based LED epitaxial wafer comprises a low-temperature P-type GaN layer, wherein the low-temperature P-type GaN layer comprises a first low-temperature P-type GaN sublayer, a second low-temperature P-type GaN sublayer and a third low-temperature P-type GaN sublayer which are sequentially stacked, the first low-temperature P-type GaN sublayer and the second low-temperature P-type GaN sublayer are both heavily Mg-doped AlInGaN layers, and the third low-temperature P-type GaN sublayer is an Mg-undoped GaN layer;
the concentration of Al component in the first low-temperature P-type GaN sublayer is greater than that of Al component in the second low-temperature P-type GaN sublayer, and the third low-temperature P-type GaN sublayer is formed by NH through atmosphere3/N2/H2Is gradually changed into NH3/N2Meanwhile, the growth is carried out in such a manner that the temperature is gradually increased.
Preferably, the GaN-based LED epitaxial wafer further comprises a substrate, a buffer layer, an undoped GaN layer, an N-type GaN layer, a multi-quantum well layer, an electron blocking layer, a P-type GaN layer, and a P-type contact layer;
the buffer layer, the non-doped GaN layer, the N-type GaN layer, the multi-quantum well layer, the low-temperature P-type GaN layer, the electronic barrier layer, the P-type GaN layer and the P-type contact layer are sequentially stacked on the substrate.
Preferably, the concentration of the Al component In the first low-temperature P-type GaN sub-layer is 0.01-0.1, the concentration of the Al component In the second low-temperature P-type GaN sub-layer is 0.001-0.01, and the concentrations of the In component In the first low-temperature P-type GaN sub-layer and the second low-temperature P-type GaN sub-layer are 0.01-0.1.
Preferably, the concentration of the Al component in the first low-temperature P-type GaN sublayer is 1-10 times that of the Al component in the second low-temperature P-type GaN sublayer.
Preferably, the thickness of the low-temperature P-type GaN layer is 10 nm-50 nm, wherein the thickness of the second low-temperature P-type GaN sublayer is 1 time-5 times that of the first low-temperature P-type GaN sublayer, and the thickness of the second low-temperature P-type GaN sublayer is 1 time-5 times that of the third low-temperature P-type GaN sublayer.
According to the LED epitaxial wafer epitaxial growth method in the embodiment of the invention, the GaN-based LED epitaxial wafer is prepared, and the epitaxial growth method comprises the following steps:
providing a substrate required by growth;
sequentially epitaxially growing a buffer layer, an undoped GaN layer, an N-type GaN layer, a multi-quantum well layer, a low-temperature P-type GaN layer, an electronic barrier layer and a P-type GaN layer on a substrate;
the low-temperature P-type GaN layer comprises a first low-temperature P-type GaN sublayer, a second low-temperature P-type GaN sublayer and a third low-temperature P-type GaN sublayer which are sequentially stacked, the first low-temperature P-type GaN sublayer, the second low-temperature P-type GaN sublayer and the third low-temperature P-type GaN sublayer are controlled to be sequentially stacked on the multi-quantum well layer when the low-temperature P-type GaN layer grows, the first low-temperature P-type GaN sublayer and the second low-temperature P-type GaN sublayer are both Mg-heavily doped AlInGaN layers, and the third low-temperature P-type GaN sublayer is an Mg-undoped GaN layer;
wherein the concentration of Al component in the first low-temperature P-type GaN sublayer is greater than that of Al component in the second low-temperature P-type GaN sublayer, and NH is controlled to control atmosphere when the third low-temperature P-type GaN sublayer grows3/N2/H2Is gradually changed into NH3/N2At the same time, the temperature gradually increases.
Preferably, the NH is3/N2/H2In a ratio of 1: 1: 2-1: 3: 5, NH of3/N2The ratio of (A) to (B) is 1:2 to 2: 1.
Preferably, in the step of controlling the first low-temperature P-type GaN sublayer, the second low-temperature P-type GaN sublayer and the third low-temperature P-type GaN sublayer to be sequentially stacked on the multi-quantum well layer during growth of the low-temperature P-type GaN layer, the concentration of the Al component in the first low-temperature P-type GaN sublayer is controlled to be 1 to 10 times that in the second low-temperature P-type GaN sublayer.
Preferably, the constant temperature of the growth of the low-temperature P-type GaN layer is 700-800 ℃, the growth pressure is 100-500 torr, and in the step of gradually increasing the temperature, the constant temperature is controlled to gradually increase by 100 ℃.
According to the embodiment of the invention, the LED chip comprises the GaN-based LED epitaxial wafer.
Compared with the prior art: by arranging the low-temperature P-type GaN layer, the low-temperature P-type GaN layer comprises a first low-temperature P-type GaN sublayer, a second low-temperature P-type GaN sublayer and a third low-temperature P-type GaN sublayer which are sequentially stacked, the first low-temperature P-type GaN sublayer and the second low-temperature P-type GaN sublayer are all AlInGaN layers heavily doped with Mg, the third low-temperature P-type GaN sublayer is a GaN layer not doped with Mg, wherein the concentration of Al components in the first low-temperature P-type GaN sublayer is greater than that of Al components in the second low-temperature P-type GaN sublayer, namely the concentration of the Al components in the low-temperature P-type GaN layer changes from high to low, the energy band of the low-temperature P-type GaN layer also changes along with the Al components, the low-temperature P-type GaN layer can block electronic overflow, and is favorable for injecting holes into a light-emitting region through the low-temperature P-type GaN layer, and particularly, the third low-temperature P-type GaN layer passes through NH from atmosphere3/N2/H2Is gradually changed into NH3/N2Meanwhile, the crystal quality of the low-temperature P-type GaN layer is improved, the growth capacity of the low-temperature P-type GaN layer along the side wall of the V-shaped pit is improved due to gradual increase of the atmosphere, the Mg-H bond can be broken through annealing due to increase of the temperature, the activated Mg concentration of the low-temperature P-type GaN layer is improved, the Ga atomic mobility can be improved, the growth of the low-temperature P-type GaN layer along the bottom of the V-shaped pit is promoted, and the LED photoelectric efficiency is improved.
Drawings
Fig. 1 is a schematic structural diagram of a GaN-based LED epitaxial wafer according to a first embodiment of the present invention;
fig. 2 is a schematic structural diagram of a low-temperature P-type GaN layer in a GaN-based LED epitaxial wafer according to a first embodiment of the present invention;
fig. 3 is a flowchart of an epitaxial growth method of a GaN-based LED epitaxial wafer in the second embodiment of the present invention.
The following detailed description will further illustrate the invention in conjunction with the above-described figures.
Detailed Description
To facilitate an understanding of the invention, the invention will now be described more fully with reference to the accompanying drawings. Several embodiments of the invention are presented in the drawings. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It will be understood that when an element is referred to as being "secured to" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and the like as used herein are for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
Example one
Referring to fig. 1 and 2, a GaN-based LED epitaxial wafer according to a first embodiment of the present invention is shown, which includes a substrate 10, and a buffer layer 20, an undoped GaN layer 30, an N-type GaN layer 40, a multi-quantum well layer 50, a low temperature P-type GaN layer 60, an electron blocking layer 70, a P-type GaN layer 80, and a P-type contact layer 90 sequentially stacked on the substrate 10.
In the bookIn the embodiment, the low-temperature P-type GaN layer 60 includes a first low-temperature P-type GaN sublayer 601, a second low-temperature P-type GaN sublayer 602, and a third low-temperature P-type GaN sublayer 603 stacked in sequence, where the first low-temperature P-type GaN sublayer 601 and the second low-temperature P-type GaN sublayer 602 are both heavily Mg-doped AlInGaN layers, and the third low-temperature P-type GaN sublayer 603 is an un-Mg-doped GaN layer, and it should be noted that a medium-micro-a 7 MOCVD (Metal-organic Chemical Vapor Deposition) equipment, a high-purity H-type GaN layer, or a high-purity H-type GaN layer, is adopted2(Hydrogen gas), high purity N2(Nitrogen), high purity H2And high purity N2One of the mixed gases of (1) is used as a carrier gas, high-purity NH is added3As the N source, trimethyl gallium (TMGa) and triethyl gallium (TEGa) as gallium sources, trimethyl indium (TMIn) as indium sources, trimethyl aluminum (TMAl) as aluminum sources, Silane (SiH)4) As N-type dopant, magnesium dicocene (CP)2Mg) as a P-type dopant.
Specifically, the epitaxial growth process is a process of growing an epitaxial layer from one end of the substrate 10 to the other end, after the multi-quantum well layer 50 is grown, the low-temperature P-type GaN layer 60 needs to be grown on the multi-quantum well layer 50, a first low-temperature P-type GaN sublayer 601 is firstly deposited on the multi-quantum well layer 50to obtain a first low-temperature P-type GaN sublayer 601 with the Al component concentration of 0.01-0.1, a second low-temperature P-type GaN sublayer 602 is then deposited on the first low-temperature P-type GaN sublayer 601 to obtain a second low-temperature P-type GaN sublayer 602 with the Al component concentration of 0.001-0.01, wherein the Al component concentration in the first low-temperature P-type GaN sublayer 601 is 1-10 times the Al component concentration in the second low-temperature P-type GaN sublayer 602, and since the Al component concentration in the first low-temperature P-type GaN 601 is greater than the Al component concentration in the second low-temperature P-type GaN 602, that is the Al component concentration in the low-temperature P-type GaN layer varies from high to low, then, the energy band thereof also changes with the Al composition, which can block the electron overflow and is also beneficial to injecting holes into the multiple quantum well layer 50 through the low temperature P-type GaN layer 60, and In composition concentrations of the first low temperature P-type GaN sublayer 601 and the second low temperature P-type GaN sublayer 602 are both 0.01 to 0.1.
It should be noted that the first low temperature P-type GaN sublayer 601 and the second low temperature P-type GaN sublayer 602 are at constant NH3/N2/H2Growing under atmosphere and temperature, and when the growth of the third low-temperature P-type GaN sublayer 603 is started after the growth of the first low-temperature P-type GaN sublayer 601 and the second low-temperature P-type GaN sublayer 602 is finished, the atmosphere is NH3/N2/H2Is gradually changed into NH3/N2I.e. decrease H2The introduction of the nitrogen-containing gas can improve the crystal quality of the low-temperature P-type GaN layer 60 on the one hand, and also improve the growth capability of the low-temperature P-type GaN layer 60 along the side wall of the V-shaped pit on the other hand, and meanwhile, the temperature of the third low-temperature P-type GaN sublayer 603 during growth is gradually improved, the Mg-H bond can be broken by annealing to improve the Mg concentration of the low-temperature P-type GaN layer 60 during activation by raising the temperature, the Ga atomic mobility can also be improved to promote the growth of the low-temperature P-type GaN layer 60 along the bottom of the V-shaped pit, and the injection area of a cavity from the V-shaped side wall is increased.
Wherein, the thickness of the low temperature P-type GaN layer 60 is 10nm to 50nm, such as 20nm, 25nm, 30nm, etc., the thickness of the second low temperature P-type GaN sublayer 602 is 1 to 5 times the thickness of the first low temperature P-type GaN sublayer 601, and the thickness of the second low temperature P-type GaN sublayer 602 is 1 to 5 times the thickness of the third low temperature P-type GaN sublayer 603, for example and without limitation, in some preferred embodiments of the present embodiment, the thickness of the buffer layer 20 is 10nm to 30nm, such as 15nm, 20nm, 25nm, etc.; the thickness of the non-doped GaN layer 30 is 1 μm to 5 μm, such as 2 μm, 3 μm, 4 μm, etc.; the thickness of the N-type GaN layer 40 is 2 μm to 3 μm, such as 2.2 μm, 2.3 μm, 2.4 μm, etc.; the thickness of the MQW layer 50 is 66nm to 186nm, for example, 100nm, 120nm, 140nm, etc.; the thickness of the electron blocking layer 70 is 10nm to 40nm, such as 15nm, 20nm, 25nm, etc.; the thickness of the P-type GaN layer is 10nm to 50nm, such as 15nm, 20nm, 25nm and the like; the thickness of the P-type contact layer is 5nm to 20nm, for example, 8nm, 10nm, 15nm, etc., it should be noted that the multiple quantum well layer 50 is a periodic structure in which InGaN quantum well layers and AlGaN quantum barrier layers are alternately stacked in sequence, and the number of stacking periods is 6 to 12, for example, 7, so that the multiple quantum well layer 50 has 14 layers, 7 InGaN quantum well layers, and 7 AlGaN quantum barrier layers in total.
Example two
Referring to fig. 3, a method for epitaxial growth of an LED epitaxial wafer according to a second embodiment of the present invention is shown, for preparing a GaN-based LED epitaxial wafer according to the first embodiment, the method specifically includes steps S201 to S209, where:
in step S201, a substrate required for growth is provided.
In this embodiment, the substrate is a sapphire substrate, which is exemplified but not limited to, in some preferred embodiments of this embodiment, the substrate may also be a silicon substrate, a silicon carbide substrate, a gallium nitride substrate, a zinc oxide substrate, etc., wherein the sapphire substrate is selected because its preparation process is mature, its yield is large, its cost is low, and its chemical stability and thermal stability are excellent.
Step S202, growing a buffer layer with the growth thickness of 10 nm-30 nm.
Specifically, the buffer layer is an AlN layer, and is deposited in a PVD (physical vapor deposition) system to a thickness of 15 nm.
The growth of the LED epitaxial wafer is realized by a medium-micro a7 MOCVD (Metal-organic Chemical Vapor Deposition, MOCVD for short) apparatus. Putting the sapphire substrate plated with the AlN buffer layer into MOCVD (metal organic chemical vapor deposition), and adopting high-purity H2(Hydrogen gas), high purity N2(Nitrogen), high purity H2And high purity N2One of the mixed gases of (1) is used as a carrier gas, high-purity NH is added3As the N source, trimethylgallium (TMGa) and triethylgallium (TEGa) were used as a gallium source, trimethylindium (TMIn) was used as an indium source, trimethylaluminum (TMAl) was used as an aluminum source, silane (SiH4) was used as an N-type dopant, and magnesium diclomelate (CP2Mg) was used as a P-type dopant, and epitaxial growth was performed.
Step S203, growing an unintentional doped GaN layer with a growth thickness of 1-5 μm.
Wherein the growth temperature of the undoped GaN layer is 1050-1200 ℃, and the growth pressure is 100-600 torr.
Preferably, the growth temperature of the undoped GaN layer is 1100 ℃, the growth pressure is 150torr, the growth thickness is 2-3 mu m, and the undoped GaN layer grown under the conditions has the advantages of excellent GaN crystal quality, Ga source saving and production cost saving.
Step S204, growing an N-type GaN layer with the growth thickness of 2-3 μm.
Wherein the growth temperature of the N-type GaN layer is 1050-1200 ℃, the growth pressure is 100-600 torr, and the Si doping concentration is 1E19atoms/cm3~5E19atoms/cm3。
Preferably, the growth conditions of the N-type GaN layer are that the growth temperature is 1120 ℃, the growth pressure is 100torr, and the doping concentration of Si is 2.5E19atoms/cm3。
And S205, growing a multi-quantum well layer with the growth thickness of 66 nm-186 nm.
In the embodiment, the multiple quantum well layer is an InGaN quantum well layer and an AlGaN quantum barrier layer which are alternately stacked in sequence, and it can be understood that after the growth of the N-type GaN layer is completed, the first sub-layer deposited on the N-type GaN layer is the InGaN quantum well layer, the second sub-layer is the AlGaN quantum barrier layer, and the rest is done until the cycle is finished, so that the multiple quantum well layer is obtained, wherein the thickness of the single-layer InGaN quantum well layer is 2nm to 3.5nm, the thickness of the single-layer AlGaN quantum barrier layer is 9nm to 12nm, the Al component is 0.1, the number of stacking cycles is 6 to 12, in addition, the growth temperature of the InGaN quantum well layer is 790 ℃ to 810 ℃, and the growth temperature of the AlGaN quantum barrier layer is 800 ℃ to 900 ℃.
Step S206, growing a low-temperature P-type GaN layer with the growth thickness of 10 nm-50 nm.
The low-temperature P-type GaN layer includes a first low-temperature P-type GaN sublayer, a second low-temperature P-type GaN sublayer, and a third low-temperature P-type GaN sublayer, which are sequentially stacked, and the first low-temperature P-type GaN sublayer, the second low-temperature P-type GaN sublayer, and the third low-temperature P-type GaN sublayer are sequentially stacked on the multi-quantum well layer when the low-temperature P-type GaN layer is grown, wherein the concentration of Al component in the first low-temperature P-type GaN sublayer is greater than that in the second low-temperature P-type GaN sublayer, and the atmosphere is controlled from NH component when the third low-temperature P-type GaN sublayer is grown3/N2/H2Is gradually changed into NH3/N2At the same time, the temperature gradually increases.
Specifically, the first low-temperature P-type GaN sublayer is an AlInGaN layer heavily doped with Mg, wherein the concentration of an Al component is 0.01-0.1, the concentration of an In component is 0.01-0.1, the second low-temperature P-type GaN sublayer is an AlInGaN layer heavily doped with Mg, wherein the concentration of an Al component is 0.001-0.01, the concentration of an In component is 0.01-0.1, and the low-temperature P-type G sublayer is a low-temperature P-type G layerThe Mg doping concentration of the first low-temperature P-type GaN sublayer and the second low-temperature P-type GaN sublayer in the aN layer is 1E19atoms/cm3~1E21atoms/cm3In addition, the concentration of the Al component in the first low-temperature P-type GaN sublayer is 1 to 10 times that of the Al component in the second low-temperature P-type GaN sublayer, for example, when the concentration of the Al component in the first low-temperature P-type GaN sublayer is 0.02 and the concentration of the Al component in the second low-temperature P-type GaN sublayer is 0.007, the concentration of the Al component in the first low-temperature P-type GaN sublayer is about 2.86 times that of the Al component in the second low-temperature P-type GaN sublayer, wherein the constant temperature of the growth of the low-temperature P-type GaN layer is 700 to 800 ℃, the growth pressure is 100to 500torr, it can be understood that the temperature and the pressure are constant and the constant NH is constant when the first low-temperature P-type GaN sublayer and the second low-temperature P-type GaN sublayer are grown3/N2/H2Growth in an atmosphere of NH3/N2/H2In a ratio of 1: 1: 2-1: 3: 5.
further, the third low-temperature P-type GaN sublayer is a GaN layer without Mg, wherein the atmosphere is controlled from NH when the third low-temperature P-type GaN sublayer is grown3/N2/H2Is gradually changed into NH3/N2Wherein NH3/N2The ratio of the low-temperature P-type GaN layer to the V-shaped pit is 1: 2-2: 1, the gradual change of the atmosphere improves the crystal quality of the low-temperature P-type GaN layer, the growth capability of the low-temperature P-type GaN layer along the side wall of the V-shaped pit is improved, meanwhile, the constant temperature is gradually increased by 100 ℃, for example, the constant temperature is 760 ℃ when the first low-temperature P-type GaN sublayer and the second low-temperature P-type GaN sublayer grow, when the third low-temperature P-type GaN sublayer grows, the temperature is increased from 760 ℃ to 860 ℃, the Mg-H bond can be broken through annealing by increasing the temperature, the activated Mg concentration of the low-temperature P-type GaN layer is improved, the Ga atomic mobility can be improved, the low-temperature P-type GaN layer grows along the bottom of the V-shaped pit, and the injection area of a cavity from the V-shaped side wall is increased.
Step S207, growing an electron blocking layer with the growth thickness of 10 nm-40 nm.
The material of the electron blocking layer is AlxInyGa1-x-yN, the growth temperature is 900-1000 ℃, the growth pressure is 100-300 torr, wherein the concentration of the Al component is 0.005<x<0.1, In component concentration of0.05<y<0.2。
Preferably, the electron blocking layer is Al0.05In0.1Ga0.85And the growth thickness of the N layer is 15nm, the growth temperature is 965 ℃, and the growth pressure is 200 torr.
Step S208, growing a P-type GaN layer with the growth thickness of 10 nm-50 nm.
Wherein the growth temperature of the P-type GaN layer is 900-1050 ℃, the growth pressure is 100-600 torr, and the Mg doping concentration is 1E19atoms/cm3~1E21atoms/cm3。
Preferably, the growth temperature of the P-type GaN layer is 985 ℃, the growth thickness is 15nm, the growth pressure is 200torr, and the Mg doping concentration is 2E20atoms/cm3。
Step S209, a P-type contact layer is grown, wherein the growth thickness of the P-type contact layer is 5 nm-20 nm.
Specifically, the growth temperature of the P-type contact layer is 850-950 ℃, the growth pressure is 100-400 torr, and the Mg doping concentration is 1E21atoms/cm3~5E21atoms/cm3。
Preferably, the growth temperature of the P-type contact layer is 895 ℃, the growth thickness is 5nm, the growth pressure is 200torr, and the Mg doping concentration is 2E21atoms/cm3。
To sum up, in the GaN-based LED epitaxial wafer and the epitaxial growth method thereof according to the embodiments of the present invention, by providing the low temperature P-type GaN layer, the low temperature P-type GaN layer includes the first low temperature P-type GaN sublayer, the second low temperature P-type GaN sublayer and the third low temperature P-type GaN sublayer that are sequentially stacked, the first low temperature P-type GaN sublayer and the second low temperature P-type GaN sublayer are both heavily Mg-doped AlInGaN layers, and the third low temperature P-type GaN sublayer is an undoped GaN layer, wherein the concentration of the Al component in the first low temperature P-type GaN sublayer is greater than the concentration of the Al component in the second low temperature P-type GaN sublayer, that is, the Al component concentration in the low temperature P-type GaN layer varies from high to low, and therefore, the energy band thereof also varies with the Al component, which can block the overflow of electrons and is also beneficial for injecting holes into the light emitting region through the low temperature P-type GaN layer, and the third low temperature P-type GaN sublayer is specifically configured by NH atmosphere3/N2/H2Is gradually changed into NH3/N2Simultaneously, the temperature is gradually increased to growThe gradual change of the atmosphere improves the crystal quality of the low-temperature P-type GaN layer, improves the growth capacity of the low-temperature P-type GaN layer along the side wall of the V-shaped pit, and the increase of the temperature can not only anneal and break Mg-H bonds, improve the activated Mg concentration of the low-temperature P-type GaN layer, but also improve the atomic mobility of Ga, promote the growth of the low-temperature P-type GaN layer along the bottom of the V-shaped pit, and improve the photoelectric efficiency of the LED.
EXAMPLE III
An embodiment of the present invention provides an LED chip, including the LED epitaxial wafer in the first embodiment, where the LED epitaxial wafer can be obtained by epitaxial growth using the epitaxial growth method of the LED epitaxial wafer in the second embodiment.
In the present embodiment, the thickness of the low temperature P-type GaN layer in the LED chip is 20nm, and the atmosphere NH is used when the low temperature P-type GaN layer is grown3/H2/N2The ratio of the first low-temperature P-type GaN sublayer to the second low-temperature P-type GaN sublayer is 1:1.3:2.3, wherein the thickness of the second low-temperature P-type GaN sublayer is 2 times that of the first low-temperature P-type GaN sublayer, the thickness of the first low-temperature P-type GaN sublayer is the same as that of the third low-temperature P-type GaN sublayer, and the first low-temperature P-type GaN sublayer is Al0.02In0.05Ga0.93The N layer and the second low-temperature P-type GaN sublayer are Al0.007In0.05Ga0.943N layer with Mg doping concentration of 1E20atoms/cm3The growth temperature is 760 ℃, the growth pressure is 200torr, when the third low-temperature P-type GaN sublayer is to be grown, the growth temperature is gradually increased from 760 ℃ to 860 ℃, and the growth atmosphere is NH3/H2/N2Gradual transition to NH in the ratio 1:1.3:2.33/N2The ratio of the LED chips to the LED chips is 1:1, the finally prepared LED chips are tested under the current of 120 mA/60 mA, the test result is improved by 1% compared with the existing LED chips, and other items of electrical properties are good.
Example four
In the present embodiment, the thickness of the low temperature P-type GaN layer in the LED chip is 25nm, and when the low temperature P-type GaN layer is grown, atmosphere NH is present3/H2/N2The ratio of the first low-temperature P-type GaN sublayer to the second low-temperature P-type GaN sublayer is 1:1.3:2.3, wherein the thickness of the second low-temperature P-type GaN sublayer is 2 times that of the first low-temperature P-type GaN sublayer, the thickness of the first low-temperature P-type GaN sublayer is the same as that of the third low-temperature P-type GaN sublayer, and the thickness of the first low-temperature P-type GaN sublayer is 1:1.3:2.3Al0.02In0.05Ga0.93The N layer and the second low-temperature P-type GaN sublayer are Al0.007In0.05Ga0.943N layer with Mg doping concentration of 1E20atoms/cm3The growth temperature is 760 ℃, the growth pressure is 200torr, when the third low-temperature P-type GaN sublayer is to be grown, the growth temperature is gradually increased from 760 ℃ to 860 ℃, and the growth atmosphere is NH3/H2/N2Gradual transition to NH in the ratio 1:1.3:2.33/N2The ratio of the LED chips to the LED chips is 1:1, the finally prepared LED chips are tested under the current of 120 mA/60 mA, the test result is improved by 0.5% compared with the existing LED chips, and other electric properties are good.
EXAMPLE five
In the present embodiment, the thickness of the low temperature P-type GaN layer in the LED chip is 20nm, and the atmosphere NH is used when the low temperature P-type GaN layer is grown3/H2/N2The ratio of the first low-temperature P-type GaN sublayer to the second low-temperature P-type GaN sublayer is 1:1.3:2.3, wherein the thickness of the second low-temperature P-type GaN sublayer is 3 times that of the first low-temperature P-type GaN sublayer, the thickness of the first low-temperature P-type GaN sublayer is the same as that of the third low-temperature P-type GaN sublayer, and the first low-temperature P-type GaN sublayer is Al0.02In0.05Ga0.93The N layer and the second low-temperature P-type GaN sublayer are Al0.007In0.05Ga0.943N layer with Mg doping concentration of 1E20atoms/cm3The growth temperature is 760 ℃, the growth pressure is 200torr, when the third low-temperature P-type GaN sublayer is to be grown, the growth temperature is gradually increased from 760 ℃ to 860 ℃, and the growth atmosphere is NH3/H2/N2Gradual transition to NH in the ratio 1:1.3:2.33/N2The ratio of the LED chips to the LED chips is 1:1, the finally prepared LED chips are tested under the current of 120 mA/60 mA, the test result is improved by 0.5% compared with the existing LED chips, and other electric properties are good.
EXAMPLE six
In the present embodiment, the thickness of the low temperature P-type GaN layer in the LED chip is 20nm, and the atmosphere NH is used when the low temperature P-type GaN layer is grown3/H2/N2The ratio of the thickness of the second low-temperature P-type GaN sublayer to the thickness of the third low-temperature P-type GaN sublayer is 1:1.3:2.3, wherein the thickness of the second low-temperature P-type GaN sublayer is 2 times that of the first low-temperature P-type GaN sublayer, and the thickness of the first low-temperature P-type GaN sublayer and the thickness of the third low-temperature P-type GaN sublayer areThe thickness is the same, in addition, the first low-temperature P-type GaN sublayer is Al0.03In0.05Ga0.92The N layer and the second low-temperature P-type GaN sublayer are Al0.008In0.05Ga0.942N layer with Mg doping concentration of 1E20atoms/cm3The growth temperature is 760 ℃, the growth pressure is 200torr, when the third low-temperature P-type GaN sublayer is to be grown, the growth temperature is gradually increased from 760 ℃ to 860 ℃, and the growth atmosphere is NH3/H2/N2Gradual transition to NH in a ratio of 1:1.3:2.33/N2The ratio of the LED chips to the LED chips is 1:1, the finally prepared LED chips are tested under the current of 120 mA/60 mA, the test result is improved by 0.7% compared with the existing LED chips, and other electric properties are good.
The test of the luminance of the chip manufactured by the epitaxial wafer in the prior art and the chip manufactured by the epitaxial wafer provided by the present invention are performed under the same conditions, as shown in table 1:
TABLE 1
Figure 220150DEST_PATH_IMAGE001
As can be seen from the table, the luminance of the chip manufactured by the epitaxial wafer provided by the invention is improved to a certain extent by 0.5% -1% compared with the luminance of the epitaxial wafer in the prior art.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is specific and detailed, but not to be understood as limiting the scope of the present invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (9)

1. The GaN-based LED epitaxial wafer is characterized by comprising a substrate, a buffer layer, an undoped GaN layer, an N-type GaN layer, a multi-quantum well layer, a low-temperature P-type GaN layer, an electronic barrier layer, a P-type GaN layer and a P-type contact layer, wherein the buffer layer, the undoped GaN layer, the N-type GaN layer, the multi-quantum well layer, the low-temperature P-type GaN layer, the electronic barrier layer, the P-type GaN layer and the P-type contact layer are sequentially stacked, the first low-temperature P-type GaN layer, the second low-temperature P-type GaN layer and the third low-temperature P-type GaN layer are all heavily Mg-doped AlInGaN layers, and the third low-temperature P-type GaN layer is an Mg-undoped GaN layer;
the content of Al component in the first low-temperature P-type GaN sublayer is greater than that of Al component in the second low-temperature P-type GaN sublayer, and the third low-temperature P-type GaN sublayer is composed of NH through atmosphere3/N2/H2Is gradually changed into NH3/N2Meanwhile, the growth is carried out in such a manner that the temperature is gradually increased.
2. The GaN-based LED epitaxial wafer according to claim 1, wherein the Al component content In the first low-temperature P-type GaN sub-layer is 0.01-0.1, the Al component content In the second low-temperature P-type GaN sub-layer is 0.001-0.01, and the In component content In each of the first low-temperature P-type GaN sub-layer and the second low-temperature P-type GaN sub-layer is 0.01-0.1.
3. The GaN-based LED epitaxial wafer as claimed in claim 1, wherein the Al component content in the first low-temperature P-type GaN sub-layer is 1-10 times that in the second low-temperature P-type GaN sub-layer.
4. The GaN-based LED epitaxial wafer according to claim 1, wherein the thickness of the low-temperature P-type GaN layer is 10nm to 50nm, wherein the thickness of the second low-temperature P-type GaN sub-layer is 1 times to 5 times the thickness of the first low-temperature P-type GaN sub-layer, and the thickness of the second low-temperature P-type GaN sub-layer is 1 times to 5 times the thickness of the third low-temperature P-type GaN sub-layer.
5. An epitaxial growth method of an LED epitaxial wafer for preparing the GaN-based LED epitaxial wafer according to any one of claims 1 to 4, the epitaxial growth method comprising:
providing a substrate required by growth;
sequentially epitaxially growing a buffer layer, an undoped GaN layer, an N-type GaN layer, a multi-quantum well layer, a low-temperature P-type GaN layer, an electronic barrier layer and a P-type GaN layer on a substrate;
the low-temperature P-type GaN layer comprises a first low-temperature P-type GaN sublayer, a second low-temperature P-type GaN sublayer and a third low-temperature P-type GaN sublayer which are sequentially stacked, the first low-temperature P-type GaN sublayer, the second low-temperature P-type GaN sublayer and the third low-temperature P-type GaN sublayer are controlled to be sequentially stacked on the multi-quantum well layer when the low-temperature P-type GaN layer grows, the first low-temperature P-type GaN sublayer and the second low-temperature P-type GaN sublayer are both Mg-heavily doped AlInGaN layers, and the third low-temperature P-type GaN sublayer is a GaN layer which is not doped with Mg;
wherein the content of Al component in the first low-temperature P-type GaN sublayer is greater than that of Al component in the second low-temperature P-type GaN sublayer, and NH is controlled to be in the atmosphere when the third low-temperature P-type GaN sublayer grows3/N2/H2Is gradually changed into NH3/N2At the same time, the temperature gradually increases.
6. The epitaxial growth method of an LED epitaxial wafer according to claim 5, wherein the NH is3/N2/H2In a ratio of 1: 1: 2-1: 3: 5, NH of3/N2The ratio of (A) to (B) is 1:2 to 2: 1.
7. The epitaxial growth method of the LED epitaxial wafer according to claim 5, wherein in the step of controlling the first, second and third low-temperature P-type GaN sublayers to be sequentially stacked on the multi-quantum well layer while growing the low-temperature P-type GaN layer, the Al component content in the first low-temperature P-type GaN sublayer is controlled to be 1 to 10 times the Al component content in the second low-temperature P-type GaN sublayer.
8. The epitaxial growth method of the LED epitaxial wafer according to claim 5, wherein the constant temperature for the growth of the low-temperature P-type GaN layer is 700 ℃ to 800 ℃, the growth pressure is 100torr to 500torr, and in the step of gradually increasing the temperature, the constant temperature is controlled to gradually increase by 100 ℃.
9. An LED chip comprising the GaN-based LED epitaxial wafer according to any one of claims 1 to 4.
CN202210392701.9A 2022-04-15 2022-04-15 GaN-based LED epitaxial wafer, epitaxial growth method and LED chip Active CN114497306B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210392701.9A CN114497306B (en) 2022-04-15 2022-04-15 GaN-based LED epitaxial wafer, epitaxial growth method and LED chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210392701.9A CN114497306B (en) 2022-04-15 2022-04-15 GaN-based LED epitaxial wafer, epitaxial growth method and LED chip

Publications (2)

Publication Number Publication Date
CN114497306A CN114497306A (en) 2022-05-13
CN114497306B true CN114497306B (en) 2022-07-12

Family

ID=81488487

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202210392701.9A Active CN114497306B (en) 2022-04-15 2022-04-15 GaN-based LED epitaxial wafer, epitaxial growth method and LED chip

Country Status (1)

Country Link
CN (1) CN114497306B (en)

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW329058B (en) * 1997-03-20 1998-04-01 Ind Tech Res Inst Manufacturing method for P type gallium nitride
CN104393124B (en) * 2014-11-25 2017-04-05 天津三安光电有限公司 A kind of preparation method of LED epitaxial slice structure
CN105304781B (en) * 2015-09-28 2018-04-20 湘能华磊光电股份有限公司 Lift the LED epitaxial structure and its growing method of Mg hole concentrations
CN105161591B (en) * 2015-10-22 2018-01-19 山东浪潮华光光电子股份有限公司 A kind of GaN base epitaxial structure for reducing voltage and its growing method
CN106848022B (en) * 2017-02-22 2019-07-30 湘能华磊光电股份有限公司 A kind of LED epitaxial structure and its growing method
CN108198921B (en) * 2017-11-30 2019-08-23 华灿光电(苏州）有限公司 A kind of gallium nitride based LED epitaxial slice and its manufacturing method
CN109301041B (en) * 2018-09-19 2020-06-02 华灿光电(苏州）有限公司 Light emitting diode epitaxial wafer and manufacturing method thereof
CN109904066B (en) * 2019-01-24 2021-10-01 华灿光电（浙江）有限公司 Preparation method of GaN-based light-emitting diode epitaxial wafer
CN113675303A (en) * 2021-08-20 2021-11-19 江西兆驰半导体有限公司 Nitride light-emitting diode epitaxial wafer and preparation method thereof

Also Published As

Publication number Publication date
CN114497306A (en) 2022-05-13

Similar Documents

Publication Publication Date Title
CN108091740B (en) Light emitting diode epitaxial wafer and manufacturing method thereof
CN110718612B (en) Light emitting diode epitaxial wafer and manufacturing method thereof
CN103824909B (en) A kind of epitaxy method improving GaN base LED luminosity
CN108461592B (en) A kind of LED epitaxial slice and its manufacturing method
CN109119515B (en) Light emitting diode epitaxial wafer and manufacturing method thereof
CN114975704B (en) LED epitaxial wafer and preparation method thereof
CN115188863B (en) Light emitting diode epitaxial wafer and preparation method thereof
CN108336198B (en) A kind of LED epitaxial slice and its manufacturing method
CN115458650A (en) Light emitting diode epitaxial wafer, preparation method thereof and light emitting diode
CN109346583B (en) Light emitting diode epitaxial wafer and preparation method thereof
CN116230825B (en) LED epitaxial wafer with hole injection layer regulated and controlled by hydrogen impurities and preparation method thereof
CN116072780B (en) Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode
CN109449264B (en) Light emitting diode epitaxial wafer and manufacturing method thereof
CN115986018B (en) Epitaxial wafer, epitaxial wafer preparation method and light-emitting diode
CN116314496B (en) High-light-efficiency light-emitting diode epitaxial wafer, preparation method thereof and LED
CN114883460A (en) Light emitting diode epitaxial wafer and preparation method thereof
CN109671817B (en) Light emitting diode epitaxial wafer and preparation method thereof
CN114551664A (en) LED epitaxial wafer, epitaxial growth method and LED chip
CN112259647B (en) Preparation method of light-emitting diode epitaxial wafer and light-emitting diode epitaxial wafer
CN116525735B (en) Light-emitting diode epitaxial wafer and preparation method thereof
CN108281519A (en) A kind of LED epitaxial slice and its manufacturing method
CN109473521B (en) Light emitting diode epitaxial wafer and preparation method thereof
CN217641376U (en) LED epitaxial wafer and LED chip
CN116845153A (en) High-light-efficiency light-emitting diode epitaxial wafer, preparation method and LED
CN114464709B (en) LED epitaxial wafer, epitaxial growth method and LED chip

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant