CN114975704B - LED epitaxial wafer and preparation method thereof - Google Patents

LED epitaxial wafer and preparation method thereof Download PDF

Info

Publication number
CN114975704B
CN114975704B CN202210918847.2A CN202210918847A CN114975704B CN 114975704 B CN114975704 B CN 114975704B CN 202210918847 A CN202210918847 A CN 202210918847A CN 114975704 B CN114975704 B CN 114975704B
Authority
CN
China
Prior art keywords
layer
quantum well
sub
epitaxial wafer
led epitaxial
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202210918847.2A
Other languages
Chinese (zh)
Other versions
CN114975704A (en
Inventor
谢志文
张铭信
陈铭胜
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Jiangxi Zhao Chi Semiconductor Co Ltd
Original Assignee
Jiangxi Zhao Chi Semiconductor Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jiangxi Zhao Chi Semiconductor Co Ltd filed Critical Jiangxi Zhao Chi Semiconductor Co Ltd
Priority to CN202210918847.2A priority Critical patent/CN114975704B/en
Publication of CN114975704A publication Critical patent/CN114975704A/en
Application granted granted Critical
Publication of CN114975704B publication Critical patent/CN114975704B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of group III and group V of the periodic system
    • H01L33/32Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
    • H01L33/325Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen characterised by the doping materials

Abstract

The invention provides an LED epitaxial wafer and a preparation method thereof, wherein the LED epitaxial wafer comprises a multi-quantum well layer, the multi-quantum well layer comprises InGaN quantum well layers and Sc component-containing quantum barrier layers which are alternately arranged, the Sc component-containing quantum barrier layers comprise first sub-layers and second sub-layers which are alternately arranged, the first sub-layers are GaN layers, and the second sub-layers are ScAlGaN layers. By sequentially laminating the GaN layer and the ScAlGaN layer and adopting a superlattice structure of GaN/ScAlGaN, the barrier height to electrons in the multi-quantum well layer is improved, and the leakage of electrons is reduced. The ScAlGaN layer and the GaN layer are sequentially stacked, and in-plane lattice constant matching and strain-free material growth can be realized, so that the dislocation density of an active region of the device is reduced, dislocation scattering and a leakage channel are reduced, and the performance and reliability of the device are improved.

Description

LED epitaxial wafer and preparation method thereof
Technical Field
The invention relates to the technical field of semiconductors, in particular to an LED epitaxial wafer and a preparation method thereof.
Background
An LED (light emitting diode) has the advantages of energy saving, environmental protection, long service life, and the like, and is a third generation electric lighting source following incandescent lamps and fluorescent lamps. Nowadays, LEDs are widely used in people's daily life, such as general lighting, indicator lights, toys, traffic lights, mobile phones, large-sized display screens, architectural landscape decorations, lamps for automobiles, and the like.
The conventional GaN-based LED epitaxial wafer comprises a substrate, and a low-temperature buffer layer, a three-dimensional nucleation layer, an undoped GaN layer, an N-type GaN layer, a multi-quantum well layer, an electronic barrier layer and a P-type layer which are sequentially stacked on the substrate, wherein the multi-quantum well layer comprises an InGaN well layer and a GaN barrier layer which alternately grow, and the electronic barrier layer is a P-type AlGaN layer.
However, because electrons have smaller effective mass and higher mobility, the moving rate of the electrons is far greater than that of holes, and because the number of the electrons is also greater than that of the holes, and because the polarization effect exists between the last GaN barrier layer of the multiple quantum well layer and the P-type AlGaN electron barrier layer due to lattice mismatch, the energy band of the electron barrier layer is bent downwards, and the blocking effect of the electron barrier layer on the electrons is reduced, so that under the high-current working condition, the LEDs can generate electron overflow, electrons can easily pass through the multiple quantum well layer and run to the P-type layer and the holes to generate non-radiative recombination, and further the light emitting efficiency of the LEDs is reduced. Under the current situation, the ScAlN layer grows in the quantum barrier layer, so that the problem that the LED luminous efficiency is reduced due to stress and defects generated on the active layer caused by lattice adaptation is solved. However, sc is a light rare earth element, the atomic radius of Sc is larger than that of Al, large lattice distortion can be generated in the ScAlN layer with a high Sc composition, and the ionic bond proportion in the ScAlN layer can be increased because Sc has a small electronegativity. The ScAlN layer has high spontaneous polarization coefficient, and the quantum barrier layer formed by alternately growing the ScAlN layer and the GaN layer can generate stress and defects due to lattice mismatch and also has great polarization stress.
Disclosure of Invention
Aiming at the defects of the prior art, the invention aims to provide an LED epitaxial wafer and a preparation method thereof, and aims to solve the technical problem that in the prior art, lattice mismatch between a GaN barrier layer and an AlGaN electron barrier layer lowers the potential barrier of the AlGaN electron barrier layer, thereby affecting the electron blocking capability and lowering the luminous efficiency of an LED.
In order to achieve the above object, one aspect of the present invention provides an LED epitaxial wafer: the multi-quantum well structure comprises a multi-quantum well layer and is characterized in that the multi-quantum well layer comprises InGaN quantum well layers and quantum barrier layers containing Sc components which are alternately arranged, the quantum barrier layers containing Sc components comprise first sub-layers and second sub-layers which are alternately arranged, the first sub-layers are GaN layers, the second sub-layers are ScAlGaN layers, and the ScAlGaN layers are Sc layersaAlbGa1-a-bN layers, wherein a is 0.1 to 0.18, b is more than a and less than 1, and a + b is less than 1.
Compared with the prior art, the invention has the beneficial effects that: by converting the existing GaN quantum barrier layer into the GaN layer and the Sc layer which are periodically and sequentially stackedaAlbGa1-a-bN layer, wherein a is 0.1 to 0.18, a is less than b and less than 1, a + b is less than 1, a superlattice structure of GaN/ScAlGaN is adopted, the barrier height to electrons in the multi-quantum well layer can be still improved on the premise of growing the ScAlGaN layer which is very thin, and the barrier height of electrons is reducedAnd (4) leakage. Because the atomic coefficient of Ga is 31 and the atomic radius of Ga is larger than that of Sc, sc is doped into the GaN-based material, and when the component a of Sc is 0.1 to 0.18, the lattice constant of the ScAlGaN layer is 3.189 which is the same as that of the GaN layer. And the electronegativity of Ga atoms is smaller than that of N atoms in GaN crystal (N =3.4, ga = 1.8), which can cancel the electronegativity of Sc, reducing its spontaneous polarization effect. The ScAlGaN layer and the GaN layer are sequentially stacked, and in-plane lattice constant matching and strain-free material growth can be realized, so that the dislocation density of an active region of the device is reduced, dislocation scattering and a leakage channel are reduced, and the performance and reliability of the device are improved.
Further, the InGaN quantum well layer and the Sc-containing component quantum barrier layer are mutually laminated to form a first periodic structure, the multiple quantum well layer comprises M first periodic structures, and the value range of M is as follows: m is more than or equal to 8 and less than or equal to 12.
Further, in the M first periodic structures, the ScaAlbGa1-a-bAnd the component a of Sc in the N layer is gradually decreased from bottom to top layer by layer.
Further, the first sublayer and the second sublayer are stacked to form a second periodic structure, the Sc-containing quantum barrier layer includes N second periodic structures, and a value range of N is as follows: n is more than or equal to 1 and less than or equal to 10.
Furthermore, the thickness of the first sublayer is 8~9 angstroms, and the thickness of the second sublayer is 1~2 angstroms.
Still further, the LED epitaxial wafer further includes: the substrate is sequentially provided with a buffer layer, a three-dimensional nucleating layer, a two-dimensional merging layer, an undoped GaN layer, an N-type GaN layer, a multi-quantum well layer and a P-type layer in a stacking mode from bottom to top.
The invention provides a preparation method of an LED epitaxial wafer, which is used for preparing the LED epitaxial wafer, and the preparation method of the LED epitaxial wafer comprises the following steps:
in the step of depositing the multi-quantum well layer, an InGaN quantum well layer and a Sc-containing component quantum barrier layer are alternately grown to form the multi-quantum well layer, wherein the Sc-containing component quantum barrier layer is formed by alternately growing a first sub-layer and a second sub-layer, the first sub-layer is a GaN layer, and the second sub-layer is an ScAlGaN layer.
Further, the method also comprises the following steps:
providing a substrate required by growth, and depositing a buffer layer on the substrate;
depositing a three-dimensional nucleation layer on the buffer layer;
depositing a two-dimensional merged layer on the three-dimensional nucleation layer;
depositing an undoped GaN layer on the two-dimensional merged layer;
depositing an N-type GaN layer on the undoped GaN layer;
depositing the multi-quantum well layer on the N-type GaN layer;
and depositing a P-type layer on the multi-quantum well layer.
Furthermore, the doping elements of the first sublayer and the second sublayer are both Si, and the doping concentration thereof is as follows: 1E18 to 5E18atoms/cm3
Further, in the step of depositing the multiple quantum well layer, an InGaN quantum well layer and a Sc-containing component quantum barrier layer are alternately grown to form the multiple quantum well layer, wherein the step of forming the Sc-containing component quantum barrier layer by alternately growing a GaN layer and an sccalgan layer includes:
introducing NH with the flow rate of 50to 220slm3As a source of N;
introducing TEGa with the flow rate of 300 to 600sccm as a Ga source;
introducing TMIn with the flow rate of 1000-2500 sccm as an In source;
introducing SiH with the flow rate of 100 to 300sccm4As an N-type dopant;
introducing Sc (TMHD) with the flow rate of 100 to 800sccm3As a source of Sc;
introducing TMAl with the flow rate of 100 to 800sccm as an Al source.
The details of one or more embodiments of the application are set forth in the accompanying drawings and the description below to provide a more thorough understanding of the application.
Drawings
Fig. 1 is a schematic structural diagram of an LED epitaxial wafer according to a first embodiment of the present invention;
fig. 2 is a flow chart of a method for manufacturing an LED epitaxial wafer according to a second embodiment of the present invention;
description of the main element symbols:
substrate 10 Buffer layer 20
Three-dimensional nucleation layer 30 Two-dimensional merged layer 40
Undoped GaN layer 50 N-type GaN layer 60
Multiple quantum well layer 70 InGaN quantum well layer 710
Sc component-containing quantum barrier layer 720 GaN layer 721
ScAlGaN layer 722 P-type layer 80
P-type electron blocking layer 810 P-type undoped GaN layer 820
P-type Mg-doped GaN layer 830 P-type contact layer 840
The following detailed description will further illustrate the invention in conjunction with the above-described figures.
Detailed Description
To facilitate an understanding of the invention, the invention will now be described more fully with reference to the accompanying drawings. Several embodiments of the invention are shown in the drawings. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It will be understood that when an element is referred to as being "secured to" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and the like as used herein are for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
Referring to fig. 1, in the LED epitaxial wafer according to the first embodiment of the present invention, the preparation of the wafer includes two major links of the preparation of the substrate 10 and the epitaxial process. The substrate 10 (substrate) is a wafer made of a semiconductor single crystal material, and the substrate 10 may directly enter a wafer manufacturing link to produce a semiconductor device, or may be processed by an epitaxial process to form an epitaxial structure. Epitaxy (epitaxiy) refers to a process of growing a new single crystal on the substrate 10 which is carefully processed by cutting, grinding, polishing, etc., and the new single crystal may be the same material as the substrate 10 or a different material (i.e., homoepitaxy or heteroepitaxy). Since the new single crystal grows with crystal phase extension of the substrate 10, it is called an epitaxial structure. The device is fabricated on the epitaxial structure by forward epitaxy, and is called reverse epitaxy if the device is fabricated on the substrate 10. The LED epitaxial wafer comprises a substrate 10, a buffer layer 20, a three-dimensional nucleation layer 30, a two-dimensional combination layer 40, an undoped GaN layer 50, an N-type GaN layer 60, a multi-quantum well layer 70 and a P-type layer 80, wherein the buffer layer 20, the three-dimensional nucleation layer 30, the two-dimensional combination layer 40, the undoped GaN layer 50, the N-type GaN layer 60, the multi-quantum well layer 70 and the P-type layer 80 are sequentially stacked on the substrate 10 from bottom to top. The P-type layer 80 includes a P-type electron blocking layer 810, a P-type undoped GaN layer 820, a P-type Mg-doped GaN layer 830 and a P-type contact layer 840, which are sequentially stacked on the multiple quantum well layer 70 from bottom to top. Preferably, the LED epitaxial wafer is grown using a Metal Organic Chemical Vapor Deposition (MOCVD) apparatus.
The multiple quantum well layer 70 comprises InGaN quantum well layers 710 and Sc-containing component quantum barrier layers 720 which are alternately arranged, the Sc-containing component quantum barrier layers 720 comprise first sub-layers and second sub-layers which are alternately arranged, preferably, the first sub-layers are GaN layers 721, and the second sub-layers are ScAlGaN layers 722. Because the effective mass of electrons is smaller than that of holes, under the high-current working condition, the LED can generate electron overflow, electrons can rapidly cross the multiple quantum well layer 70 to reach the P-type layer 80, and non-radiative recombination occurs, in the traditional multiple quantum well layer, the GaN quantum barrier layer has small forbidden bandwidth and insufficient barrier height, and the phenomenon of electron overflow can be inevitably generated. By replacing the conventional AlGaN layer with the Sc-component-containing quantum barrier layer 720, the ScAlGaN layer 722 and the GaN layer 721 can realize lattice matching on a heterojunction interface, the interface stress of the lattice matching is basically 0, the interface surface is smooth, the dislocation density is relatively low, the barrier height reduction of the ScAlGaN layer 722 is avoided, and the blocking capability to electrons is ensured. Secondly, the forbidden bandwidth of the ScAlGaN layer 722 is within the range of 4.5 to 6.2eV, and compared with the AlGaN layer, the thickness of the ScAlGaN layer 722 can have a sufficiently high barrier height to block electrons even though the thickness is very thin, and if the ScAlGaN layer 722 is designed to have the same film thickness as the AlGaN layer, the ScAlGaN layer 722 can obtain stronger electron blocking capability.
The multiple quantum well layer 70 comprises InGaN quantum well layers 710 and Sc-containing component quantum barrier layers 720 which are periodically and alternately arranged, the first sub-layer and the second sub-layer are stacked, that is, the InGaN quantum well layers 710 and the Sc-containing component quantum barrier layers 720 are stacked to form a first periodic structure, the multiple quantum well layer 70 comprises M first periodic structures, wherein the value range of M is as follows: m is more than or equal to 8 and less than or equal to 12. It is understood that M is a positive integer, M represents the number of periods of the alternating growth of the InGaN quantum well layer 710 and the Sc component-containing quantum barrier layer 720, and the larger M represents the more electrons and holes are bound to the quantum well layer, thereby increasing the luminous efficiency of the LED, but because of the positive integer, the LED has a higher luminous efficiencyThe InGaN quantum well layer 710 and the Sc component-containing quantum barrier layer 720 are grown alternately In a heterojunction structure with two different forbidden band widths, in atomic coefficient of the InGaN quantum well layer 710 is very large, equilibrium vapor pressure of N is the highest of all III-VI, and NH needs to be cracked at higher temperature to ensure the equilibrium vapor pressure of N3Since In-N bonds are weak and are easy to break, in atoms are easy to desorb from the growth surface or form In metal drops, the larger the number of InGaN quantum well layers 710 grown, the corresponding defect density is increased In a gradient manner, and by setting the value of M to be between 8 and 12, the electron and hole confinement effect of the multiple quantum well layer 70 is optimal, and the defect density is relatively small, that is, the internal quantum efficiency is optimal.
The Sc-containing component quantum barrier layer 720 comprises GaN layers 721 and ScAlGaN layers 722 which are periodically and alternately arranged, the GaN layers 721 and the ScAlGaN layers 722 are mutually laminated to form a second periodic structure, the Sc-containing component quantum barrier layer 720 comprises N second periodic structures, and the value range of N is as follows: n is more than or equal to 1 and less than or equal to 10. By alternately growing the GaN layer 721 and the ScAlGaN layer 722 which are made of different materials and have lattice matching, after the relatively thin ScAlGaN layer 722 and the relatively thick GaN layer 721 are alternately grown, the good blocking capability for electrons can be ensured, and the barrier height can be increased under the condition of controlling the thickness of the multiple quantum well layer 70. The thickness of the GaN layer 721 is 8~9 angstroms, the thickness of the ScAlGaN layer 722 is 1~2 angstroms, and the total thickness of the Sc-containing quantum barrier layer 720 can be controlled within a range of 10 to 100 angstroms by controlling the period N within a value range, so that the interface stress of the heterojunction epitaxial growth is prevented from being influenced by the too thick thickness of the multiple quantum well layer 70, and it can be understood that N is a positive integer.
The doping elements of the first sublayer and the second sublayer are both Si, that is, the doping elements of the GaN layer 721 and the ScAlGaN layer 722 are both Si, which is a tetravalent element, and Ga in the GaN layer 721 is a trivalent element, at this time, when the Ga atom is replaced by the Si atom, electrons are provided, the ScAlGaN layer 722 can play a role in blocking electron transition, so that more electrons are confined in the multiple quantum well layer 70, and electrons and holes are in the multiple quantum well layerLight is recombined in the well layer 70. Si is doped in the first sub-layer and the second sub-layer, and an artificial gap is formed in crystallography. Although the heavily doped Si replaces Ga to provide electrons, the overdoping may also cause excessive gaps in the GaN layer and form dislocations, and in some preferred embodiments of the present embodiment, the doping concentration of Si is: 1E18atoms/cm3. It is to be understood that the doping concentration of Si in the plurality of Sc-containing component quantum barrier layers 720 is gradually decreased or maintained in layers along the stacking direction away from the LED epitaxial wafer.
The second sublayer is ScaAlbGa1-a-bThe N layer, namely the ScAlGaN layer 722 is ScaAlbGa1-a-b The ScAlGaN layer 722 is provided with a Sc component, b Al component and 1-a-b Ga component, wherein a is<b<1,a+b<1. In some preferred embodiments of this embodiment, sc has a component a of 0.18, al has a component b of 0.42, and Ga has a component 1-a-b of 0.4. The lattice matching degree between the ScAlGaN layer 722 and the GaN layer 721 is changed according to the composition of Sc in the ScAlGaN layer 722, and the interfacial compressive tensile stress between the ScAlGaN layer 722 and the GaN layer 721 can be reduced by controlling the composition of Sc within a value range, and preferably, when a is 0.18, there is no interfacial compressive tensile stress between the ScAlGaN layer 722 and the GaN layer 721.
By converting the existing GaN quantum barrier layer into the GaN layer and the Sc layer which are periodically and sequentially laminatedaAlbGa1-a-bThe N layer adopts a superlattice structure of GaN/ScAlGaN, so that the barrier height to electrons in the multi-quantum well layer can be still increased on the premise of growing the very thin ScAlGaN layer, and the leakage of electrons is reduced. Because the atomic coefficient of Ga is 31 and the atomic radius of Ga is larger than that of Sc, sc is doped into the GaN-based material, and when the component a of Sc is 0.1 to 0.18, the lattice constant of the ScAlGaN layer is 3.189 which is the same as that of the GaN layer. And the electronegativity of Ga atoms is smaller than that of N atoms in GaN crystal (N =3.4, ga = 1.8), which can cancel the electronegativity of Sc, reducing its spontaneous polarization effect. The ScAlGaN layer and the GaN layer are sequentially laminated, so that in-plane lattice constant can be realizedAnd matching and strain-free materials grow, so that the dislocation density of an active region of the device is reduced, dislocation scattering and a leakage channel are reduced, and the performance and reliability of the device are improved.
The InGaN quantum well layer 710 is IncGa1-cIn the N layer, namely the InGaN quantum well layer 710, the composition of In is c, the composition of Ga is 1~c, wherein c is more than 0 and less than or equal to 1. The forbidden bandwidth of the InGaN quantum well layer 710 is different from that of the GaN layer 721, so that a potential well is formed to confine electrons and holes, the In component In the InGaN quantum well layer 710 is adjusted, and the forbidden bandwidth of the InGaN quantum well layer 710 is adjusted.
Referring to fig. 2, a second embodiment of the present invention provides a method for manufacturing an LED epitaxial wafer, which is used for manufacturing the LED epitaxial wafer in the above technical solution, and the LED epitaxial wafer is grown by using a Metal Organic Chemical Vapor Deposition (MOCVD) apparatus, wherein high-purity ammonia (NH) is used3) As a source of N (nitrogen), trimethyl gallium (TMGa) and triethyl gallium (TEGa) as Ga (gallium), trimethyl indium (TMIn) as In (indium) source, trimethyl aluminum (TMAl) as Al (aluminum) source, in which Silane (SiH) is added4) As N-type dopant, magnesium dicocene (CP)2Mg) as a P-type dopant while using high-purity H2(hydrogen) or N2(Nitrogen) or high purity H2(Hydrogen) and N2The mixed gas of (nitrogen) is used as a carrier gas, and specifically comprises the following steps:
s10: providing a substrate required by growth, and depositing a buffer layer on the substrate;
depositing an AlN buffer layer or a GaN buffer layer or an AlGaN buffer layer on the substrate by adopting a metal organic gas phase chemical deposition method, wherein the growth pressure of a reaction chamber is 50to 200torr, the rotating speed of a graphite base is controlled to be 500to 1000r/min, NH3 with the flow of 20slm to 70slm is introduced to be used as an N (nitrogen) source, TMGa with the flow of 20sccm to 150sccm is introduced to be used as a Ga (gallium) source, trimethylaluminum with the flow of 20 to 120sccm TMAl is introduced to be used as an aluminum source, and the AlN buffer layer or the GaN buffer layer or the AlGaN buffer layer with the thickness of 5nm to 15nm is deposited on the substrate.
S20: depositing a three-dimensional nucleation layer on the buffer layer;
introducing NH3 with the flow rate of 10slm to 60slm as an N (nitrogen) source, introducing TMGa with the flow rate of 200sccm to 500sccm as a Ga (gallium) source, raising the temperature of the reaction chamber to 1060 ℃ to 1090 ℃, controlling the pressure to be 200torr to 500torr, and reducing the rotation speed of the graphite base to 500to 1000r/min, so that a GaN three-dimensional nucleation layer grows, and controlling the thickness of the three-dimensional nucleation layer to be 500nm to 1000nm.
S30: depositing a two-dimensional merged layer on the three-dimensional nucleation layer;
raising the temperature of the reaction chamber to 1100-1300 ℃, controlling the pressure to be 150torr-250torr, controlling the rotation speed of the graphite base to be 800-1200 r/min, and introducing NH with the flow rate of 40slm-90slm3And (3) as an N (nitrogen) source, introducing TMGa with the flow rate of 300sccm to 1000sccm as a Ga (gallium) source, growing a GaN two-dimensional merging layer, and controlling the thickness of the two-dimensional merging layer to be 500nm to 1500nm.
S40: depositing an undoped GaN layer on the two-dimensional merged layer;
raising the temperature of the reaction chamber to 1100-1450 ℃, controlling the pressure to 150-250 torr, controlling the rotating speed of the graphite base to 800-1200 r/min, introducing NH3 with the flow rate of 40slm-90slm as an N (nitrogen) source, introducing TMGa with the flow rate of 300sccm-900sccm as a Ga (gallium) source, growing the undoped GaN layer, and controlling the thickness of the undoped GaN layer to 1000nm-1500 nm;
s50: depositing an N-type GaN layer on the undoped GaN layer;
reducing the temperature of the reaction chamber to 1090-1100 ℃, controlling the pressure to 150-250 torr, controlling the rotating speed of the graphite base to 800-1200 r/min, introducing NH3 with the flow rate of 30slm-80slm as an N (nitrogen) source, introducing TMGa with the flow rate of 200sccm-500sccm as a Ga (gallium) source, and introducing SiH with the flow rate of 100sccm-300sccm4As an N-type dopant, wherein the doping concentration of Si is 8E18atoms/cm3~1.5E19atoms/cm3And growing the Si-doped N-type GaN layer, and controlling the thickness of the N-type GaN layer to be 1500-2000 nm.
The undoped GaN layer is a transition layer between the two-dimensional combined layer and the N-type GaN layer, the difference between the introduced gas flow and the introduced gas flow during the growth of the two-dimensional combined layer is not large, and the growth temperature is higher.
The N-type GaN layer is used as a main epitaxial layer for providing electrons, and SiH is introduced when the N-type GaN layer grows4And providing Si element, wherein Si is tetravalent element, and Ga is trivalent element in the N-type GaN layer, wherein Si atoms provide electrons when replacing Ga atoms, thereby forming the N-type GaN layer providing electrons.
S60: depositing the multiple quantum well layer on the N-type GaN layer, and in the step of depositing the multiple quantum well layer, alternately growing an InGaN quantum well layer and a Sc-containing component quantum barrier layer to form the multiple quantum well layer, wherein the Sc-containing component quantum barrier layer is formed by alternately growing a first sub-layer and a second sub-layer, the first sub-layer is a GaN layer, and the second sub-layer is a ScAlGaN layer;
specifically, the InGaN quantum well layer and the Sc-containing component quantum barrier layer are alternately grown when the multiple quantum well layer is deposited, preferably, the multiple quantum well layer is formed by alternately growing M periodic InGaN quantum well layers and Sc-containing component quantum barrier layers, and the GaN layer and the ScAlGaN layer are alternately grown when the Sc-containing component quantum barrier layer is grown, preferably, the Sc-containing component quantum barrier layer is formed by alternately growing N periodic GaN layers and ScAlGaN layers. Preferably, the thickness of the GaN layer is 8~9 angstroms, the thickness of the ScAlGaN layer is 1~2 angstroms, and the total thickness of the Sc component-containing quantum barrier layer can be controlled to be about 10 to 100 angstroms by controlling the period N within a value range.
The second sublayer is ScaAlbGa1-a-bThe N layer, namely the ScAlGaN layer is ScaAlbGa1-a-bAnd a N layer, wherein Sc has a composition a, al has a composition b, and Ga has a composition 1-a-b, wherein a < b < 1, and a + b < 1, and in some preferred embodiments of this embodiment Sc has a composition a of 0.18, al has a composition b of 0.42, and Ga has a composition 1-a-b of 0.4. According to the composition of Sc in the ScAlGaN layer, the Sc and the AlGaN are differentThe lattice matching degree with the GaN layer can be changed along with the change of the lattice matching degree, the interfacial compressive tensile stress between the ScAlGaN layer and the GaN layer can be reduced by controlling the Sc composition within a value range, and when the a is 0.18, the interfacial compressive tensile stress between the ScAlGaN layer and the GaN layer is not generated.
The InGaN quantum well layer is IncGa1-cIn the N layer, namely the InGaN quantum well layer, the In composition is c, the Ga composition is 1~c, and c is more than 0 and less than or equal to 1. The forbidden bandwidth of the InGaN quantum well layer is different from that of the GaN layer, so that a potential well is formed to confine electrons and holes, the In component In the InGaN quantum well layer is adjusted, and the forbidden bandwidth of the InGaN quantum well layer is adjusted.
Setting the growth temperature of the reaction chamber to be 750-900 ℃, the pressure to be 150-250torr, adjusting the rotating speed of the graphite base bearing the substrate to be 500-800 r/min, introducing NH3 with the flow rate of 50-220slm as an N (nitrogen) source, introducing TEGa with the flow rate of 300-600sccm as a Ga (gallium) source, introducing TMIn with the flow rate of 1000-0 sccm as an In (indium) source, and introducing SiH with the flow rate of 100-300sccm4Sc (TMHD) was introduced as an N-type dopant at a flow rate of 100 to 800sccm3As Sc (scandium) source, while the doping concentration of Si is 1E18atoms/cm3And introducing TMAl with the flow of 100 to 800sccm as an Al (aluminum) source to respectively generate the InGaN quantum well layer, the GaN layer and the ScAlGaN layer which alternately grow periodically.
It is understood that the doping elements of the first sublayer and the second sublayer are both Si, that is, the doping elements of the GaN layer and the ScAlGaN layer are both Si, si is a tetravalent element, and Ga in the GaN layer is a trivalent element, in this case, when the Ga atom is replaced by the Si atom, electrons are provided, and the ScAlGaN layer can play a role in blocking electron transitions, so that more electrons are confined in the multiple quantum well layer, and electrons and holes recombine in the multiple quantum well layer to emit light. Si is doped in the first sublayer and the second sublayer, and an artificial gap is formed in crystallography.
By converting the existing GaN quantum barrier layer into the GaN layer and the Sc layer which are periodically and sequentially laminatedaAlbGa1-a-bThe N layer adopts a superlattice structure of GaN/ScAlGaN, so that the barrier height to electrons in the multi-quantum well layer can be still improved on the premise of growing the very thin ScAlGaN layer, and the leakage of electrons is reduced. Because the atomic coefficient of Ga is 31 and the atomic radius of Ga is larger than that of Sc, sc is doped into the GaN-based material, and when the component a of Sc is 0.1 to 0.18, the lattice constant of the ScAlGaN layer is 3.189 which is the same as that of the GaN layer. And the electronegativity of Ga atoms is smaller than that of N atoms in GaN crystals (N =3.4, ga = 1.8), which can cancel the electronegativity of Sc, reducing its spontaneous polarization effect. The ScAlGaN layer and the GaN layer are sequentially stacked, and in-plane lattice constant matching and strain-free material growth can be realized, so that the dislocation density of an active region of the device is reduced, dislocation scattering and a leakage channel are reduced, and the performance and reliability of the device are improved.
S70: and depositing a P-type layer on the multi-quantum well layer.
The P-type layer comprises a P-type electronic barrier layer, a P-type undoped GaN layer, a P-type Mg-doped GaN layer and a P-type contact layer which are arranged In a stacked mode, the temperature of the reaction chamber is increased to 850-950 ℃, the pressure is controlled to be 150-250 torr, the rotating speed of the graphite disc bearing the substrate is controlled to be 800-1200 r/min, NH3 with the flow rate of 40slm-90slm is introduced to serve as an N (nitrogen) source, TMGa with the flow rate of 600sccm-1100 sccm serves as a Ga (gallium) source, TMAl with the flow rate of 10sccm-300sccm serves as an Al (aluminum) source, TMIn with the flow rate of 100sccm-300sccm serves as an In (indium) source, the P-type electronic barrier layer grows on the multi-quantum well layer, and the thickness of the P-type electronic barrier layer is controlled to be 20nm;
raising the temperature of the reaction chamber to 850-970 ℃, controlling the pressure to be 150-250 torr, controlling the rotating speed of the graphite disc to be 800-1200r/min, introducing NH3 with the flow rate of 40slm-90slm as an N (nitrogen) source, introducing TMGa with the flow rate of 600sccm-1100sccm as a Ga (gallium) source, and introducing magnesium metallocene (CP 2 Mg) as a doping agent, wherein the doping concentration of Mg is 1E19-5.5E20atoms/cm3And growing the P-type undoped GaN layer, the P-type Mg-doped GaN layer and the P-type contact layer, and controlling the thickness to be 5nm.
A third embodiment of the present invention provides an LED epitaxial wafer, where the LED epitaxial wafer in this embodiment is different from the LED epitaxial wafer in the first embodiment in that:
in the ScAlGaN layer, the Sc component a was 0.1, the Al component b was 0.42, and the Ga component 1-a-b was 0.48.
The fourth embodiment of the present invention also provides an LED epitaxial wafer, and the LED epitaxial wafer in this embodiment is different from the LED epitaxial wafer in the first embodiment in that:
the doping concentration of Si in the first sublayer and the second sublayer is as follows: 5E18atoms/cm3
A fifth embodiment of the present invention also provides an LED epitaxial wafer, where the LED epitaxial wafer in this embodiment is different from the LED epitaxial wafer in the first embodiment in that:
sc toward N-type layer in M first periodic structuresaAlbGa1-a-bThe composition of Sc in the N layer was 0.18, the composition of Al was 0.42, and the ScaAlbGa1-a-bThe component a of Sc in the N layers decreases from bottom to top layer by layer, and preferably the ScaAlbGa1-a-bThe component a of Sc in the N layers decreases from bottom to top in a layer-by-layer manner with the amplitude of 0.5 percent.
A multi-quantum well layer is arranged between the N-type layer and the P-type layer, the N-type layer provides electrons, the effective mass of the electrons is far smaller than that of holes, so that the mobility of the electrons is extremely high, and higher barrier height can be provided and the migration of the electrons can be delayed by increasing the Sc content in the Sc-containing component quantum barrier layer close to the N-type layer in the multi-quantum well.
The sixth embodiment of the present invention also provides an LED epitaxial wafer, and the LED epitaxial wafer in this embodiment is different from the LED epitaxial wafer in the first embodiment in that:
sc towards N-type layer in M first periodic structuresaAlbGa1-a-bThe composition of Sc in the N layer was 0.18, the composition of Al was 0.42, and the ScaAlbGa1-a-bThe component b of Al in the N layer increases from bottom to top layer by layer, and the Sc is preferableaAlbGa1-a-b1% of Al component b in the N layer from bottom to topThe amplitude increases gradually from layer to layer.
The P-type electronic barrier layer is arranged in the P-type layer and is an AlGaN electronic barrier layer with a high Al component, in the multi-quantum-trap layer, the components of Al in the Sc-component-containing quantum barrier layer are increased layer by layer, so that the Al closer to the P-type electronic barrier layer is relatively higher, the phenomenon that the energy band of the P-type electronic barrier layer is bent downwards due to the polarization effect existing between the last Sc-component-containing quantum barrier layer of the multi-quantum-trap layer and the P-type electronic barrier layer due to lattice mismatch can be avoided, and the blocking effect of the P-type electronic barrier layer on electrons is reduced.
Comparative example 1
An LED epitaxial wafer in this embodiment is different from the LED epitaxial wafer in the first embodiment in that:
the composition a of Sc in the ScAlGaN layer is 0, i.e., the second sublayer is the AlGaN layer.
Comparative example 2
An LED epitaxial wafer in the embodiment is different from the LED epitaxial wafer in the first embodiment in that:
the doping concentration of Si in the first sublayer and the second sublayer is 0.
The LED epitaxial wafer prepared in example 2~6 and comparative example 1~2 was prepared into a chip with a size of about 456nm and 10 × 24mil, and a current of 20mA was applied to perform a photoelectric test, and the corresponding preparation parameters and test results are shown in the following table:
Figure 913250DEST_PATH_IMAGE001
in practical application, the LED epitaxial wafers corresponding to the 2~6 and the 1~2 of the present invention are used to prepare chips with a wavelength of about 456nm and a size of 10 × 24mil, and a current of 20mA is applied to perform a photoelectric test, where the test data are shown in the table above. It should be noted that, in order to ensure the reliability of the verification result, when the epitaxial wafers are prepared correspondingly in the embodiment 2~6 and the comparative example 1~2 of the present invention, the process and parameters should be consistent except for the above parameters.
As can be seen from the above table, the voltage of the LED epitaxial wafer prepared by the method for preparing an LED epitaxial wafer according to the second embodiment of the present invention is reduced by 4.5% compared to comparative example 1, the luminance is increased by 2.0%, the voltage is reduced by 6.4% compared to comparative example 2, and the luminance is increased by 1.7%. The voltage of the LED epitaxial wafer provided in the third embodiment of the present invention is reduced by 2.2% and the luminance is improved by 1.6% as compared with comparative example 1, and the voltage is reduced by 4.1% and the luminance is improved by 1.3% as compared with comparative example 2. Compared with the comparative example 1, the voltage of the LED epitaxial wafer provided by the fourth embodiment of the present invention is reduced by 3.5%, the luminance is improved by 2.2%, compared with the comparative example 2, the voltage is reduced by 5.4%, and the luminance is improved by 1.9%. Compared with the comparative example 1, the voltage of the LED epitaxial wafer provided in the fifth embodiment of the present invention is reduced by 3.8%, the luminance is improved by 2.6%, and compared with the comparative example 2, the voltage is reduced by 5.47%, and the luminance is improved by 2.0%. Compared with the comparative example 1, the voltage of the LED epitaxial wafer provided by the sixth embodiment of the present invention is reduced by 3.1%, the luminance is improved by 2.3%, and compared with the comparative example 2, the voltage is reduced by 5.1%, and the luminance is improved by 2.0%.
In summary, in the LED epitaxial wafer and the manufacturing method thereof in the embodiments of the present invention, the existing GaN quantum barrier layer is converted into the GaN layer and the Sc layer that are periodically and sequentially stackedaAlbGa1-a-bThe N layer adopts a superlattice structure of GaN/ScAlGaN, so that the barrier height to electrons in the multi-quantum well layer can be still improved on the premise of growing the very thin ScAlGaN layer, and the leakage of electrons is reduced. Because the atomic coefficient of Ga is 31 and the atomic radius of Ga is larger than that of Sc, sc is doped into the GaN-based material, and when the component a of Sc is 0.1 to 0.18, the lattice constant of the ScAlGaN layer is 3.189 which is the same as that of the GaN layer. And the electronegativity of Ga atoms is smaller than that of N atoms in GaN crystal (N =3.4, ga = 1.8), which can cancel the electronegativity of Sc, reducing its spontaneous polarization effect. The ScAlGaN layer and the GaN layer are sequentially stacked, and in-plane lattice constant matching and strain-free material growth can be realized, so that the dislocation density of an active region of the device is reduced, dislocation scattering and a leakage channel are reduced, and the performance and reliability of the device are improved.
Si is doped in the first sublayer and the second sublayer, the Si is tetravalent and is replaced by Ga which is trivalent, electrons are provided during replacement, the ScAlGaN layer blocks electron transition, more electrons are confined in the multi-quantum-well layer, and the electrons and holes are compounded in the multi-quantum-well layer to emit light, so that the luminous efficiency of the device is further improved.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the present invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent should be subject to the appended claims.

Claims (9)

1. The LED epitaxial wafer comprises a multi-quantum well layer and is characterized in that the multi-quantum well layer comprises InGaN quantum well layers and Sc component-containing quantum barrier layers which are alternately arranged, each Sc component-containing quantum barrier layer comprises first sub-layers and second sub-layers which are alternately arranged, the thickness of each first sub-layer is 8~9 angstroms, the thickness of each second sub-layer is 1~2 angstroms, each first sub-layer is a GaN layer, each second sub-layer is an ScAlGaN layer, and each ScAlGaN layer is ScaAlbGa1-a-bN layer, wherein a is 0.1 to 0.18, a < b < 1, a + b < 1.
2. The LED epitaxial wafer of claim 1, wherein the InGaN quantum well layer and the Sc-containing quantum barrier layer are stacked on each other to form a first periodic structure, and the multiple quantum well layer comprises M first periodic structures, wherein M has a value in a range of: m is more than or equal to 8 and less than or equal to 12.
3. The LED epitaxial wafer of claim 2, wherein in M of the first periodic structures, the ScaAlbGa1-a-bAnd the component a of Sc in the N layer is gradually decreased from bottom to top layer by layer.
4. The LED epitaxial wafer of claim 1, wherein the first and second sub-layers are stacked on each other to form a second periodic structure, and the Sc-containing quantum barrier layer comprises N second periodic structures, where N is selected from the range of values: n is more than or equal to 1 and less than or equal to 10.
5. The LED epitaxial wafer of claim 1~4, wherein said LED epitaxial wafer further comprises: the substrate is sequentially provided with a buffer layer, a three-dimensional nucleating layer, a two-dimensional merging layer, an undoped GaN layer, an N-type GaN layer, a multi-quantum well layer and a P-type layer in a stacking mode from bottom to top.
6. A method for preparing an LED epitaxial wafer, which is used for preparing the LED epitaxial wafer of any one of claims 1~5, wherein the method for preparing the LED epitaxial wafer comprises the following steps:
in the step of depositing the multi-quantum well layer, an InGaN quantum well layer and a Sc-containing component quantum barrier layer are alternately grown to form the multi-quantum well layer, wherein the Sc-containing component quantum barrier layer is formed by alternately growing a first sub-layer and a second sub-layer, the first sub-layer is a GaN layer, and the second sub-layer is an ScAlGaN layer.
7. The method for preparing the LED epitaxial wafer according to claim 6, further comprising the following steps:
providing a substrate required by growth, and depositing a buffer layer on the substrate;
depositing a three-dimensional nucleation layer on the buffer layer;
depositing a two-dimensional merged layer on the three-dimensional nucleation layer;
depositing an undoped GaN layer on the two-dimensional merged layer;
depositing an N-type GaN layer on the undoped GaN layer;
depositing the multi-quantum well layer on the N-type GaN layer;
and depositing a P-type layer on the multi-quantum well layer.
8. The method for preparing the LED epitaxial wafer according to claim 6, wherein the doping elements of the first sub-layer and the second sub-layer are both Si, and the doping concentrations are as follows: 1E18 to 5E18atoms/cm3
9. The method according to claim 6, wherein in the step of depositing the MQW layer, the MQW layer is alternately grown
The quantum barrier layer comprises an InGaN quantum well layer and a Sc-containing component quantum barrier layer to form the multi-quantum well layer, wherein the step of forming the Sc-containing component quantum barrier layer by alternately growing a GaN layer and an ScAlGaN layer comprises the following steps:
introducing NH with the flow rate of 50to 220slm3As a source of N;
introducing TEGa with the flow rate of 300 to 600sccm as a Ga source;
introducing TMIn with the flow rate of 1000-2500 sccm as an In source;
introducing SiH with the flow rate of 100 to 300sccm4As an N-type dopant;
introducing Sc (TMHD) with the flow rate of 100 to 800sccm3As a source of Sc;
introducing TMAl with the flow rate of 100 to 800sccm as an Al source.
CN202210918847.2A 2022-08-02 2022-08-02 LED epitaxial wafer and preparation method thereof Active CN114975704B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210918847.2A CN114975704B (en) 2022-08-02 2022-08-02 LED epitaxial wafer and preparation method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210918847.2A CN114975704B (en) 2022-08-02 2022-08-02 LED epitaxial wafer and preparation method thereof

Publications (2)

Publication Number Publication Date
CN114975704A CN114975704A (en) 2022-08-30
CN114975704B true CN114975704B (en) 2022-11-01

Family

ID=82970367

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202210918847.2A Active CN114975704B (en) 2022-08-02 2022-08-02 LED epitaxial wafer and preparation method thereof

Country Status (1)

Country Link
CN (1) CN114975704B (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115377260A (en) * 2022-10-27 2022-11-22 江西兆驰半导体有限公司 LED epitaxial wafer, preparation method and electronic equipment
CN116344698B (en) * 2023-05-22 2023-08-29 江西兆驰半导体有限公司 Patterned substrate GaN-based LED epitaxial wafer and preparation method thereof
CN116454185A (en) * 2023-06-16 2023-07-18 江西兆驰半导体有限公司 High-light-efficiency light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode
CN116682916B (en) * 2023-08-03 2023-11-21 江西兆驰半导体有限公司 Multi-quantum well layer, preparation method thereof, epitaxial wafer and light-emitting diode
CN116825917B (en) * 2023-08-31 2023-11-17 江西兆驰半导体有限公司 Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode
CN116960248B (en) * 2023-09-15 2024-01-19 江西兆驰半导体有限公司 Light-emitting diode epitaxial wafer and preparation method thereof

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102017156A (en) * 2008-02-25 2011-04-13 光波光电技术公司 Current-injecting/tunneling light-emitting device and method
CN102842660A (en) * 2012-08-17 2012-12-26 马鞍山圆融光电科技有限公司 epitaxial wafer structure of gallium nitride-based LED (Light-Emitting Diode) and preparation method thereof
CN108110054A (en) * 2017-12-22 2018-06-01 苏州闻颂智能科技有限公司 A kind of GaN base HEMT device and preparation method thereof
CN113471343A (en) * 2021-07-15 2021-10-01 西安电子科技大学芜湖研究院 GaN green light emitting diode based on ScAlGaN super-polarized n-type layer and preparation method thereof
CN113808942A (en) * 2021-08-25 2021-12-17 西安电子科技大学 High-aluminum-component nitride ohmic contact device and preparation method thereof
CN114824004A (en) * 2022-06-29 2022-07-29 江西兆驰半导体有限公司 LED epitaxial structure and preparation method thereof

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104701432A (en) * 2015-03-20 2015-06-10 映瑞光电科技(上海)有限公司 GaN-based LED epitaxial structure and preparation method thereof
CN108520913B (en) * 2018-04-25 2019-10-01 黎明职业大学 A kind of nitride semiconductor LED with strong polarization hole injection layer
CN114649454B (en) * 2022-05-23 2022-08-23 江西兆驰半导体有限公司 Epitaxial wafer structure of light emitting diode and preparation method thereof
CN114695612B (en) * 2022-06-01 2022-08-26 江西兆驰半导体有限公司 Gallium nitride-based light emitting diode epitaxial structure and preparation method thereof

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102017156A (en) * 2008-02-25 2011-04-13 光波光电技术公司 Current-injecting/tunneling light-emitting device and method
CN102842660A (en) * 2012-08-17 2012-12-26 马鞍山圆融光电科技有限公司 epitaxial wafer structure of gallium nitride-based LED (Light-Emitting Diode) and preparation method thereof
CN108110054A (en) * 2017-12-22 2018-06-01 苏州闻颂智能科技有限公司 A kind of GaN base HEMT device and preparation method thereof
CN113471343A (en) * 2021-07-15 2021-10-01 西安电子科技大学芜湖研究院 GaN green light emitting diode based on ScAlGaN super-polarized n-type layer and preparation method thereof
CN113808942A (en) * 2021-08-25 2021-12-17 西安电子科技大学 High-aluminum-component nitride ohmic contact device and preparation method thereof
CN114824004A (en) * 2022-06-29 2022-07-29 江西兆驰半导体有限公司 LED epitaxial structure and preparation method thereof

Also Published As

Publication number Publication date
CN114975704A (en) 2022-08-30

Similar Documents

Publication Publication Date Title
CN114975704B (en) LED epitaxial wafer and preparation method thereof
CN110718612B (en) Light emitting diode epitaxial wafer and manufacturing method thereof
CN115458650B (en) Light emitting diode epitaxial wafer, preparation method thereof and light emitting diode
CN114759124B (en) Light emitting diode epitaxial wafer and preparation method thereof
CN115188863B (en) Light emitting diode epitaxial wafer and preparation method thereof
CN114695612B (en) Gallium nitride-based light emitting diode epitaxial structure and preparation method thereof
CN116230825B (en) LED epitaxial wafer with hole injection layer regulated and controlled by hydrogen impurities and preparation method thereof
CN114927601B (en) Light emitting diode and preparation method thereof
CN115986018B (en) Epitaxial wafer, epitaxial wafer preparation method and light-emitting diode
CN114824007A (en) Light emitting diode epitaxial structure and preparation method thereof
CN115295693A (en) Light emitting diode epitaxial wafer and preparation method thereof
CN116344695A (en) LED epitaxial wafer, preparation method thereof and LED
CN114883460A (en) Light emitting diode epitaxial wafer and preparation method thereof
CN115911202A (en) Light emitting diode epitaxial wafer, preparation method thereof and light emitting diode
CN116364825A (en) Composite buffer layer, preparation method thereof, epitaxial wafer and light-emitting diode
CN116344684B (en) Light-emitting diode preparation method and diode
CN115377260A (en) LED epitaxial wafer, preparation method and electronic equipment
CN109473521B (en) Light emitting diode epitaxial wafer and preparation method thereof
CN114497306B (en) GaN-based LED epitaxial wafer, epitaxial growth method and LED chip
CN116344696B (en) Composite three-dimensional nucleation layer, preparation method thereof, epitaxial wafer and light-emitting diode
CN116230824B (en) High-light-efficiency light-emitting diode epitaxial wafer, preparation method thereof and LED chip
CN117712253B (en) Deep ultraviolet light-emitting diode and preparation method thereof
CN116598395B (en) Light-emitting diode and preparation method thereof
CN116469981A (en) High-luminous-efficiency light-emitting diode and preparation method thereof
CN117199204A (en) High-light-efficiency LED epitaxial wafer, preparation method thereof and LED chip

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant