CN114362690A - High-linearity ultra-wideband amplifier - Google Patents
High-linearity ultra-wideband amplifier Download PDFInfo
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Abstract
The invention discloses a high-linearity ultra-wideband amplifier, wherein the input end of an input matching network is used as the input end of the amplifier, the output end of the input matching network is connected with the input end of an ultra-wideband amplifying network, the output end of the ultra-wideband amplifying network is connected with the input end of a J-type amplifying output matching network, and the output end of the J-type amplifying output matching network is used as the output end of the amplifier; the ultra-wideband amplification network is also respectively connected with the first active bias network, the second active bias network, the feed matching network and the passive bias network. The high-linearity ultra-wideband amplifier provided by the invention adopts a Darlington + cascode amplifying network and is combined with a novel active biasing technology, and the output matching adopts a J-type amplifying output matching network, so that the characteristics of ultra-wideband, high gain, high linearity and high efficiency are jointly realized, and the high-linearity ultra-wideband amplifier has the advantages of wide working frequency band, high gain, high linearity, high efficiency, low power consumption, small area and the like.
Description
Technical Field
The invention belongs to the technical field of integrated circuits, and particularly relates to a high-linearity ultra-wideband amplifier.
Background
With the continuous development of radar technology and modern mobile communication, the frequency band of electronic devices used in modern electronic warfare, such as frequency hopping communication and broadband jammers, is becoming wider and wider, which makes a need for developing a broadband electronic reconnaissance receiver to meet the needs of electronic countermeasure in the future war. The microwave broadband high-linearity amplifier is a key component of a broadband electronic reconnaissance receiver, and the performance of the microwave broadband high-linearity amplifier directly influences important parameters such as signal characteristics, sensitivity, reconnaissance distance and the like of the electronic reconnaissance receiver. Among the many performance metrics of a wideband amplifier, gain and bandwidth are two of the more important metrics. The gain and bandwidth of the amplifier cannot be increased beyond a certain limit at the same time, and these two quantities are often compromised. In addition to gain and bandwidth, the efficiency and linearity of the amplifier are also important tradeoffs.
Disclosure of Invention
Aiming at the defects in the prior art, the high-linearity ultra-wideband amplifier provided by the invention adopts a Darlington + cascode amplifying network and is combined with a novel active bias technology, and the output matching adopts a J-class amplifying output matching network, so that the characteristics of ultra-wideband, high gain, high linearity and high efficiency are jointly realized.
In order to achieve the purpose of the invention, the invention adopts the technical scheme that: a high-linearity ultra-wideband amplifier comprises an input matching network, an ultra-wideband amplifying network, a first active bias network, a second active bias network, a passive bias network and a J-class amplification output matching network;
the input end of the input matching network is used as the input end of the amplifier, the output end of the input matching network is connected with the input end of the ultra-wideband amplification network, the output end of the ultra-wideband amplification network is connected with the input end of the J-type amplification output matching network, and the output end of the J-type amplification output matching network is used as the output end of the amplifier;
the ultra-wideband amplification network is also respectively connected with the first active bias network, the second active bias network, the feed matching network and the passive bias network.
The invention has the beneficial effects that: the invention adopts the Darlington + cascode amplification network and is combined with a novel active bias technology, the output matching adopts the J-type amplification output matching network, the characteristics of ultra wide band, high gain, high linearity and high efficiency are jointly realized, the impedance matching and the gain flatness are considered, the sensitivity of the circuit to process fluctuation and temperature change is reduced, and the stability and the reliability of the circuit are improved. The invention has the advantages of wide working frequency band, high gain, high linearity, high efficiency, small area and the like.
Further, the input matching network comprises a capacitor C1 and an inductor L1;
one end of the capacitor C1 is used as an input end of the input matching network, the other end of the capacitor C1 is connected with one end of an inductor L1, and the other end of the inductor L1 is used as an output end of the input matching network.
The beneficial effects of the above further scheme are: the input matching network adopted by the invention performs impedance matching on the radio frequency input signal through the series capacitor inductor.
Further, the ultra-wideband amplification network comprises a field effect transistor M1, a field effect transistor M2, a field effect transistor M3, a microstrip line TL1, a microstrip line TL2, a ground resistor R1, a ground resistor R2, a resistor R8, a resistor R9, a resistor R10, a resistor R16, an inductor L3, a ground capacitor C3 and a ground capacitor C5;
the gate of the field effect transistor M1 is used as the input end of the ultra-wideband amplification network and is respectively connected with one end of a resistor R16 and the second active bias network, the other end of the resistor R16 is respectively connected with the first active bias network and the passive bias network, the source of the field effect transistor M1 is respectively connected with one end of a microstrip line TL2 and a ground resistor R1, the other end of the microstrip line TL2 is respectively connected with the first active bias network, the second active bias network and the gate of the field effect transistor M2, the source of the field effect transistor M2 is connected with a ground resistor R2, the drain of the field effect transistor M1 is connected with one end of a microstrip line TL1, the other end of the microstrip line TL1 is respectively connected with the drain of a field effect transistor M2 and one end of an inductor L3, the other end of the inductor L3 is respectively connected with one end of a resistor R8 and the source of a field effect transistor M3, and the other end of the resistor R8 is connected with a ground capacitor C3, the drain electrode of the field effect tube M3 is used as the output end of the ultra-wideband amplifier network and is respectively connected with the passive bias network and the feed matching network, the grid electrode of the field effect tube M3 is connected with one end of a resistor R9, the other end of the resistor R9 is respectively connected with one end of a resistor R10 and the passive bias network, and the other end of the resistor R10 is connected with a grounding capacitor C5.
The beneficial effects of the above further scheme are: the ultra-wideband amplification network adopts a Darlington + cascode structure and is combined with a parallel negative feedback structure, so that the ultra-wideband working frequency band and the high gain characteristic are realized, the low noise coefficient is obtained, the medium output power is realized, the circuit power consumption is effectively reduced, and the whole circuit area has great advantages.
Further, the first active bias network comprises a ground resistor R3, a resistor R5, a resistor R6, a ground capacitor C2 and a field effect transistor M4;
the source electrode of the field-effect tube M4 is connected with a grounding resistor R3, the grid electrode of the field-effect tube M4 is connected with one end of a resistor R5, the other end of the resistor R5 is connected with the other end of the microstrip line TL12 in the ultra-wideband amplification network, the drain electrode of the field-effect tube M4 is connected with one ends of a grounding capacitor C2 and a resistor R6 respectively, and the other end of the resistor R6 is connected with the other end of the resistor R16 in the ultra-wideband amplification network.
Further, the second active bias network comprises a field effect transistor M5, a ground resistor R4, a ground resistor C11 and a resistor R17;
the source electrode of the field-effect tube M5 is respectively connected with a grounding resistor R4 and a grounding capacitor C11, the drain electrode of the field-effect tube M5 is respectively connected with one end of a resistor R17 and the grid electrode of the field-effect tube M1 in the ultra-wideband amplification network, the grid electrode of the field-effect tube M5 is connected with one end of the resistor R17, and the other end of the resistor R17 is connected with the other end of the microstrip line TL2 in the ultra-wideband amplification network.
The beneficial effects of the above further scheme are: according to the novel active bias network adopted by the invention, the second active bias network provides bias voltage for the M1 tube and the M2 tube in the first active bias network through the active self-bias M4 tube and the M5 tube, and under the condition that the power supply voltage fluctuates due to process fluctuation or temperature change, the self-bias tube can influence the leakage saturation current through controlling the gate voltage, so that the voltage of the input end is controlled, and negative feedback is realized. Therefore, the sensitivity of the circuit to process fluctuation and temperature change can be effectively reduced, the linearity of the circuit is improved, and the amplifier is more stable.
Further, the passive bias network includes a resistor R7, a resistor R11, a resistor R12, and a ground resistor R13;
one end of the resistor R7 is connected with the other end of the resistor R16 in the ultra-wideband amplification network, the other end of the resistor R7 is respectively connected with the drain of the field effect transistor M3 in the ultra-wideband amplification network and one end of the resistor R12, the other end of the resistor R12 is respectively connected with one end of the grounding resistor R13 and one end of the resistor R11, and the other end of the resistor R11 is connected with the other end of the resistor R9 in the ultra-wideband amplification network.
The beneficial effects of the above further scheme are: the grid voltage of the field effect transistor M3 is provided by adopting a passive bias network resistor voltage division structure, and the voltage division resistors in specific design adopt the same type of resistors, so that the sensitivity of the grid voltage to process fluctuation can be effectively reduced.
Further, the feed matching network comprises a grounded capacitor C11, a grounded capacitor C10, a grounded capacitor C12, a resistor R14, a resistor R15, an inductor L4 and an inductor L5;
one end of the inductor L4 is connected with the drain of the field effect transistor M3 in the ultra-wideband amplification network, the other end of the inductor L4 is connected with one end of the inductor L5 and one end of the resistor R14 respectively, the other end of the resistor R14 is connected with the grounding capacitor C12, the other end of the inductor L5 is connected with one end of the grounding capacitor C10 and one end of the resistor R15 respectively and the power supply VDD, and the other end of the resistor R15 is connected with the grounding capacitor C11.
The beneficial effects of the above further scheme are: the feed matching network of the invention adopts a structure of connecting two stages of inductors in series to expand the bandwidth, and eliminates the resonance introduced by the inductors by adding a structure of connecting RC in series to the ground between the two stages of inductors. The power supply end of the feed adopts a structure that a small capacitor and a large capacitor resistor are connected in parallel to the ground to filter out high-frequency and low-frequency ripples.
Further, the class J amplified output matching network comprises an inductor L6, an inductor L7, a grounding inductor L8, a capacitor C6, a capacitor C7, a capacitor C8 and a grounding capacitor C9;
one end of the inductor L6 is used as an input end of the class J amplified output matching network and is connected with one end of the capacitor C6, the other end of the inductor L6 is connected with the other end of the capacitor C6, one end of the inductor L7 and one end of the capacitor C8, the other end of the capacitor C8 is connected with the grounding inductor L8, the other end of the inductor L7 is connected with one ends of the grounding capacitor C9 and the capacitor C7, and the other end of the capacitor C7 is used as an output end of the class J amplified output matching network.
The beneficial effects of the above further scheme are: the output matching adopts a J-type amplification output matching network to control harmonic impedance, so that the energy loss of the transistor is reduced, and the working efficiency of the amplifier is improved. And the interstage and the output adopt RC-to-ground circuits to realize the suppression of the self-excited unstable signal of the power supply.
Drawings
Fig. 1 is a structural diagram of a high linearity ultra-wideband amplifier provided by the invention.
Fig. 2 is a circuit diagram of a high linearity ultra-wideband amplifier provided by the invention.
Detailed Description
The following description of the embodiments of the present invention is provided to facilitate the understanding of the present invention by those skilled in the art, but it should be understood that the present invention is not limited to the scope of the embodiments, and it will be apparent to those skilled in the art that various changes may be made without departing from the spirit and scope of the invention as defined and defined in the appended claims, and all matters produced by the invention using the inventive concept are protected.
The embodiment of the invention provides a high-linearity ultra-wideband amplifier, which comprises an input matching network, an ultra-wideband amplifying network, a first active bias network, a second active bias network, a passive bias network and a J-class amplification output matching network, wherein the input matching network, the ultra-wideband amplifying network, the first active bias network, the second active bias network, the passive bias network and the J-class amplification output matching network are connected in series;
the input end of the input matching network is used as the input end of the amplifier, the output end of the input matching network is connected with the input end of the ultra-wideband amplification network, the output end of the ultra-wideband amplification network is connected with the input end of the J-type amplification output matching network, and the output end of the J-type amplification output matching network is used as the output end of the amplifier;
the ultra-wideband amplification network is also respectively connected with the first active bias network, the second active bias network, the feed matching network and the passive bias network.
As shown in fig. 2, the input matching network in the embodiment of the present invention includes a capacitor C1 and an inductor L1;
one end of the capacitor C1 is used as an input end of the input matching network, the other end of the capacitor C1 is connected with one end of the inductor L1, and the other end of the inductor L1 is used as an output end of the input matching network.
As shown in fig. 2, the ultra-wideband amplifying network in the embodiment of the present invention includes a field effect transistor M1, a field effect transistor M2, a field effect transistor M3, a microstrip line TL1, a microstrip line TL2, a ground resistor R1, a ground resistor R2, a resistor R8, a resistor R9, a resistor R10, a resistor R16, an inductor L3, a ground capacitor C3, and a ground capacitor C5;
the grid of the field effect transistor M1 is used as the input end of the ultra-wideband amplification network and is respectively connected with one end of a resistor R16 and a second active bias network, the other end of a resistor R16 is respectively connected with a first active bias network and a passive bias network, the source of the field effect transistor M1 is respectively connected with one end of a microstrip line TL2 and a grounding resistor R1, the other end of the microstrip line TL2 is respectively connected with the first active bias network, the second active bias network and the grid of the field effect transistor M2, the source of the field effect transistor M2 is connected with a grounding resistor R2, the drain of the field effect transistor M1 is connected with one end of a microstrip line TL1, the other end of the microstrip line TL1 is respectively connected with the drain of the field effect transistor M2 and one end of an inductor L3, the other end of the inductor L3 is respectively connected with one end of a resistor R8 and the source of the field effect transistor M3, the other end of the resistor R8 is connected with a grounding capacitor C3, and the drain of the field effect transistor M3 is used as the output end of the ultra-wideband amplification network, the field-effect tube diameter M3 is connected with one end of a resistor R9, the other end of a resistor R9 is connected with one end of a resistor R10 and the passive bias network, and the other end of the resistor R10 is connected with a grounding capacitor C5.
As shown in fig. 2, the first active bias network in the embodiment of the present invention includes a ground resistor R3, a resistor R5, a resistor R6, a ground capacitor C2, and a fet M4;
the source electrode of the field-effect tube M4 is connected with a grounding resistor R3, the grid electrode of the field-effect tube M4 is connected with one end of a resistor R5, the other end of the resistor R5 is connected with the other end of a microstrip line TL12 in the ultra-wideband amplification network, the drain electrode of the field-effect tube M4 is respectively connected with one end of a grounding capacitor C2 and one end of a resistor R6, and the other end of the resistor R6 is connected with the other end of the resistor R16 in the ultra-wideband amplification network.
As shown in fig. 2, the second active bias network in the embodiment of the present invention includes a fet M5, a ground resistor R4, a ground resistor C11, and a resistor R17;
the source electrode of the field-effect tube M5 is respectively connected with a grounding resistor R4 and a grounding capacitor C11, the drain electrode of the field-effect tube M5 is respectively connected with one end of a resistor R17 and the grid electrode of the field-effect tube M1 in the ultra-wideband amplification network, the grid electrode of the field-effect tube M5 is connected with one end of a resistor R17, and the other end of the resistor R17 is connected with the other end of a microstrip line TL2 in the ultra-wideband amplification network.
As shown in fig. 2, the passive bias network in the embodiment of the present invention includes a resistor R7, a resistor R11, a resistor R12, and a ground resistor R13;
one end of a resistor R7 is connected with the other end of a resistor R16 in the ultra-wideband amplification network, the other end of a resistor R7 is respectively connected with the drain electrode of a field effect tube M3 in the ultra-wideband amplification network and one end of a resistor R12, the other end of a resistor R12 is respectively connected with one end of a grounding resistor R13 and one end of a resistor R11, and the other end of the resistor R11 is connected with the other end of a resistor R9 in the ultra-wideband amplification network.
As shown in fig. 2, the feed matching network in the embodiment of the present invention includes a ground capacitor C11, a ground capacitor C10, a ground capacitor C12, a resistor R14, a resistor R15, an inductor L4, and an inductor L5;
one end of an inductor L4 is connected with a drain electrode of a field effect transistor M3 in the ultra-wideband amplification network, the other end of an inductor L4 is connected with one ends of an inductor L5 and a resistor R14 respectively, the other end of a resistor R14 is connected with a grounded capacitor C12, the other end of an inductor L5 is connected with one ends of a grounded capacitor C10 and a resistor R15 respectively and a power supply VDD, and the other end of the resistor R15 is connected with a grounded capacitor C11.
As shown in fig. 2, the class J amplified output matching network in the embodiment of the present invention includes an inductor L6, an inductor L7, a grounding inductor L8, a capacitor C6, a capacitor C7, a capacitor C8, and a grounding capacitor C9;
one end of an inductor L6 is used as an input end of the J-type amplified output matching network and is connected with one end of a capacitor C6, the other end of an inductor L6 is connected with the other end of the capacitor C6, one end of the inductor L7 and one end of a capacitor C8 respectively, the other end of a capacitor C8 is connected with a grounding inductor L8, the other end of the inductor L7 is connected with one ends of a grounding capacitor C9 and a capacitor C7 respectively, and the other end of a capacitor C7 is used as an output end of the J-type amplified output matching network.
The specific working principle and process of the present invention are described below with reference to fig. 2:
in the invention, a radio frequency input signal enters an input matching network of an amplifier through an input end RFin, enters an ultra-wideband amplification network for signal amplification after impedance matching is carried out on the input matching network, the amplified signal enters an output matching network for signal output matching, and finally a radio frequency output signal is formed to reach an output end RFout.
The ultra-wideband amplification network adopts a Darlington + cascode amplification network and is combined with a parallel negative feedback structure, so that the ultra-wideband working frequency band and the higher gain characteristic are realized, a lower noise coefficient is obtained, the medium output power is realized, the circuit power consumption is effectively reduced, and the whole circuit area has a larger advantage. The second active bias network provides bias voltage for the M1 tube and the M2 tube in the first active bias network through the active self-bias M4 tube and the M5 tube, and the self-bias tube can influence leakage saturation current through controlling gate voltage under the condition that the process fluctuation or temperature change causes the fluctuation of power supply voltage, so that the voltage of an input end is controlled, and negative feedback is realized. Therefore, the sensitivity of the circuit to process fluctuation and temperature change can be effectively reduced, the linearity of the circuit is improved, and the amplifier is more stable.
The feed matching network adopts a structure of connecting two stages of inductors in series to expand the bandwidth, and eliminates resonance introduced by the inductors by adding an RC (resistance capacitance) series-to-ground structure between the two stages of inductors. The power supply end of the feed adopts a structure that a small capacitor and a large capacitor resistor are connected in parallel to the ground to filter out high-frequency and low-frequency ripples.
The output matching adopts a J-type amplification output matching network, so that the characteristics of ultra wide band, high gain, high linearity and high efficiency are realized together, the impedance matching and the gain flatness are considered, the sensitivity of the circuit to process fluctuation and temperature change is reduced, and the stability and the reliability of the circuit are improved. The invention has the advantages of wide working frequency band, high gain, high linearity, high efficiency, small area and the like.
Claims (8)
1. A high-linearity ultra-wideband amplifier is characterized by comprising an input matching network, an ultra-wideband amplifying network, a first active bias network, a second active bias network, a passive bias network and a J-type amplification output matching network;
the input end of the input matching network is used as the input end of the amplifier, the output end of the input matching network is connected with the input end of the ultra-wideband amplification network, the output end of the ultra-wideband amplification network is connected with the input end of the J-type amplification output matching network, and the output end of the J-type amplification output matching network is used as the output end of the amplifier;
the ultra-wideband amplification network is also respectively connected with the first active bias network, the second active bias network, the feed matching network and the passive bias network.
2. The high linearity ultra-wideband amplifier of claim 1, wherein the input matching network comprises a capacitance C1 and an inductance L1;
one end of the capacitor C1 is used as an input end of the input matching network, the other end of the capacitor C1 is connected with one end of an inductor L1, and the other end of the inductor L1 is used as an output end of the input matching network.
3. The high-linearity ultra-wideband amplifier according to claim 1, wherein the ultra-wideband amplifying network comprises a field-effect transistor M1, a field-effect transistor M2, a field-effect transistor M3, a microstrip line TL1, a microstrip line TL2, a ground resistor R1, a ground resistor R2, a resistor R8, a resistor R9, a resistor R10, a resistor R16, an inductor L3, a ground capacitor C3 and a ground capacitor C5;
the gate of the field effect transistor M1 is used as the input end of the ultra-wideband amplification network and is respectively connected with one end of a resistor R16 and the second active bias network, the other end of the resistor R16 is respectively connected with the first active bias network and the passive bias network, the source of the field effect transistor M1 is respectively connected with one end of a microstrip line TL2 and a ground resistor R1, the other end of the microstrip line TL2 is respectively connected with the first active bias network, the second active bias network and the gate of the field effect transistor M2, the source of the field effect transistor M2 is connected with a ground resistor R2, the drain of the field effect transistor M1 is connected with one end of a microstrip line TL1, the other end of the microstrip line TL1 is respectively connected with the drain of a field effect transistor M2 and one end of an inductor L3, the other end of the inductor L3 is respectively connected with one end of a resistor R8 and the source of a field effect transistor M3, and the other end of the resistor R8 is connected with a ground capacitor C3, the drain electrode of the field effect tube M3 is used as the output end of the ultra-wideband amplifier network and is respectively connected with the passive bias network and the feed matching network, the grid electrode of the field effect tube M3 is connected with one end of a resistor R9, the other end of the resistor R9 is respectively connected with one end of a resistor R10 and the passive bias network, and the other end of the resistor R10 is connected with a grounding capacitor C5.
4. The high linearity ultra wide band amplifier of claim 3, wherein the first active bias network comprises a ground resistor R3, a resistor R5, a resistor R6, a ground capacitor C2, and a field effect transistor M4;
the source electrode of the field-effect tube M4 is connected with a grounding resistor R3, the grid electrode of the field-effect tube M4 is connected with one end of a resistor R5, the other end of the resistor R5 is connected with the other end of the microstrip line TL12 in the ultra-wideband amplification network, the drain electrode of the field-effect tube M4 is connected with one ends of a grounding capacitor C2 and a resistor R6 respectively, and the other end of the resistor R6 is connected with the other end of the resistor R16 in the ultra-wideband amplification network.
5. The high linearity ultra-wideband amplifier of claim 3, wherein the second active bias network comprises a field effect transistor M5, a resistor R4, a resistor C11 and a resistor R17;
the source electrode of the field-effect tube M5 is respectively connected with a grounding resistor R4 and a grounding capacitor C11, the drain electrode of the field-effect tube M5 is respectively connected with one end of a resistor R17 and the grid electrode of the field-effect tube M1 in the ultra-wideband amplification network, the grid electrode of the field-effect tube M5 is connected with one end of the resistor R17, and the other end of the resistor R17 is connected with the other end of the microstrip line TL2 in the ultra-wideband amplification network.
6. The high linearity ultra-wideband amplifier of claim 3, wherein the passive bias network comprises a resistor R7, a resistor R11, a resistor R12, and a ground resistor R13;
one end of the resistor R7 is connected with the other end of the resistor R16 in the ultra-wideband amplification network, the other end of the resistor R7 is respectively connected with the drain of the field effect transistor M3 in the ultra-wideband amplification network and one end of the resistor R12, the other end of the resistor R12 is respectively connected with one end of the grounding resistor R13 and one end of the resistor R11, and the other end of the resistor R11 is connected with the other end of the resistor R9 in the ultra-wideband amplification network.
7. The high linearity ultra-wideband amplifier of claim 3, wherein the feed matching network comprises a grounded capacitor C11, a grounded capacitor C10, a grounded capacitor C12, a resistor R14, a resistor R15, an inductor L4, and an inductor L5;
one end of the inductor L4 is connected with the drain of the field effect transistor M3 in the ultra-wideband amplification network, the other end of the inductor L4 is connected with one end of the inductor L5 and one end of the resistor R14 respectively, the other end of the resistor R14 is connected with the grounding capacitor C12, the other end of the inductor L5 is connected with one end of the grounding capacitor C10 and one end of the resistor R15 respectively and the power supply VDD, and the other end of the resistor R15 is connected with the grounding capacitor C11.
8. The high linearity ultra wide band amplifier of claim 3, wherein the class J amplified output matching network comprises an inductance L6, an inductance L7, a grounded inductance L8, a capacitance C6, a capacitance C7, a capacitance C8, and a grounded capacitance C9;
one end of the inductor L6 is used as an input end of the class J amplified output matching network and is connected with one end of the capacitor C6, the other end of the inductor L6 is connected with the other end of the capacitor C6, one end of the inductor L7 and one end of the capacitor C8, the other end of the capacitor C8 is connected with the grounding inductor L8, the other end of the inductor L7 is connected with one ends of the grounding capacitor C9 and the capacitor C7, and the other end of the capacitor C7 is used as an output end of the class J amplified output matching network.
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| CN202111550412.9A CN114362690A (en) | 2021-12-17 | 2021-12-17 | High-linearity ultra-wideband amplifier |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114710126A (en) * | 2022-06-08 | 2022-07-05 | 成都嘉纳海威科技有限责任公司 | Reconfigurable broadband amplifier based on GaAs Bi-HEMT technology |
| CN117914272A (en) * | 2024-03-19 | 2024-04-19 | 成都嘉纳海威科技有限责任公司 | Miniaturized ultra-wideband low-noise amplifier |
-
2021
- 2021-12-17 CN CN202111550412.9A patent/CN114362690A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114710126A (en) * | 2022-06-08 | 2022-07-05 | 成都嘉纳海威科技有限责任公司 | Reconfigurable broadband amplifier based on GaAs Bi-HEMT technology |
| CN117914272A (en) * | 2024-03-19 | 2024-04-19 | 成都嘉纳海威科技有限责任公司 | Miniaturized ultra-wideband low-noise amplifier |
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