CN114326900A - A high-precision adjustable reference voltage generating circuit - Google Patents

Abstract

The invention discloses a high-precision adjustable reference voltage generating circuit, which belongs to the field of CMOS analog integrated circuits. It is used to solve the technical problem of the lack of a reference voltage circuit suitable for high-precision application scenarios in the prior art. The high-precision adjustable reference voltage generating circuit of the present invention includes: a reference reference circuit module, a main DAC, an output buffer amplifier and a voltage calibration circuit module; the reference reference circuit module is used for generating and outputting a reference reference voltage; the main DAC is used for generating and outputting a reference reference voltage based on the reference reference voltage generating voltage values of various proportions; the output buffer amplifier is used for amplifying and buffering the voltage value generated by the main DAC; the voltage calibration circuit module is used for generating a control signal based on the reference reference voltage and the output voltage of the output buffer amplifier, In order to control and adjust the output voltage of the main DAC, the calibration of the output reference voltage is realized. By adopting the solution of the present invention, the generation of a highly accurate and adjustable reference voltage can be realized.

Description

A high-precision adjustable reference voltage generating circuit

technical field

The invention belongs to the field of CMOS analog integrated circuit design, and more particularly relates to a high-precision adjustable reference voltage generating circuit.

Background technique

In the field of CMOS analog integrated circuits, a stable and accurate voltage reference is required as a reference in many occasions, especially in the design of analog-to-digital converters (ADC, Analog to Digital Converter), the accuracy of the reference voltage of some ADCs cannot meet the requirements. It will seriously affect the conversion accuracy of the ADC. For example, some multi-step ADCs require voltage references of different ratios as conversion references. Once the error between different references exceeds the minimum resolution voltage designed by the ADC, the actual accuracy of the ADC will be significantly reduced.

FIG. 1 is an existing adjustable reference voltage circuit, which mainly includes a reference reference module 11, a digital-to-analog converter (DAC, Digital to Analog Converter) 12 and an output buffer 13. After the reference reference signal passes through an N-bit DAC , the output can be controlled by the binary input value of the DAC to be any X2 ^N times the reference reference value, where the X range is an integer between 0 and 2 ^N. However, considering the integral nonlinearity error of the DAC, the gain error of the output buffer and the input offset voltage of the output buffer, when the required precision N is large, the actual output result deviates seriously from the expected output, even will far exceed 1 minimum LSB voltage, which is unacceptable for applications requiring high precision.

It can be seen that how to obtain a higher-precision reference voltage has become an urgent problem to be solved.

SUMMARY OF THE INVENTION

Aiming at the defects and improvement requirements of the prior art, the present invention proposes a high-precision adjustable reference voltage generating circuit, which aims to generate a high-precision reference voltage, which can meet the application occasions such as ADC that require a high-precision reference voltage.

In order to achieve the above purpose, the present invention provides a high-precision adjustable voltage reference circuit, including: a reference reference circuit module, a main digital-to-analog converter, an output buffer amplifier and a voltage calibration circuit module;

the reference reference circuit module for generating and outputting a reference reference voltage;

The main digital-to-analog converter and the input end of the voltage calibration circuit module are connected to the reference reference circuit module, and are used for obtaining the reference reference voltage;

The input end of the output buffer amplifier is connected to the output end of the main digital-to-analog converter, and is used for amplifying and buffering the output voltage of the main digital-to-analog converter;

The other input end of the voltage calibration circuit module is connected to the output end of the output buffer amplifier, for obtaining the output voltage of the output buffer amplifier;

The output terminal of the voltage calibration circuit module is connected to the other input terminal of the main digital-to-analog converter; the voltage calibration circuit module generates a first control signal based on the reference reference voltage and the output voltage of the output buffer amplifier , and output to the main digital-to-analog converter, so as to control the main digital-to-analog converter to adjust the output voltage and realize the calibration of the output reference voltage.

Optionally, the voltage calibration circuit module includes: a calibration digital-to-analog converter, a comparator and a comparison control logic module;

The input end of the calibration digital-to-analog converter is connected to the reference reference circuit module for obtaining the reference reference voltage;

The negative input terminal of the comparator is connected to the output terminal of the calibration digital-to-analog converter, the positive input terminal of the comparator is connected to the output terminal of the output buffer amplifier, and the comparator is used for calibrating the calibration data. comparing the output voltage of the analog converter with the output voltage of the output buffer amplifier to obtain a comparison result;

The input end of the comparison control logic module is connected to the output end of the comparator, the first output end is connected to the main digital-to-analog converter, and the second output end is connected to the calibration digital-to-analog converter; the comparison The control logic module generates a first control signal and a second control signal based on the comparison result, and outputs to the main digital-to-analog converter and the calibration digital-to-analog converter through the first output terminal and the second output terminal respectively The controller is used to control and adjust the output voltage of the main digital-to-analog converter and the calibration digital-to-analog converter, so as to realize the calibration of the output reference voltage.

Optionally, the reference reference circuit module is implemented using a bandgap reference.

Optionally, the main digital-to-analog converter includes: a series resistance digital-to-analog converter and a binary current digital-to-analog converter; wherein, the main digital-to-analog converter realizes high-level output through a series resistance digital-to-analog converter, and a binary current A digital-to-analog converter implements the low-order output.

Optionally, the output buffer amplifier adopts a folded cascode amplifier structure.

Optionally, the calibration digital-to-analog converter is specifically a capacitance digital-to-analog converter.

Optionally, the comparator is a static pre-amplifier comparator with output offset storage.

In general, through the above-mentioned technical solutions conceived by the present invention, at least the following beneficial effects can be achieved:

(1) The present invention calibrates the main digital-to-analog converter with low precision through the voltage calibration circuit module including the high-precision calibration digital-to-analog converter, and finally a high-precision adjustable reference voltage output can be obtained. The traditional structure can eliminate the mismatch error of the main digital-to-analog converter, the offset voltage of the output buffer and the gain error, so that the error of the output voltage is within 1LSB of the minimum resolution voltage.

(2) Since the system has calibration capability, it has strong tolerance for gain error and offset error, and does not require the output buffer amplifier to have extremely high gain and matching, which greatly reduces the high requirements for amplifier design.

(3) The calibration only needs to be completed once when the system is powered on. After completion, the output reference voltage can be maintained, and the calibration part will no longer work, which effectively avoids the large power consumption of the system.

Description of drawings

In order to explain the embodiments of the present invention or the technical solutions in the prior art more clearly, the following briefly introduces the accompanying drawings that need to be used in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only It is an embodiment of the present invention. For those of ordinary skill in the art, other drawings can also be obtained according to the provided drawings without creative efforts.

1 is a schematic structural diagram of an existing reference voltage generation circuit provided by the background technology of the present invention;

2 is a schematic structural diagram of a high-precision adjustable voltage reference circuit provided by an embodiment of the present invention;

3 is a schematic structural diagram of another high-precision adjustable voltage reference circuit provided by an embodiment of the present invention;

4 is a schematic structural diagram of an amplifier circuit used in an output buffer amplifier in an embodiment of the present invention;

5 is a schematic structural diagram of a comparator used in an embodiment of the present invention;

6 is a schematic diagram of a calibration sequence provided by an embodiment of the present invention;

FIG. 7 is a simulation waveform diagram of a calibration process provided by an embodiment of the present invention.

Detailed ways

In order to more clearly describe the embodiments of the present invention or the technical solutions in the prior art, the specific embodiments of the present invention will be described below with reference to the accompanying drawings. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can also be obtained based on these drawings without creative efforts, and obtain other embodiments.

In order to keep the drawings concise, the drawings only schematically show the parts related to the present invention, and they do not represent its actual structure as a product. In addition, in order to make the drawings concise and easy to understand, in some drawings, only one of the components having the same structure or function is schematically shown, or only one of them is marked. As used herein, "one" not only means "only one", but also "more than one".

The technical solutions of the present invention are described in detail below with specific embodiments.

Please refer to FIG. 2 , which is a schematic structural diagram of a high-precision adjustable voltage reference circuit provided by an embodiment of the present invention, including: a reference reference circuit module 1 , a main digital-to-analog converter (ie, a main DAC) 2 , an output buffer amplifier 3 and a voltage The calibration circuit module 4; the reference reference circuit module 1 is used to generate and output the reference reference voltage; the input ends of the main DAC 2 and the voltage calibration circuit module 4 are connected with the reference reference circuit module 1, for obtaining the reference reference voltage; output The input end of the buffer amplifier 3 is connected to the output end of the main DAC 2 for amplifying and buffering the output voltage of the main DAC 2; the other input end of the voltage calibration circuit module 4 is connected to the output end of the output buffer amplifier 3, Used to obtain the output voltage of the output buffer amplifier 3; the output terminal of the voltage calibration circuit module 4 is connected to the other input terminal of the main DAC 2; the voltage calibration circuit module 4 generates the output voltage based on the reference reference voltage and the output buffer amplifier 3 The first control signal is output to the main DAC 2 to control the main DAC 2 to adjust the output voltage and realize the calibration of the output reference voltage.

In a specific implementation process, please refer to FIG. 3 , the voltage calibration circuit module 4 includes: a calibration digital-to-analog converter (ie, a calibration DAC) 41 , a comparator 42 and a comparison control logic module 43 . 2 and 3, the input end of the calibration DAC 41 is connected to the reference reference circuit module 1 for obtaining the reference reference voltage; the negative input end (VIN_2) of the comparator 42 is connected to the output end of the calibration DAC 41, and the comparator The positive input terminal (VIP_2) of 42 is connected to the output terminal of the output buffer amplifier 3, and the comparator 42 is used to compare the output voltage of the calibration DAC 41 and the output voltage of the output buffer amplifier 3 to obtain a comparison result; the comparison control logic module 43 The input terminal of the comparator 42 is connected to the output terminal (COMP) of the comparator 42, the first output terminal is connected to the main DAC 2, and the second output terminal is connected to the calibration DAC 41; the comparison control logic module 43 generates the first control signal based on the comparison result. and the second control signal, which are respectively output to the main DAC 2 and the calibration DAC 41 through the first output terminal and the second output terminal, and are used to control and adjust the output voltage of the main DAC 2 and the calibration DAC 41 to realize the output Calibration of the reference voltage.

In the specific implementation process, the digital-to-analog conversion of the DAC needs to be realized based on the reference reference voltage. The main function of the reference reference circuit module 1 is to provide a reference reference voltage. In this embodiment, the bandgap reference is used. The bandgap reference can provide A reference voltage that is independent of supply voltage and temperature.

The main DAC 2 of this embodiment is implemented by a series resistance DAC and a binary current DAC, the series resistance DAC is used for high bits, and the binary current DAC is used for low bits. This DAC can control the analog output value of the DAC by controlling the binary input code to any X/2 ^N times the reference reference value, where the X range is an integer between 0 and 2 ^N. Of course, due to the mismatch between the resistance and the current, the output There is still a certain error between the results and the ideal results.

Please refer to FIG. 3 and FIG. 4 , the output buffer amplifier 3 port includes a positive input port (VIP_1) which is connected to the output port of the main DAC 2, and the output port (VOP) is used as the output of the system (that is, as the high-precision adjustable voltage in the embodiment of the present application). The output of the reference generating circuit) is connected to the positive input terminal (VIP_2) of the comparator 42 at the same time. The amplifier used in this embodiment is a folded cascode amplifier. The specific structure of the output buffer amplifier 3 can be selected according to the load and the input and output range. As shown in Figure 4, it is realized by 7 PMOS devices M1-M7 and 4 NMOS devices M8-M11. In the structure, M1 is a tube source The terminal is connected to the power supply, the gate terminal is connected to the bias voltage Vb1, the drain terminal is connected to the source terminals of M2 and M3; the gate terminal of M2 is connected to the positive input terminal (VIP_1), the source terminal is connected to the drain terminal of M1, and the drain terminal is connected to the source terminal of M8 and the drain terminal of M10; The gate terminal of M3 is connected to the negative input terminal (VIN_1), the source terminal is connected to the drain terminal of M1, the drain terminal is connected to the source terminal of M9 and the drain terminal of M11; the gate terminal of M4 is connected to the drain terminal of M6 and the drain terminal of M8, the source terminal is connected to the power supply, and the drain terminal is connected to M6 Source terminal; M5 gate terminal is connected to M4 gate terminal, source terminal is connected to power supply, drain terminal is connected to M7 source terminal; M6 gate terminal is connected to bias voltage Vb2 and connected to M7 gate terminal, source terminal is connected to M4 drain terminal, and drain terminal is connected to M8 drain. The gate terminal of M7 is connected to the gate terminal of M6, the source terminal is connected to the drain terminal of M5, the drain terminal is connected to the drain terminal of M9 and also serves as the amplifier output terminal VOP; the gate terminal of M8 is connected to the bias voltage Vb3, the source terminal is connected to the drain terminal of M10, and the drain terminal is connected to the drain terminal of M6. M9 gate terminal is connected to Vb3, source terminal is connected to M11 drain terminal, drain terminal is connected to VOP; M10 gate terminal is connected to bias voltage Vb4, source terminal is connected to ground, drain terminal is connected to M8 source terminal; M11 gate terminal is connected to bias voltage Vb4, The source terminal is connected to the ground, and the drain terminal is connected to the M9 source terminal.

The calibration DAC 41 used in this embodiment is a capacitor DAC. The capacitor usually has better absolute accuracy, but the disadvantage is that it will continue to leak and cannot be maintained for a long time. Since the calibration DAC 41 only needs to be used during calibration, it is feasible to use the high precision of the capacitive DAC to calibrate the low precision DAC.

Please refer to FIG. 3 and FIG. 5 , for the comparator 42 used in this embodiment, the positive input terminal (VIP_2) of the comparator 42 is connected to the output terminal (VOP) of the output buffer amplifier 3, and the negative input terminal (VIN_2) is connected to the calibration The output end of the DAC 41, the output end (COMP) is connected to the input end of the comparison control logic module 43. This embodiment uses a static pre-amplifier comparator with output offset storage. In order to prevent the offset of the comparator from bringing offset error to the comparison, the offset of the comparator is eliminated by the output offset storage method.

Still referring to FIG. 5 , the comparator 42 used in this embodiment includes three stages of preamplifiers (A1, A2, A3) and a latch (421), three pairs of offset storage capacitors (C1, C2, C3) and five pairs of switch (S1 to S5). The first end of the first pair of switches S1 is connected to the differential inputs VIP_2 and VIN_2 of the comparator 42, the second end is connected to the differential input end of the first stage preamplifier A1; the first end of the second pair of switches S2 is connected to the common mode reset voltage VCM, The second terminal is connected to the differential input terminal of the first-stage preamplifier A1; the first terminal of the third pair of switches S3 is connected to the common mode reset voltage VCM, and the second terminal is connected to the differential input terminal of the second-stage preamplifier A2; the fourth pair of switches S4 The first end is connected to the common mode reset voltage VCM, the second end is connected to the differential input end of the third-stage preamplifier A3; the first end of the fifth pair of switches S5 is connected to the common mode reset voltage VCM, and the second end is connected to the input end of the latch 421 The output end of the first-stage pre-amplifier A1 is connected to the first end of the first pair of capacitors C1; the input end of the second-stage pre-amplifier A2 is connected to the second end of the first pair of capacitors C1, and the output end is connected to the second pair of capacitors C2. The input end of the third-stage pre-amplifier A3 is connected to the second end of the second pair of capacitors C2, and the output end is connected to the first end of the third pair of capacitors C3; the input end of the latch 421 is connected to the second end of the third pair of capacitors C3. connected, the output is the comparator 42 output COMP.

Still referring to FIG. 3 , the input terminal of the comparison control logic module 43 is connected to the output terminal of the comparator 42 , the first output terminal of which is connected to the control input terminal of the main DAC 2 , and the second output terminal is connected to the input terminal of the calibration DAC 41 . The comparison control logic module 43 obtains the required voltage by controlling the main DAC 2 and the calibration DAC 41 , and then gradually adjusts the output voltage of the main DAC 2 according to the comparison result of the comparator 42 , thereby realizing the calibration of the output reference voltage.

Please refer to FIG. 6 , which is a schematic diagram of the calibration sequence provided by the embodiment of the present invention. After the system is initialized, the calibration mode is entered first, and the main DAC 2 and the calibration DAC 41 are assigned values according to the required output voltage, and the initial voltage is obtained after the assignment. The voltage value obtained in the calibration DAC 41 refers to the voltage CDAC in the figure, the system output value refers to VOUT in the figure, and DONE indicates whether the calibration process is completed. When the assignment is completed, the comparator 42 starts to compare the magnitudes of the two, the CDAC value remains unchanged, and the output of the main DAC 2 is continuously changed according to the comparison result, so that the VOUT step is close to the value of the CDAC. When the result of the comparator 42 is inverted, VOUT no longer changes, enabling calibration. At the end of the calibration, the flag signal DONE is set high, indicating that the calibration is completed, and the main DAC 2 can no longer change. The calibration DAC 41 and the comparator 42 can stop working to save power consumption.

Please refer to FIG. 7 , which is a simulation waveform diagram of a calibration process provided by an embodiment of the present invention. The figure shows a calibration process in a specific simulation process. At this time, the given reference reference voltage is 1V, and the required voltage is 31/ 32*1V=968.75mV, the required precision is 12 bits, that is, the achieved voltage precision is 1/2 ¹² =0.244mV. The voltage output by the system shown in the figure is constantly approaching the output value of the calibrated digital-to-analog converter. After the calibration is completed, the system output value VOUT=968.605mV, the error is 0.145mV, and it is within 1LSB, which meets the 12-bit calibration requirement.

In general, the present invention calibrates the main digital-to-analog converter with lower precision by calibrating the digital-to-analog converter with higher precision, and finally obtains a high-precision adjustable reference voltage output, which can eliminate the need for comparison with the traditional structure. Main DAC mismatch error, output buffer offset voltage, and gain error keep the output voltage error within 1LSB of the minimum resolution voltage. At the same time, it has strong tolerance for gain error and offset error, and does not require the output buffer amplifier to have extremely high gain and matching, which greatly reduces the high requirements for amplifier design. And the calibration only needs to be completed once when the system is powered on. After the completion, the output reference voltage can be maintained, and the calibration part will no longer work, which effectively avoids the large power consumption of the system.

Although the preferred embodiments of the present invention have been described, additional changes and modifications to these embodiments may occur to those skilled in the art once the basic inventive concepts are known. Therefore, the appended claims are intended to be construed to include the preferred embodiment and all changes and modifications that fall within the scope of the present invention.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit and scope of the invention. Thus, provided that these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims (7)

1. A high precision adjustable voltage reference circuit, comprising: the device comprises a reference circuit module, a main digital-to-analog converter, an output buffer amplifier and a voltage calibration circuit module;

the reference circuit module is used for generating and outputting a reference voltage;

the input ends of the main digital-to-analog converter and the voltage calibration circuit module are connected with the reference circuit module and used for acquiring the reference voltage;

the input end of the output buffer amplifier is connected with the output end of the main digital-to-analog converter and is used for amplifying and buffering the output voltage of the main digital-to-analog converter;

the other input end of the voltage calibration circuit module is connected with the output end of the output buffer amplifier and is used for acquiring the output voltage of the output buffer amplifier;

the output end of the voltage calibration circuit module is connected with the other input end of the main digital-to-analog converter; the voltage calibration circuit module generates a first control signal based on the reference voltage and the output voltage of the output buffer amplifier, and outputs the first control signal to the main digital-to-analog converter so as to control the main digital-to-analog converter to adjust the output voltage, thereby realizing calibration of the output reference voltage.

2. The high precision adjustable voltage reference circuit of claim 1, wherein the voltage calibration circuit module comprises: calibrating the digital-to-analog converter, the comparator and the comparison control logic module;

the input end of the calibration digital-to-analog converter is connected with the reference circuit module and used for acquiring the reference voltage;

the negative input end of the comparator is connected with the output end of the calibration digital-to-analog converter, the positive input end of the comparator is connected with the output end of the output buffer amplifier, and the comparator is used for comparing the output voltage of the calibration digital-to-analog converter with the output voltage of the output buffer amplifier to obtain a comparison result;

the input end of the comparison control logic module is connected with the output end of the comparator, the first output end of the comparison control logic module is connected with the main digital-to-analog converter, and the second output end of the comparison control logic module is connected with the calibration digital-to-analog converter; the comparison control logic module generates a first control signal and a second control signal based on the comparison result, and outputs the first control signal and the second control signal to the main digital-to-analog converter and the calibration digital-to-analog converter through the first output end and the second output end respectively, so as to control and adjust the output voltages of the main digital-to-analog converter and the calibration digital-to-analog converter, so as to realize the calibration of the output reference voltage.

3. The high precision adjustable voltage reference circuit according to claim 1, wherein said reference circuit block is implemented using a bandgap reference.

4. The high precision adjustable voltage reference circuit of claim 1, wherein said main digital-to-analog converter comprises: a resistance digital-to-analog converter and a binary current digital-to-analog converter are connected in series; the main digital-to-analog converter realizes high-order output through a series resistance digital-to-analog converter, and realizes low-order output through a binary current digital-to-analog converter.

5. The high precision adjustable voltage reference circuit of claim 1, wherein the output buffer amplifier employs a folded cascode amplifier structure.

6. The high accuracy adjustable voltage reference circuit as claimed in claim 2, wherein said calibration digital to analog converter is embodied as a capacitive digital to analog converter.

7. The high accuracy adjustable voltage reference circuit of claim 2 wherein said comparator is a static pre-amplified comparator with output offset storage.

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