CN102075188A - Digital static calibration circuit of digital-to-analog converter (DAC) - Google Patents
Digital static calibration circuit of digital-to-analog converter (DAC) Download PDFInfo
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- CN102075188A CN102075188A CN2010106241569A CN201010624156A CN102075188A CN 102075188 A CN102075188 A CN 102075188A CN 2010106241569 A CN2010106241569 A CN 2010106241569A CN 201010624156 A CN201010624156 A CN 201010624156A CN 102075188 A CN102075188 A CN 102075188A
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Abstract
The invention discloses a digital static calibration circuit of a digital-to-analog converter (DAC), which can be used for calibrating a most significant bit (MSB) current source and a least significant bit (LSB) total current source in a current mode DAC. The calibration circuit can operate in a calibration mode and an output mode respectively under the control of external signals. The calibration circuit comprises an address generator, a switch array, a sequential approximation logical module, a calibration DAC array, a memory, a comparator and an integrated current gain module, wherein the integrated current gain module comprises a current source array for regulating integral current, a paired choice, a full-scale adjusting resistor and an amplifier. The calibration circuit is used for overcoming the difficulty that the accuracy of the current mode DAC is limited, realizing the high static linearity of the DAC, and improving the accuracy of the current mode DAC.
Description
Technical field
The present invention relates to a kind of current mode DAC calibration circuit, be mainly used in the current source of segmented current mode DAC is calibrated, belong to technical field of composite signal integrated circuits.
Background technology
In recent years, the demand of high-speed communication system constantly increases.Interface module digital to analog converter as digital world and simulated world also becomes more and more important, and the precision of number of modules weighted-voltage D/A converter and speed have also determined the precision and the speed of whole system.Therefore, high-precision digital to analog converter is had higher requirement.
But because the restriction of technology matching performance, practice academic and industrial quarters shows: for the above DAC of 16 bit resolutions, no matter using the random mismatch control device still is the system mismatch control device, all can't accomplish the matching precision of wanting.In any case do not reach 16 DC precision under the collimation technique routine not using yet, therefore just must calibrate to current with high accuracy type digital to analog converter.
Collimation technique has two kinds of methods usually: dynamic calibration and static calibration.Dynamic calibration be in time with at random or pseudorandom mode be used alternatingly the mismatch device, the error of DAC is shifted to high-frequency range, filter by digital filter at last, but because the increase of background noise, the Filter Design difficulty will increase, and SNDR also can descend more.Static calibration then is by measuring the mismatch size, utilizing the means of rectification building-out that matching precision is improved, but need off-line calibration.
Traditional quiescent current source calibration can be by the method for laser trimming or adjustment bias voltage.But because laser trimming needs special technology and may cause that thermal and mechanical stress makes its feasibility be restricted.And the instability problem that the method for adjusting bias voltage exists supply voltage to descend and brought, cause adjusting the instability problem that the method for bias voltage exists supply voltage to descend and brought, the condition of work that need constantly refresh the generation bias circuit is to guarantee bias voltage stability, so it is also unrealistic to use this method.
And, calibration for conventional current source matching error, if only adopt built-in self-calibration circuit, the result of calibration can only depend on the quality of self-calibration circuit design and the reliability of circuit, can not carry out manual calibration according to the actual result of chip testing, make DAC all can realize the better linearity in all cases.
Summary of the invention
Technology of the present invention is dealt with problems and is: at the deficiency of traditional DAC calibration circuit, provide a kind of current mode DAC calibration circuit.Adopt this circuit to overcome the limited difficulty of current mode digital-to-analogue converter precision, realized the high static linearity of DAC, improved the precision of current mode digital-to-analog converter.
Technical solution of the present invention is:
A kind of current mode DAC calibration circuit, can in current mode DAC, calibrate MSB current source and LSB total current source, it is characterized in that: described calibration circuit is externally under the control of signal, work in calibration mode and output mode respectively, comprise address generator, switch arrays, approach logic module, calibration DAC array, memory, comparator and overall current gain module one by one, described overall current gain module comprises current source array, alternative, the full scale adjusting resistance that is used to adjust overall current, amplifier;
MSB current source, LSB total current source and the n current signal that described current source array produces link to each other with the n input of switch arrays;
Switch arrays have and n the corresponding n of an input output and 1 output linking to each other with the input of comparator;
Comparator has 2 inputs and 1 output, and 1 input links to each other with the output of switch arrays, and 1 input links to each other with reference current, and the output of comparator links to each other with the input that approaches logic module one by one;
The output that approaches logic module one by one links to each other with memory;
Memory links to each other with calibration DAC array, and described calibration DAC array comprises n calibration DAC, and n calibration DAC can read memory, and the output of n calibration DAC links to each other with the output of switch arrays respectively;
Under calibration mode, the switch arrays externally address signal control that produces of control signal and address generator output to n road current signal gating comparator down successively;
The reference current of comparator utilization input and current signal produce error signal and output;
Approach logic module one by one and error signal is carried out analog-to-digital conversion generate calibration code, and calibration code is outputed to memory store;
Calibration DAC among the calibration DAC reads the calibration code in the memory, generates calibration current according to calibration code by digital-to-analogue conversion, and directly exports on the current signal that is calibrated that is added to; To the calibration that circulates of every road current signal, up to utilizing the calibration code and the reference current source current signal that produce to be complementary;
After n the calibration code that generates corresponding to every road current signal, utilize the overall current gain module that overall current is gained and calibrate; Be used to adjust and utilize full scale to regulate resistance behind the current signal alternative that the current source array of overall current produces and amplifier produces the control signal that is used to control tested MSB current source and LSB total current source; Calibration mode finishes;
Under output mode, switch arrays are externally exported the n road current signal of input under the control of control signal from n output; The DAC address signal gating n that calibration DAC array utilizes address generator to produce is individual to calibrate DAC one to one with n road current signal; N calibration DAC reads corresponding calibration code in the memory respectively, and calibration code is carried out digital-to-analogue conversion generates calibration current; N current signal exported with the superimposed back of corresponding calibration current respectively.
Current mode DAC calibration circuit of the present invention also comprises nonvolatile memory, can be present in the calibration code in the memory behind the electricity under circuit, and dump in the memory after circuit re-powers.
Described calibration code can directly produce according to voltage or the current signal that circuit produces, and dumps in the memory by nonvolatile memory, is used to be calibrated DAC and reads the generation calibration current.
The present invention compared with prior art has following advantage:
1, calibration circuit of the present invention is a kind of foreground calibrating installation, carries out can not influencing the DAC operating rate so calibration mode separates with output mode.
2, with respect to the continuous refresh operation Dynamic Calibration Technique of traditional needs, static calibration technology power consumption used in the present invention is lower.
3, adopt a total calibration DAC that overall situation output calibration steps is compared with general digital still calibration, DAC is calibrated on all corresponding one of each road of this collimation technique, has reduced the area of needed memory, has reduced design difficulty simultaneously
4, can adopt the mode of manual calibration, self calibration mode and calibration able to programme, calibrating mode is flexible, adaptability is strong.
5, calibration code can be kept at nonvolatile memory or static memory, can directly read calibration code after powering on, and can change according to the applied environment calibration code, makes circuit satisfy multiple applied environment and conditional request.
Description of drawings
Fig. 1 is a structure chart of the present invention;
Fig. 2 is a workflow diagram of the present invention;
Fig. 3 is that illustration is implemented in calibration to current signal;
Fig. 4 is reference current source calibration embodiment figure;
Fig. 5 implements illustration for overall current gain calibration.
Embodiment
Below just in conjunction with the accompanying drawings the present invention is further introduced.
At first technical term involved in the present invention is described:
DAC:Digital to Analog Converter, digital-to-analog converter
MSB:Most Significant Bit, highest significant position
LSB:Least Significant Bit, least significant bit
SNDR:Signal Noise Distortion Rate, signal noise imbalance ratio
DAC
RF: the digital to analog converter that is used for the calibration reference electric current
DAC
CAL: the digital to analog converter that is used for the calibration current source in the calibration DAC array
I
Current: the whole output current of circuit
Ic: input comparator be calibrated current signal
I
REF: reference current source
As shown in Figure 1, be structure chart of the present invention.Described current mode DAC calibration circuit can be calibrated the multichannel current signal of MSB current source and the generation of LSB total current source.Calibration circuit comprises: address generator, switch arrays, comparator, approach logic module, calibration DAC array, memory and overall current gain module one by one, give simultaneously and be used to store the nonvolatile memory of manual calibration sign indicating number and produce the analog switch array and the LSB segmented current source array of the whole output of current mode DAC.The annexation of each intermodule as seen in Figure 1.
Wherein, as shown in Figure 5, the overall current gain module comprises the current source 206 that is used to calibrate the overall current gain, alternative data selector select switch, and full scale is regulated resistance 204, amplifier 205.
Whole calibration circuit has calibration mode and output mode, and switch arrays are wherein controlled by one tunnel external control signal, selects that the current signal that is calibrated is outputed to the analog switch array direction and still outputs to the comparator direction.Under calibration mode, switch arrays with current signal from the output of the output that links to each other with the input of comparator, utilize during output address signal that address generator produces successively gating output from being calibrated n the input current signal of sending in the source.
Comparator and approach logic module one by one and only work under calibration mode adopts the difference mode of operation, output by school current signal and reference circuit signal difference output to as error signal and approach logic module one by one.Approaching logic module one by one is an analog to digital converter, and the error signal that comparator is imported becomes digital calibration code by sampling, and calibration code is stored in memory.
Calibration DAC array by n be calibrated the corresponding n of current signal and calibrate DAC and form, calibration DAC can read the calibration code in the memory, and by digital-to-analogue conversion generation calibration current, current signal that is calibrated by calibration current is added to and then realization calibration.
And calibration mode can be divided into automatic calibration and manual calibration, and when calibrating automatically, circuit produces calibration code according to being calibrated current signal by approaching logic module one by one.And when manual calibration, then can manually directly produce calibration code according to voltage that produces or current signal, the artificial calibration code that produces can dump in the memory by nonvolatile memory.
When concrete calibration, the elder generation of calibration circuit calibrates the reference current source that is input to comparator, utilizes the reference current source after calibrating successively the current signal of input to be calibrated again, and gain is calibrated to overall current at last.
After calibration finishes, will enter output mode, switch arrays are externally exported n road current signal, address generator gating and the corresponding calibration of n road current signal DAC from n output under the control of control signal
CAL, calibration DAC will produce in the output of n the calibration current signal and the n road current signal that is added to, and realize the calibration to electric current.
Embodiment
Below just in conjunction with the embodiments, do further introduction.For ease of explanation, the precision of the current mode DAC calibration circuit in the present embodiment is 16, adopts " 7+4+5 " segmented mode, and MSB has 7, adopts the thermometer coding mode, and LSB has 9, adopts the mode of thermometer coding and binary coding combination.The figure place of calibration DAC is 6, i.e. K=6.
Before calibration circuit work, at first reference current source is calibrated.Concrete calibration steps is: for reference current designs a suitable value guaranteeing that being calibrated electric current can approach this reference current one by one in the calibration range of corresponding calibration circuit, have a calibration DAC to be used for the calibration reference current source in calibration DAC array.When beginning calibration, the calibration DAC that is used for calibrating first MSB current source was also selected except the calibration DAC of reference current source is selected, and it be input as half of calibration DAC full scale, its output valve flows to the input of comparator, as shown in Figure 4.By approaching logic module one by one its output valve being calibrated the DAC full scale for first when changing the value of reference current calibration DAC half can be eliminated the systematic skew that is brought by comparator like this.
After the calibration of finishing reference current, circuit begins the current source to be calibrated that inserts is calibrated.This moment and first current source of MSB current array are to corresponding calibration DAC (DAC
CAI) will be selected again, the selection of twice repetition can improve calibration accuracy.The input reverse operation of the calibration DAC of current source and they, when their binary system input value increased, their quantity of seeing at calibration DAC output of current contribution reduced.
As shown in Figure 3, the initial condition of approaching logic one by one is half of DAC full scale, works as I
C＜I
REFAnd when the output of comparator is " 1 ", the binary system calibration code of approaching the logic generation one by one will reduce gradually, but calibrating DAC will increase its output valve gradually, when output is increased to I
C＞I
REFThe time, the output of comparator becomes " 0 ", and approaching logic then one by one can increase calibration code gradually, and DAC
CALOutput current will reduce gradually.Among Fig. 3 by two PMOS switching tubes 201 and PMOS switching tube 202 guide current or flow to output or flow to calibration loop and can manage 203 with PMOS and form the cascade pipe.The grid of PMOS switching tube 201 and PMOS switching tube 202 is used alternatingly bias voltage, no matter can guarantee electric current source capsule 203 like this at normal mode or at calibration mode, and it is identical that drain voltage keeps, and this will bring very high calibration accuracy.Wherein, AVDD is a supply voltage.
For the calibration in single current source, because each calibration DAC is 6, so need through finishing calibration after 6 calibration clock cycle.As shown in Figure 2, be a flow chart that calibration DAC calibrates.Approach logic module one by one and will produce one 6 calibration code as the input of calibration DAC, this moment the current value I that has been calibrated
CApproach most I
REFValue, this time calibration will be closed automatically simultaneously, and the calibration of next current source to be calibrated begins then.
After the calibration of all MSB current sources and LSB total current is finished, will carry out the calibration of overall current gain, will utilize m2 to calibrate the calibration that DAC gains to the total transmission function.Because when reference current source is calibrated, reference current source is a fiducial value and half sum of calibration DAC full scale, shown in the output valve of each current source that is calibrated all increase to some extent, cause the integral body output I of last circuit
CurrentExceed scope of design, it is calibrated so need gain to the total transmission function.
DAC
CALOutput and input direct ratio work, when their binary system input value increased, their quantity of seeing at calibration DAC output of current contribution increased.As shown in Figure 5.Because the electric current increase that is calibrated impels the voltage at outside accurately resistance 204 value two ends to increase, cause the input voltage 104 of amplifier 205 anodes to increase, the gate voltage 103 of PMOS electric current source capsule 206 increases, and causes I
CurrentDescend.Therefore designed a built-in negative feedback loop, changed even circuit is calibrated the scope of back full scale output, gain calibration also can make the coupling of current source array become better, does not influence the output area of full scale simultaneously.
When finishing self-calibration process, calibration code also has been saved in the static memory simultaneously, the data of the inside can be written in the nonvolatile memory.During each circuit start, content in the nonvolatile memory is being read in the static memory,, finished the process of automatic calibration as the input of calibration DAC.The user equally can be according to self calibration result's quality, do not choose the calibration result that exists behind the self calibration in static memory or the nonvolatile memory, but adopt actual test output result, according to test result, calculate calibration code, write in the nonvolatile memory or directly then and store in the static memory.When circuit started once more, the data in the nonvolatile memory were read in the static memory, reached the purpose of calibration.
The unspecified part of the present invention belongs to general knowledge as well known to those skilled in the art.
Claims (3)
1. current mode DAC calibration circuit, can in current mode DAC, calibrate MSB current source and LSB total current source, it is characterized in that: described calibration circuit is externally under the control of signal, work in calibration mode and output mode respectively, comprise address generator, switch arrays, approach logic module, calibration DAC array, memory, comparator and overall current gain module one by one, described overall current gain module comprises current source array, alternative, the full scale adjusting resistance that is used to adjust overall current, amplifier;
MSB current source, LSB total current source and the n current signal that described current source array produces link to each other with the n input of switch arrays;
Switch arrays have and n the corresponding n of an input output and 1 output linking to each other with the input of comparator;
Comparator has 2 inputs and 1 output, and 1 input links to each other with the output of switch arrays, and 1 input links to each other with reference current, and the output of comparator links to each other with the input that approaches logic module one by one;
The output that approaches logic module one by one links to each other with memory;
Memory links to each other with calibration DAC array, and described calibration DAC array comprises n calibration DAC, and n calibration DAC can read memory, and the output of n calibration DAC links to each other with the output of switch arrays respectively;
Under calibration mode, the switch arrays externally address signal control that produces of control signal and address generator output to n road current signal gating comparator down successively;
The reference current of comparator utilization input and current signal produce error signal and output;
Approach logic module one by one and error signal is carried out analog-to-digital conversion generate calibration code, and calibration code is outputed to memory store;
Calibration DAC among the calibration DAC reads the calibration code in the memory, generates calibration current according to calibration code by digital-to-analogue conversion, and directly exports on the current signal that is calibrated that is added to; To the calibration that circulates of every road current signal, up to utilizing the calibration code and the reference current source current signal that produce to be complementary;
After n the calibration code that generates corresponding to every road current signal, utilize the overall current gain module that overall current is gained and calibrate; Be used to adjust and utilize full scale to regulate resistance behind the current signal alternative that the current source array of overall current produces and amplifier produces the control signal that is used to control tested MSB current source and LSB total current source; Calibration mode finishes;
Under output mode, switch arrays are externally exported the n road current signal of input under the control of control signal from n output; The DAC address signal gating n that calibration DAC array utilizes address generator to produce is individual to calibrate DAC one to one with n road current signal; N calibration DAC reads corresponding calibration code in the memory respectively, and calibration code is carried out digital-to-analogue conversion generates calibration current; N current signal exported with the superimposed back of corresponding calibration current respectively.
2. a kind of current mode DAC calibration circuit according to claim 1 is characterized in that: also comprise nonvolatile memory, can be present in the calibration code in the memory behind the electricity under circuit, and dump in the memory after circuit re-powers.
3. a kind of current mode DAC calibration circuit according to claim 1 and 2, it is characterized in that: described calibration code can directly produce according to voltage or the current signal that circuit produces, and dump in the memory by nonvolatile memory, be used to be calibrated DAC and read the generation calibration current.
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| CN102437850A (en) * | 2011-09-28 | 2012-05-02 | 香港应用科技研究院有限公司 | Charge compensation calibration of high-precision data conversion |
| CN102545906A (en) * | 2012-02-10 | 2012-07-04 | 英特格灵芯片(天津)有限公司 | Current digital to analog conversion method and device |
| CN103117747A (en) * | 2013-03-07 | 2013-05-22 | 英特格灵芯片(天津)有限公司 | Digital analog converter (DAC) and calibrating circuit thereof |
| CN103368576A (en) * | 2013-07-15 | 2013-10-23 | 北京时代民芯科技有限公司 | Method for digitally controlling full deflection output current of digital analog converter |
| CN103546157A (en) * | 2013-10-23 | 2014-01-29 | 电子科技大学 | Current steering digital-to-analog conversion device |
| CN103684457A (en) * | 2013-12-13 | 2014-03-26 | 中国电子科技集团公司第五十八研究所 | Method for calibrating power source array in segmented type current-steering DAC |
| WO2014114004A1 (en) * | 2013-01-28 | 2014-07-31 | 香港中国模拟技术有限公司 | Self-calibration current source system |
| CN104333382A (en) * | 2014-10-28 | 2015-02-04 | 长沙瑞达星微电子有限公司 | Current-steering DAC (digital-to-analog converter) calibration method |
| CN104518797A (en) * | 2015-01-26 | 2015-04-15 | 中国电子科技集团公司第二十四研究所 | Jitter circuit for high-precision analogue to digital converter |
| CN106301376A (en) * | 2015-06-03 | 2017-01-04 | 中国科学院深圳先进技术研究院 | A kind of low-power consumption gradual approaching A/D converter of comparator offset current adjustment |
| CN106487384A (en) * | 2016-10-11 | 2017-03-08 | 上海华虹集成电路有限责任公司 | Self-calibration circuit for D/A converting circuit |
| CN107809243A (en) * | 2016-09-08 | 2018-03-16 | 上海贝岭股份有限公司 | Analog-digital converter circuit |
| CN111246138A (en) * | 2020-01-17 | 2020-06-05 | 北京安酷智芯科技有限公司 | Uncooled infrared image sensor and correction method thereof |
| CN113055008A (en) * | 2021-03-31 | 2021-06-29 | 清华大学深圳国际研究生院 | Current source for improving linearity of current steering type DAC (digital-to-analog converter) and DAC |
| CN114326900A (en) * | 2021-12-29 | 2022-04-12 | 华中科技大学 | High-precision adjustable reference voltage generation circuit |
| US11711090B2 (en) | 2019-11-27 | 2023-07-25 | Vervesemi Microelectronics Private Limited | Current steering digital to analog converter (DAC) system to perform DAC static linearity calibration |
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| CN102437850A (en) * | 2011-09-28 | 2012-05-02 | 香港应用科技研究院有限公司 | Charge compensation calibration of high-precision data conversion |
| CN102437850B (en) * | 2011-09-28 | 2014-10-15 | 香港应用科技研究院有限公司 | Charge compensation calibration of high-precision data conversion |
| CN102545906A (en) * | 2012-02-10 | 2012-07-04 | 英特格灵芯片(天津)有限公司 | Current digital to analog conversion method and device |
| CN102545906B (en) * | 2012-02-10 | 2015-01-07 | 英特格灵芯片(天津)有限公司 | Current digital to analog conversion method and device |
| WO2014114004A1 (en) * | 2013-01-28 | 2014-07-31 | 香港中国模拟技术有限公司 | Self-calibration current source system |
| CN103117747A (en) * | 2013-03-07 | 2013-05-22 | 英特格灵芯片(天津)有限公司 | Digital analog converter (DAC) and calibrating circuit thereof |
| CN103368576A (en) * | 2013-07-15 | 2013-10-23 | 北京时代民芯科技有限公司 | Method for digitally controlling full deflection output current of digital analog converter |
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| CN103684457A (en) * | 2013-12-13 | 2014-03-26 | 中国电子科技集团公司第五十八研究所 | Method for calibrating power source array in segmented type current-steering DAC |
| CN103684457B (en) * | 2013-12-13 | 2016-09-07 | 中国电子科技集团公司第五十八研究所 | The calibration steps of current source array in segmented current steering DAC |
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| CN107809243A (en) * | 2016-09-08 | 2018-03-16 | 上海贝岭股份有限公司 | Analog-digital converter circuit |
| CN106487384A (en) * | 2016-10-11 | 2017-03-08 | 上海华虹集成电路有限责任公司 | Self-calibration circuit for D/A converting circuit |
| US11711090B2 (en) | 2019-11-27 | 2023-07-25 | Vervesemi Microelectronics Private Limited | Current steering digital to analog converter (DAC) system to perform DAC static linearity calibration |
| CN111246138A (en) * | 2020-01-17 | 2020-06-05 | 北京安酷智芯科技有限公司 | Uncooled infrared image sensor and correction method thereof |
| CN111246138B (en) * | 2020-01-17 | 2022-03-25 | 北京安酷智芯科技有限公司 | Uncooled infrared image sensor and correction method thereof |
| CN113055008A (en) * | 2021-03-31 | 2021-06-29 | 清华大学深圳国际研究生院 | Current source for improving linearity of current steering type DAC (digital-to-analog converter) and DAC |
| CN114326900A (en) * | 2021-12-29 | 2022-04-12 | 华中科技大学 | High-precision adjustable reference voltage generation circuit |
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