CN110958021B - Self-calibration system and method for high-speed high-precision current rudder digital-to-analog converter - Google Patents
Self-calibration system and method for high-speed high-precision current rudder digital-to-analog converter Download PDFInfo
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/10—Calibration or testing
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Abstract
A self-calibration system and a method for a high-speed high-precision current rudder digital-to-analog converter belong to the technical field of digital-to-analog converters. The invention comprises the following steps: the reference current source is connected to the positive input end of the current comparator, and the current source to be calibrated and the calibration DAC module are connected to the negative input end of the current comparator for current comparison; the initial value of the calibration code is all 0, firstly the highest bit of the calibration code is changed into 1, and whether the current calibration bit is 1 is determined according to the output result of the comparator; if the output result of the current comparator is high level 1, the current calibration bit is 1, otherwise, the current calibration bit is 0; then the above processes are repeated in sequence from the next highest bit to the lowest bit until all K-bit calibration codes are determined, and comparison is stopped; latching the current calibration code in an error latch; the calibration DAC module generates calibration error compensation current under the control of the calibration code, and the current source calibration is completed; and the total current obtained by adding the calibration error compensation current and the current of the current source to be calibrated is consistent with the current of the reference current source.
Description
Technical Field
The invention relates to a self-calibration method of a high-speed high-precision current rudder digital-to-analog converter, and belongs to the technical field of digital-to-analog converters.
Background
The high-speed high-precision digital-to-analog converter is an important component of modern broadband communication, radar and other equipment, and the current rudder digital-to-analog converter is widely applied to high-speed high-precision systems because of higher working speed and direct driving of resistive loads. For a long time, due to the matching error limitation of the CMOS process, the current steering digital-to-analog converter realized by only depending on the intrinsic matching of the CMOS process can generally reach the accuracy of 10-12 bits. The static performance of the current rudder digital-to-analog converter is mainly determined by the matching performance among the current source tubes, and the matching performance of the current source can be improved by increasing the size of the current source tubes, but with the improvement of the resolution of the digital-to-analog converter, the method becomes difficult to realize, because each time the resolution of the digital-to-analog converter is improved by 1 bit, the area of the current source tubes is increased geometrically to meet the matching requirement, and the larger the area is, the larger the cost of the chip is.
Along with the improvement of the conversion rate of the analog-to-digital converter, the dynamic performance of the current steering digital-to-analog converter can be reduced along with the improvement of the signal frequency and the clock frequency, and the dynamic performance of the current steering digital-to-analog converter can be improved by reducing the parasitic capacitance and the resistance of the transistor and shortening the setup time; however, in order to ensure the static performance of the current steering digital-to-analog converter, the size and the complex layout of the transistor need to be increased to reduce random mismatch and system mismatch, which can increase the parasitic capacitance and the resistance of the transistor, which is similar to the improvement of the dynamic performance of the current steering digital-to-analog converter.
In order to better solve the contradiction between the improvement of the static performance and the dynamic performance of the current rudder analog-to-digital converter, a current source calibration technology is generally adopted, so that the requirement of the matching property on the area of a current source is reduced, and the improvement of the dynamic performance is not influenced; the current source calibration technology can effectively calibrate the current mismatch among all the current sources, and ensures that the current rudder analog-to-digital converter has high accuracy and high dynamic performance.
The digital-to-analog converter calibration technology can be classified into analog calibration and digital calibration according to the processing mode of the calibration control signal, and can be classified into foreground static calibration and background dynamic calibration according to whether the converter circuit works normally or not during calibration. The method is realized by continuous comparison and feedback in an analog domain, and the grid source voltage of the current source tube is generally kept by adopting capacitor charge and discharge, but the bias voltage of the current source tube is required to be continuously refreshed and adjusted due to the leakage phenomenon of the capacitor, and the calibration precision is not high. The digital background calibration technology can perform calibration operation while the converter circuit works, and has the defect that a substitute current source is required to continuously substitute a certain current source to be calibrated, and switching current burrs are introduced when the substitute current source and the current source to be calibrated are continuously switched, so that the dynamic performance of the digital-to-analog converter is reduced.
Disclosure of Invention
The invention aims to overcome the defects in the prior art and provides a self-calibration method of a high-speed high-precision current rudder digital-to-analog converter, which is characterized in that before the digital-to-analog converter works formally, a calibration control logic module is used for processing a calibration signal in the digital field by using an internal state machine under the drive of a calibration clock to obtain calibration error information, and the calibration error information is sent to a calibration DAC to perform current compensation, so that the matching of current of a current source is ensured. The self-calibration process is in a fully automatic mode without human interference, and can be completed only by one calibration, so that the problems of inaccurate analog calibration and repeated refreshing are solved, the problem of dynamic performance reduction caused by digital background calibration is solved, the calibration precision is improved, the circuit performance is improved, and the calibration range and precision can be expanded by adjusting the full-scale output current and the minimum weight current of the calibration DAC.
The technical scheme of the invention is as follows: a self-calibration system of a high-speed high-precision current rudder digital-to-analog converter comprises a reference current source, a current source to be calibrated, a current comparator, a calibration control logic module, an error latch and a calibration DAC module;
the reference current source is used for providing reference current for comparison, and the output end of the reference current source is connected with the positive input end of the current comparator;
the output end of the current source to be calibrated is connected with the negative input end of the current comparator;
the current comparator is used for comparing the current values input by the positive input end and the negative input end and outputting the comparison result from the output end of the comparator to the input end of the calibration control logic module;
the calibration control logic module is used for generating a calibration control signal by using an internal state machine under the driving of the received calibration clock; the calibration control signals comprise a reference current source gating signal for controlling the on-off of a reference current source, a comparator enabling signal for controlling the on-off of a comparator, a current source gating signal to be calibrated for controlling the on-off of a current source to be calibrated, a calibration DAC module gating signal for controlling the on-off of a calibration DAC module and a calibration code for controlling the output current of the calibration DAC module;
the input end of the error latch is connected with the output end of the calibration control logic module, and the output end of the error latch is connected with the input end of the calibration DAC module, is used for receiving and storing the calibration code and sends the calibration code to the calibration DAC module;
and the output end of the calibration DAC module is connected with the current comparator and is used for receiving the calibration code, generating comparison error current according to the calibration code and compensating the comparison error current to the current source to be calibrated.
Further, the reference current source comprises a middle-position reference current source and a high-position reference current source, and the current comparator comprises a middle-position comparator and a high-position comparator; the input ends of the middle-position reference current source and the high-position reference current source are connected with the output end of the calibration control logic module, and the output ends are respectively connected with the positive input ends of the middle-position comparator and the high-position comparator; the middle-position reference current source and the high-position reference current source respectively receive corresponding reference current source gating signals.
Further, the current source to be calibrated comprises a middle-position current source to be calibrated and a high-position current source to be calibrated; the input ends of the middle-position current source to be calibrated and the high-position current source to be calibrated are both connected with the output end of the calibration control logic module, the output end of the middle-position current source to be calibrated is connected with the negative input ends of the middle comparator and the high-position comparator, and the output end of the high-position current source to be calibrated is connected with the negative input end of the high-position comparator; and the middle-position current source to be calibrated and the high-position current source to be calibrated respectively receive corresponding current source gating signals to be calibrated.
Further, the calibration DAC module comprises a reference calibration DAC module for compensating a reference current source, and a middle calibration DAC module and a high calibration DAC module for compensating a middle current source to be calibrated and a high current source to be calibrated respectively; the input ends of the reference calibration DAC module, the middle calibration DAC module and the high calibration DAC module are all connected with respective error latches; the output end of the reference calibration DAC module is connected with the positive input ends of the middle comparator and the high comparator, and the output ends of the middle calibration DAC module and the high calibration DAC module are respectively connected with the negative input ends of the middle comparator and the high comparator, and respectively receive the calibration DAC module gating signals and the calibration codes.
Further, the self-calibration method of the high-speed high-precision current steering digital-to-analog converter comprises the following steps:
s1, performing median current source calibration: the calibration control logic module sends an enable ENP1 signal and an enable SW1 signal, the enable ENP1 signal gates a median reference current source, the enable SW1 signal gates a matched calibration DAC module, and the current of the median reference current source is I1<0>Current I1<0>The current weight of the current source to be calibrated is the same as that of the current source to be calibrated; meanwhile, the calibration control logic module sets the initial value of the calibration code of the calibration DAC module matched with the median reference current source as INT<K:i>= … 00, output a calibration initial value compensation current I INT Current I1 of the current neutral reference current source<0>Compensating current I with a calibration initial value INT Generating a median reference current I1 by addition<0>+I INT Calibrating the self current as the target of other current sources to be calibrated; i is a number;
s2, after the middle position reference current is set, the calibration control logic module sends an enabling S11<1>Signal gating a median current source to be calibrated, transmit enable S33<1>The signal gates the matched median calibration DAC module, and simultaneously transmits an enable SW3 signal to connect the median current source to be calibrated and the matched median calibration DAC module to the negative input end of the median current comparator to be connected with the median reference current I1<0>+I INT Current comparison is performed to generate a median calibration code CAL1<K:i>The method comprises the steps of carrying out a first treatment on the surface of the Median calibration code CAL1<K:i>Latching in a matched error latch, and forwarding to a corresponding median calibration DAC module to control the median calibration DAC module to output a median calibration error compensation current I 1A <1>The method comprises the steps of carrying out a first treatment on the surface of the Output current I1 of the neutral current source to be calibrated<1>Median calibration error compensation current I output by matched median calibration DAC module 1A <1>Generating an output current I1 by adding<1>+I 1A <1>Completing the calibration of a current source to be calibrated in the middle position;
s3, repeating the step S2, and completing the calibration of all the current sources to be calibrated in the middle position;
s4, performing high-order current source calibration: the calibration control logic module outputs the enable S11 at the same time<M:1>Signal gating all median current sources to be calibrated and enabling S33<M:1>Signal gating all the calibration DAC modules matched with the median current sources to be calibrated, and outputting an enable SW4 signal to enable the output currents I of all the calibrated median current sources 1A <1>+I1<1>+I 1A <2>+I1<2>+…+I 1A <M>+I1<M>The negative input end of the high-order current comparator is connected through addition; meanwhile, the calibration control logic module sends an enable ENP2 signal and an enable SW2 signal, the enable ENP2 signal gates a high-order reference current source, the enable SW2 signal gates a matched calibration DAC module of the enable ENP2 signal to be connected to the positive input end of the high-order current comparator for comparison, and high-order reference compensation current is generated to be I S Output current I2 of high-order reference current source<0>High-order reference compensation current I output by DAC module matched with high-order reference compensation current I S Generating high-order reference currents I2 by addition<0>+I S Calibrating the target of the self current as other high-order current sources to be calibrated;
s5, after completing the high-order reference current setting, the calibration control logic module sends an enabling S22<1>Signal gates a high-order current source to be calibrated and sends an enable S44<1>The signal gates the matched calibration DAC module, and simultaneously transmits an enable SW5 signal to connect the high-order current source to be calibrated and the matched calibration DAC module to the negative input end of the high-order comparator to be connected with the high-order comparatorCurrent comparison is carried out by referring to the reference current to generate a high-order calibration code CAL2<K:i>The method comprises the steps of carrying out a first treatment on the surface of the Will high order calibration code CAL2<K:i>Latching in a matched error latch, and forwarding to a corresponding high-order calibration DAC module to control the high-order calibration DAC module to output high-order calibration error compensation current I 2A <1>The method comprises the steps of carrying out a first treatment on the surface of the Output current I2 of high-order current source to be calibrated<1>High-order calibration error compensation current I output by DAC module matched with high-order calibration error compensation current I 2A <1>Generating an output current I2 by summing<1>+I 2A <1>Completing the calibration of a high-order current source to be calibrated;
s6, repeating the step S5, and completing the calibration of all high-order current sources to be calibrated.
Further, the method for comparing the current with the middle or high reference current comprises the following steps: successive approximation method.
Compared with the prior art, the invention has the beneficial effects that:
(1) The digital self-calibration method of the high-speed high-precision current rudder digital-analog converter is different from a permanently fixed and irreversible manual fuse trimming and calibrating mode, can automatically complete calibration according to different application environments, and has the advantages of simple and flexible calibration process and strong environmental adaptability.
(2) Compared with the analog calibration mode for correcting the grid source bias voltage of the current source tube, the digital self-calibration method of the high-speed high-precision current rudder digital-analog converter has high calibration precision, and can be completed by one calibration without repeated refreshing calibration.
(3) According to the digital self-calibration method of the high-speed high-precision current rudder digital-analog converter, each current source to be calibrated is matched with one calibration DAC module and the error latch, and compared with the calibration mode of only one calibration DAC module, the digital self-calibration method has the advantages that the calibration error information storage address decoding is simple, the digital logic scale is small, and the calibration speed is high.
(4) According to the digital self-calibration method of the high-speed high-precision current rudder digital-to-analog converter, the precision and the range of calibration can be expanded by changing the bit number and the full-scale output current of the calibration DAC module.
Drawings
FIG. 1 is a schematic diagram of the operation of the digital self-calibration system of the present invention;
FIG. 2 is a schematic diagram of a digital self-calibration system circuit according to the present invention;
FIG. 3 is a schematic diagram of a high-order reference current source and a current source array to be calibrated according to the present invention;
FIG. 4 is a schematic diagram of a calibration DAC module according to the present invention, taking a 6-bit 2+4 segmented structure as an example.
Detailed Description
The invention will be described in further detail with reference to the accompanying drawings and specific examples.
The modern high-speed high-precision digital-to-analog converter generally adopts an A+B+C segmented current rudder structure, wherein the high A bit and the middle B bit adopt thermometer decoding to respectively control a unit current source, and the low C bit adopts binary decoding to control a binary weighted current source; the high A bit is decoded to 2 by a thermometer A -1 bit, control 2 A -1 current weight of (2 B+C )I 0 In which the B bit is decoded to 2 by thermometer B -1 bit, control 2 B -1 current weight of (2 C )I 0 The low C bit adopts binary decoding to control binary weighted current source, and the total weight of the current is (2 C -1)I 0 The low C-bit current is split by a median current source according to binary weighting, I 0 For the minimum weighted current, it is called the digital to analog converter 1LSB current.
A self-calibration system of a high-speed high-precision current rudder digital-to-analog converter comprises a reference current source, a current source to be calibrated, a current comparator, a calibration control logic module, an error latch and a calibration DAC module, wherein the working principle diagram and the circuit structure schematic diagram of the digital self-calibration system are respectively shown in fig. 1 and fig. 2.
The reference current source provides a reference current for comparison, and all current sources to be calibrated are compared with the reference current source, and the output end of the reference current source is connected with the positive input end of the current comparator. The reference current source comprises a middle-position reference current source and a high-position reference current source, and the current comparator comprises a middle-position comparator and a high-position comparator; the input ends of the middle-position reference current source and the high-position reference current source are connected with the output end of the calibration control logic module, and the output ends are respectively connected with the positive input ends of the middle-position comparator and the high-position comparator; the middle-position reference current source and the high-position reference current source respectively receive corresponding reference current source gating signals.
The current source to be calibrated is the current source to be calibrated, and in the self-calibration method, all the middle-level current source and the high-level current source of the current steering digital-to-analog converter are calibrated, and the total includes n=2 A -1 high-order current source, m=2 B The middle-level current source is shown in FIG. 3, which is a schematic diagram of the middle-level reference current source, the high-level reference current source and the current source to be calibrated. The output end of the current comparator is connected with the negative input end of the current comparator. The current source to be calibrated comprises a middle-position current source to be calibrated and a high-position current source to be calibrated; the input ends of the middle-position current source to be calibrated and the high-position current source to be calibrated are both connected with the output end of the calibration control logic module, the output end of the middle-position current source to be calibrated is connected with the negative input ends of the middle comparator and the high-position comparator, and the output end of the high-position current source to be calibrated is connected with the negative input end of the high-position comparator; and the middle-position current source to be calibrated and the high-position current source to be calibrated respectively receive corresponding current source gating signals to be calibrated.
The current comparator is used for comparing the current values input by the positive input end and the negative input end, and outputting the comparison result from the output end of the comparator to the input end of the calibration control logic module. The current comparator comprises a middle-position current comparator and a high-position current comparator; the current comparator outputs a high level 1 if the positive input current is greater than the negative input current, and outputs a low level 0 if the positive input current is less than the negative input current.
The calibration control logic module is used for generating a calibration control signal by using an internal state machine under the driving of the received calibration clock; the calibration control signals comprise a reference current source gating signal for controlling the on-off of a reference current source, a comparator enabling signal for controlling the on-off of a comparator, a current source gating signal to be calibrated for controlling the on-off of a current source to be calibrated, a calibration DAC module gating signal for controlling the on-off of a calibration DAC module and a calibration code for controlling the output current of the calibration DAC module. The calibration control signals include reference current source gating signals ENP1, ENP2, comparator enable signal ENP3, current source gating signals to be calibrated S11< M:1>, S22< N:1>, calibration DAC gating signals S33< M:1>, S44< N:1>, SW1, SW2, SW3, SW4, SW5, calibration codes CAL < K:1>, INT < K:1>.
The input end of the error latch is connected with the output end of the calibration control logic module, and the output end of the error latch is connected with the input end of the calibration DAC module, is used for receiving and storing the calibration code and sends the calibration code to the calibration DAC module. The error latch is a K-bit register, which can be realized by a simple latch, and each calibration DAC is matched with one error latch.
The output end of the calibration DAC is connected with the current comparator and is used for receiving the calibration code, generating comparison error current according to the calibration code and compensating the comparison error current to the current source to be calibrated. The calibration DAC module comprises a reference calibration DAC module for compensating a reference current source, and a middle calibration DAC module and a high calibration DAC module for compensating a middle current source to be calibrated and a high current source to be calibrated respectively; the input ends of the reference calibration DAC module, the middle calibration DAC module and the high calibration DAC module are all connected with respective error latches; the output end of the reference calibration DAC module is connected with the positive input ends of the middle comparator and the high comparator, and the output ends of the middle calibration DAC module and the high calibration DAC module are respectively connected with the negative input ends of the middle comparator and the high comparator, and respectively receive the calibration DAC module gating signals and the calibration codes. Each reference current source and the current source to be calibrated are matched with a calibration DAC. The calibration DAC is a K-bit current steering DAC, and the calibration code CAL<K:1>Determining the output current of the power amplifier, wherein the calibration DAC adopts an i+j segmented current rudder structure, and i+j=K; typically, to ensure accuracy of calibration, the minimum weighting current of the calibration DAC is less than 1/3 of the minimum weighting current of the main DAC, in this method the minimum weighting current of the calibration DAC is set to 1/4 of the minimum weighting current of the main DAC, i.e. 1 ＝I 0 /4. Fig. 4 is a schematic diagram of a calibration DAC module according to the present invention, taking a 6-bit 2+4 segmented current steering structure as an example.
The high-speed high-precision current rudder digital-to-analog converter self-calibration method adopts a unidirectional calibration mode, namely, the current of a current source to be calibrated is set to be smaller than the current of a reference current source, the current source to be calibrated compensates the current through a calibration DAC, and the current value of the current source to be calibrated approximates to the current value of the reference current source by adopting a successive approximation comparison mode until the current values are approximately equal to each other, so that calibration is completed; the current of the reference current source is the target of DAC current source calibration, and when DAC current source design is performed, the current of the reference current source is set to be larger than the current of the current source to be calibrated, and the set value is usually half of the total output current of the calibration DAC. The self-calibration specific implementation method of the high-speed high-precision current rudder digital-to-analog converter comprises the following steps:
s1, performing median current source calibration: the calibration control logic module sends an enable ENP1 signal and an enable SW1 signal, the enable ENP1 signal gates a median reference current source, the enable SW1 signal gates a matched calibration DAC module, and the current of the median reference current source is I1<0>Current I1<0>The current weight of the current source to be calibrated is the same as that of the current source to be calibrated; meanwhile, the calibration control logic module sets the initial value of the calibration code of the calibration DAC module matched with the median reference current source as INT<K:i>= … 00, output a calibration initial value compensation current I INT Current I1 of the current neutral reference current source<0>Compensating current I with a calibration initial value INT Generating a median reference current I1 by addition<0>+I INT Calibrating the self current as the target of other current sources to be calibrated;
s2, after the middle position reference current is set, the calibration control logic module sends an enabling S11<1>Signal gating a median current source to be calibrated, transmit enable S33<1>The signal gates the matched median calibration DAC module, and simultaneously transmits an enable SW3 signal to connect the median current source to be calibrated and the matched median calibration DAC module to the negative input end of the median current comparator to be connected with the median reference current I1<0>+I INT Current comparison is performed to generate a median calibration code CAL1<K:i>The method comprises the steps of carrying out a first treatment on the surface of the Median calibration code CAL1<K:i>Latching in a matched error latch, and forwarding to a corresponding median calibration DAC module to control the median calibration DAC module to output a median calibration error compensation current I 1A <1>The method comprises the steps of carrying out a first treatment on the surface of the Output current I1 of the neutral current source to be calibrated<1>Median calibration error compensation current I output by matched median calibration DAC module 1A <1>Generating an output current I1 by adding<1>+I 1A <1>Completing the calibration of a current source to be calibrated in the middle position;
s3, repeating the step S2, and completing the calibration of all the current sources to be calibrated in the middle position;
s4, performing high-order current source calibration: the calibration control logic module outputs the enable S11 at the same time<M:1>Signal gating all median current sources to be calibrated and enabling S33<M:1>Signal gating all the calibration DAC modules matched with the median current sources to be calibrated, and outputting an enable SW4 signal to enable the output currents I of all the calibrated median current sources 1A <1>+I1<1>+I 1A <2>+I1<2>+…+I 1A <M>+I1<M>The negative input end of the high-order current comparator is connected through addition; meanwhile, the calibration control logic module sends an enable ENP2 signal and an enable SW2 signal, the enable ENP2 signal gates a high-order reference current source, the enable SW2 signal gates a matched calibration DAC module of the enable ENP2 signal to be connected to the positive input end of the high-order current comparator for comparison, and high-order reference compensation current is generated to be I S Output current I2 of high-order reference current source<0>High-order reference compensation current I output by DAC module matched with high-order reference compensation current I S Generating high-order reference currents I2 by addition<0>+I S Completing the setting of high-order reference current;
s5, after completing the high-order reference current setting, the calibration control logic module sends an enabling S22<1>Signal gates a high-order current source to be calibrated and sends an enable S44<1>The signal gates the matched calibration DAC module, and simultaneously sends an enable SW5 signal to connect the high-order current source to be calibrated and the matched calibration DAC module thereof to the negative input end of the high-order comparator, and the high-order current source and the matched calibration DAC module are subjected to current comparison with the high-order reference current to generate a high-order calibration code CAL2<K:i>The method comprises the steps of carrying out a first treatment on the surface of the Will high order calibration code CAL2<K:i>Latching in a matched error latch, and forwarding to a corresponding high-order calibration DAC module to control the high-order calibration DAC module to output high-order calibration error compensation current I 2A <1>The method comprises the steps of carrying out a first treatment on the surface of the High-order to be calibratedOutput current I2 of the current source<1>High-order calibration error compensation current I output by DAC module matched with high-order calibration error compensation current I 2A <1>Generating an output current I2 by summing<1>+I 2A <1>Completing the calibration of a high-order current source to be calibrated;
s6, repeating the step S5, and completing the calibration of all high-order current sources to be calibrated.
A self-calibration method of a high-speed high-precision current rudder digital-to-analog converter adopts a successive approximation method in current comparison, and a calibration code changes from high order to low order bit by bit, so that the output current of a calibration DAC is changed; the initial value of the calibration code is all 0, the highest bit of the calibration code becomes 1 when starting calibration, whether the current calibration bit is 1 is determined according to the output result of the current comparator, if the output result of the current comparator is high level 1, the current calibration bit is 1, otherwise, the current calibration bit is 0; and then the above processes are repeated in sequence from the next highest bit to the lowest bit until the K-bit calibration code is completely determined, and the comparison is stopped.
The foregoing is merely illustrative of the best embodiments of the present invention, and the present invention is not limited thereto, but any changes or substitutions easily contemplated by those skilled in the art within the scope of the present invention should be construed as falling within the scope of the present invention.
What is not described in detail in the present specification is a well known technology to those skilled in the art.
Claims (5)
1. A self-calibration system of a high-speed high-precision current rudder digital-to-analog converter is characterized in that: the device comprises a reference current source, a current source to be calibrated, a current comparator, a calibration control logic module, an error latch and a calibration DAC module;
the reference current source is used for providing reference current for comparison, and the output end of the reference current source is connected with the positive input end of the current comparator;
the output end of the current source to be calibrated is connected with the negative input end of the current comparator;
the current comparator is used for comparing the current values input by the positive input end and the negative input end and outputting the comparison result from the output end of the comparator to the input end of the calibration control logic module;
the calibration control logic module is used for generating a calibration control signal by using an internal state machine under the driving of the received calibration clock; the calibration control signals comprise a reference current source gating signal for controlling the on-off of a reference current source, a comparator enabling signal for controlling the on-off of a comparator, a current source gating signal to be calibrated for controlling the on-off of a current source to be calibrated, a calibration DAC module gating signal for controlling the on-off of a calibration DAC module and a calibration code for controlling the output current of the calibration DAC module;
the input end of the error latch is connected with the output end of the calibration control logic module, and the output end of the error latch is connected with the input end of the calibration DAC module, is used for receiving and storing the calibration code and sends the calibration code to the calibration DAC module;
the output end of the calibration DAC module is connected with the current comparator and is used for receiving the calibration code, generating comparison error current according to the calibration code and compensating the comparison error current to the current source to be calibrated;
the self-calibration method for realizing the high-speed high-precision current rudder digital-to-analog converter by using the system comprises the following steps:
s1, performing median current source calibration: the calibration control logic module sends an enable ENP1 signal and an enable SW1 signal, the enable ENP1 signal gates a median reference current source, the enable SW1 signal gates a matched calibration DAC module, and the current of the median reference current source is I1<0>Current I1<0>The current weight of the current source to be calibrated is the same as that of the current source to be calibrated; meanwhile, the calibration control logic module sets the initial value of the calibration code of the calibration DAC module matched with the median reference current source as INT<K:i>= … 00, output a calibration initial value compensation current I INT Current I1 of the current neutral reference current source<0>Compensating current I with a calibration initial value INT Generating a median reference current I1 by addition<0>+I INT Calibrating the self current as the target of other current sources to be calibrated; i is a number;
s2, after the middle position reference current is set, the calibration control logic module sends an enabling S11<1>Signal gating a median current source to be calibrated, transmit enable S33<1>Signal signalGating the matched median calibration DAC module, simultaneously transmitting an enable SW3 signal to enable the median current source to be calibrated and the matched median calibration DAC module to be connected to the negative input end of the median current comparator and the median reference current I1<0>+I INT Current comparison is performed to generate a median calibration code CAL1<K:i>The method comprises the steps of carrying out a first treatment on the surface of the Median calibration code CAL1<K:i>Latching in a matched error latch, and forwarding to a corresponding median calibration DAC module to control the median calibration DAC module to output a median calibration error compensation current I 1A <1>The method comprises the steps of carrying out a first treatment on the surface of the Output current I1 of the neutral current source to be calibrated<1>Median calibration error compensation current I output by matched median calibration DAC module 1A <1>Generating an output current I1 by adding<1>+I 1A <1>Completing the calibration of a current source to be calibrated in the middle position;
s3, repeating the step S2, and completing the calibration of all the current sources to be calibrated in the middle position;
s4, performing high-order current source calibration: the calibration control logic module outputs the enable S11 at the same time<M:1>Signal gating all median current sources to be calibrated and enabling S33<M:1>Signal gating all the calibration DAC modules matched with the median current sources to be calibrated, and outputting an enable SW4 signal to enable the output currents I of all the calibrated median current sources 1A <1>+I1<1>+I 1A <2>+I1<2>+…+I 1A <M>+I1<M>The negative input end of the high-order current comparator is connected through addition; meanwhile, the calibration control logic module sends an enable ENP2 signal and an enable SW2 signal, the enable ENP2 signal gates a high-order reference current source, the enable SW2 signal gates a matched calibration DAC module of the enable ENP2 signal to be connected to the positive input end of the high-order current comparator for comparison, and high-order reference compensation current is generated to be I S Output current I2 of high-order reference current source<0>High-order reference compensation current I output by DAC module matched with high-order reference compensation current I S Generating high-order reference currents I2 by addition<0>+I S Calibrating the target of the self current as other high-order current sources to be calibrated;
s5, after completing the high-order reference current setting, the calibration control logic module sends an enabling S22<1>Signal gating a high-order standbyCalibrate the current source and send enable S44<1>The signal gates the matched calibration DAC module, and simultaneously sends an enable SW5 signal to connect the high-order current source to be calibrated and the matched calibration DAC module thereof to the negative input end of the high-order comparator, and the high-order current source and the matched calibration DAC module are subjected to current comparison with the high-order reference current to generate a high-order calibration code CAL2<K:i>The method comprises the steps of carrying out a first treatment on the surface of the Will high order calibration code CAL2<K:i>Latching in a matched error latch, and forwarding to a corresponding high-order calibration DAC module to control the high-order calibration DAC module to output high-order calibration error compensation current I 2A <1>The method comprises the steps of carrying out a first treatment on the surface of the Output current I2 of high-order current source to be calibrated<1>High-order calibration error compensation current I output by DAC module matched with high-order calibration error compensation current I 2A <1>Generating an output current I2 by summing<1>+I 2A <1>Completing the calibration of a high-order current source to be calibrated;
s6, repeating the step S5, and completing the calibration of all high-order current sources to be calibrated.
2. The high-speed high-precision current steering digital-to-analog converter self-calibration system of claim 1, wherein: the reference current source comprises a middle-position reference current source and a high-position reference current source, and the current comparator comprises a middle-position comparator and a high-position comparator; the input ends of the middle-position reference current source and the high-position reference current source are connected with the output end of the calibration control logic module, and the output ends are respectively connected with the positive input ends of the middle-position comparator and the high-position comparator; the middle-position reference current source and the high-position reference current source respectively receive corresponding reference current source gating signals.
3. The high-speed high-precision current steering digital-to-analog converter self-calibration system of claim 2, wherein: the current source to be calibrated comprises a middle-position current source to be calibrated and a high-position current source to be calibrated; the input ends of the middle-position current source to be calibrated and the high-position current source to be calibrated are both connected with the output end of the calibration control logic module, the output end of the middle-position current source to be calibrated is connected with the negative input ends of the middle comparator and the high-position comparator, and the output end of the high-position current source to be calibrated is connected with the negative input end of the high-position comparator; and the middle-position current source to be calibrated and the high-position current source to be calibrated respectively receive corresponding current source gating signals to be calibrated.
4. The high-speed high-precision current steering digital-to-analog converter self-calibration system of claim 2, wherein: the calibration DAC module comprises a reference calibration DAC module for compensating a reference current source, and a middle calibration DAC module and a high calibration DAC module for compensating a middle current source to be calibrated and a high current source to be calibrated respectively; the input ends of the reference calibration DAC module, the middle calibration DAC module and the high calibration DAC module are all connected with respective error latches; the output end of the reference calibration DAC module is connected with the positive input ends of the middle comparator and the high comparator, and the output ends of the middle calibration DAC module and the high calibration DAC module are respectively connected with the negative input ends of the middle comparator and the high comparator, and respectively receive the calibration DAC module gating signals and the calibration codes.
5. The high-speed high-precision current steering digital-to-analog converter self-calibration system of claim 1, wherein the method of current comparison with the mid-or high-level reference current is: successive approximation method.
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