CN114006631A - Cable testing device and method based on code pattern signal verification - Google Patents
Cable testing device and method based on code pattern signal verification Download PDFInfo
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Abstract
The invention provides a cable testing device based on code pattern signal verification, which is connected through a cable to be tested and used for testing the high-speed signal quality of the cable to be tested, wherein a first control module sends a second code pattern signal through a first cable interface and carries out quality testing according to the second code pattern signal sent by a code pattern signal receiving module; or the second control module sends the first code type signal through the second cable interface and carries out quality test according to the first code type signal sent by the code type signal receiving module; the programmable logic controller controls the first control module to send the first code type signal or controls the second control module to send the second code type signal through the communication with the code type signal selection module.
Description
Technical Field
The invention relates to the field of cable testing, in particular to a cable testing device and method based on code pattern signal verification.
Background
The storage server has a complicated hardware structure, and for better connection of the circuit, a SAS line (serial attached SCSI, Small Computer System Interface) Interface such as a tank chain or a miniSAS line is often used for connection of a high-speed link in the development process.
Currently, in the industry, to verify the quality of high-speed signals of SAS cables, four patterns are generally tested: CJTPAT code (physical layer), D10.2 code (Full Clock Rate), D24.3 code (half Clock Rate), and D30.3 code (low Clock Rate). Verification of SATA (Serial Advanced technology attachment, a hard disk interface communication protocol) high-speed signal quality test four patterns: LBP (line-bitpeak, single bit pattern), D10.2(Full Clock Rate), D24.3(half Clock Rate), D30.3 pattern. In the process of building a storage environment, in order to adapt to a high-capacity storage environment, a storage server is mostly adopted as a machine head in a general storage building environment, and an external SAS cable is generally connected to JBOF (Just a BunchOfFlash, which means a storage type device with a plurality of flash memory type solid state disks installed in a case) as an expansion cabinet aiming at an SAS/SATA link. Due to field environmental factors, the lengths of the cables are different, and the lengths of the cables are different, such as 0.5m, 1m, 2m, 3m and even 5 m.
In the prior art, for testing cables, a network analyzer is generally used for testing insertion loss and return loss of the cables, or an impedance tester is used for detecting impedance distribution of the cables, and although this testing method can realize the test of high-speed signal integrity through simulation, different code pattern verifications cannot be visually performed according to the high-speed signal protocol requirements of SAS/SATA, and the compatible test of the code pattern verification and the high-speed signal quality in the cables cannot be realized.
Disclosure of Invention
The invention provides a cable testing device and method based on code pattern signal verification in order to solve the problems in the prior art, effectively solves the problem of compatibility test of code pattern verification and high-speed signal quality in cables in cable testing caused by the prior art, realizes the compatibility test of code pattern verification and the high-speed signal quality in the cables, and effectively improves the cable testing efficiency.
The invention provides a cable testing device based on code pattern signal verification, which is connected with a cable to be tested and used for testing the high-speed signal quality of the cable to be tested, and comprises the following components: the code type signal receiving module is respectively connected with the first cable interface and the second cable interface and is used for receiving a corresponding first code type signal sent by the second control module through the first cable interface, or receiving a corresponding second code type signal sent by the first control module through the second cable interface and sending the received first code type signal to the corresponding second control module, or sending the received second code type signal to the corresponding first control module; the first control module is in communication connection with the first cable interface, sends a corresponding second code type signal through the first cable interface, and performs quality test on the second code type signal according to the received second code type signal; the second control module is in communication connection with the second cable interface, sends a corresponding first code type signal through the second cable interface, and performs quality test on the first code type signal according to the received corresponding first code type signal; the programmable logic controller is respectively in communication connection with the first control module, the second control module and the code pattern signal selection module, and controls the first control module to send a corresponding second code pattern signal or controls the second control module to send a corresponding first code pattern signal through the communication with the code pattern signal selection module.
Optionally, the programmable logic device is further in communication connection with the first cable interface and the second cable interface, respectively, and is configured to determine whether the connection of the cable to be tested is normal through the communication connection with the first cable interface and the second cable interface.
Further, when the cable to be tested is connected normally, the level of a first GPIO pin in the first cable interface that is in communication connection with the programmable logic device is a low level, and the level of a second GPIO pin in the second cable interface that is in communication connection with the programmable logic device is a low level.
Optionally, the code type signal selection module is an upper computer or a dial switch, and the upper computer or the dial switch selects the first control module to send the second code type signal or the second control module to send the first code type signal through communicating with the programmable logic controller.
Furthermore, when the upper computer fails, the dial switch is communicated with the programmable logic controller, and the first control module is selected to send a corresponding second code type signal or the second control module is selected to send a corresponding first code type signal.
Optionally, the test device further comprises a display module, wherein the display module is in communication connection with the programmable logic device and is used for displaying the type of the first code type signal or the second code type signal corresponding to the current test.
The second aspect of the present invention provides a cable testing method based on code pattern signal verification, which is implemented based on the cable testing device based on code pattern signal verification in the first aspect of the present invention, and is used for testing the high-speed signal quality of a cable to be tested, and the method includes:
the programmable logic controller acquires a selection signal of the code pattern signal selection module, and controls the first control module to sequentially send corresponding second code pattern signals or controls the second control module to sequentially send corresponding first code pattern signals according to the selection signal of the code pattern signal selection module;
the code pattern signal receiving module sequentially receives corresponding first code pattern signals sent by the second control module through the first cable interface and sequentially sends the received first code pattern signals to the second control module, or sequentially receives corresponding second code pattern signals sent by the first control module through the second cable interface and sequentially sends the received second code pattern signals to the first control module;
the first control module outputs a high-speed signal quality test result of the second code type signal according to the second code type signal received in sequence, or the second control module outputs a high-speed signal quality test result of the first code type signal according to the first code type signal received in sequence.
Optionally, before the programmable logic controller obtains the selection signal of the pattern signal selection module, the method further includes:
the first cable interface and the second cable interface are in communication connection through the cable to be tested, and whether the connection of the cable to be tested is normal or not is judged; if not, the connection condition of the cable to be tested is rechecked.
Further, the specific step of judging whether the connection of the cable to be tested is normal is as follows: if the level of a first GPIO pin in the first cable interface and in communication connection with the programmable logic device and the level of a second GPIO pin in the second cable interface and in communication connection with the programmable logic device are both low levels, the connection of the cable to be tested is normal; and if the level of a first GPIO pin in the first cable interface and in communication connection with the programmable logic device and the level of a second GPIO pin in the second cable interface and in communication connection with the programmable logic device are not both low levels, the cable to be tested is not normally connected.
Optionally, the method further comprises:
if all second code type signals of the types to be detected of the first control module or all first code type signals of the types to be detected of the second control module are sent in sequence, the programmable logic controller acquires a selection switching signal of the code type signal selection module, and the second control module is switched to send the first code type signals in sequence or the first control module sends the second code type signals in sequence; and sending the second code type signals of all types to be tested of the first control module and the first code type signals of all types to be tested of the second control module in sequence.
The technical scheme adopted by the invention comprises the following technical effects:
1. the method effectively solves the problem of compatible test of code pattern verification and high-speed signal quality in the cable test in the prior art, realizes the compatible test of the code pattern verification and the high-speed signal quality in the cable, and effectively improves the cable test efficiency; and simultaneously realizes the test of the signal bidirectional transmission (namely sending and receiving) of the cable to be tested.
2. According to the technical scheme, the integrity of the SAS/SATA high-speed signal can be simply and effectively verified, and the problem that the signal quality of a cable cannot be directly and effectively verified in different code types due to the fact that the signal quality of the cable is verified only by means of a loss analyzer in the prior art is solved.
3. According to the technical scheme, the programmable logic device judges whether the connection of the cable to be tested is normal or not through the communication connection with the first cable interface and the second cable interface, so that the reliability and the accuracy of the quality verification test of different types of code type signals of the cable are guaranteed.
4. According to the technical scheme, when the upper computer fails, the dial switch is communicated with the programmable logic controller, the first control module is selected to send the corresponding second code type signal or the second control module is selected to send the corresponding first code type signal, the reliability of quality verification tests of different types of code type signals under the first code type signal or the second code type signal of the cable is further improved, and the condition that the code type signals cannot be adjusted due to the failure of the upper computer is avoided.
5. The technical scheme of the invention also comprises a display module which is used for displaying the type of the first code type signal or the type of the second code type signal corresponding to the current test, so that a tester can know the condition of the code type signal corresponding to the current test in time.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.
Drawings
In order to more clearly illustrate the embodiments or technical solutions in the prior art of the present invention, the drawings used in the description of the embodiments or prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained based on these drawings without any creative effort.
FIG. 1 is a schematic diagram of an apparatus according to an embodiment of the present invention;
FIG. 2 is a schematic flow diagram of a second method embodiment of the present invention;
FIG. 3 is a flow chart of a second method according to an embodiment of the present invention;
FIG. 4 is a schematic flow diagram (III) of the method of example two in an embodiment of the invention;
fig. 5 is a flow chart of the method of example two in the embodiment of the present invention (iv).
Detailed Description
In order to clearly explain the technical features of the present invention, the following detailed description of the present invention is provided with reference to the accompanying drawings. The following disclosure provides many different embodiments, or examples, for implementing different features of the invention. To simplify the disclosure of the present invention, the components and arrangements of specific examples are described below. Furthermore, the present invention may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. It should be noted that the components illustrated in the figures are not necessarily drawn to scale. Descriptions of well-known components and processing techniques and procedures are omitted so as to not unnecessarily limit the invention.
Example one
As shown in fig. 1, the present invention provides a cable testing apparatus based on code pattern signal verification, which is connected through a cable to be tested, and is used for testing the high-speed signal quality of the cable to be tested, and the apparatus includes: the programmable logic controller comprises a programmable logic controller 1, a first control module 21, a second control module 22, a first cable interface 31, a second cable interface 32, a code type signal selection module 4 and a code type signal receiving module 5, wherein the code type signal receiving module 5 is respectively connected with code type signal receiving ends of the first cable interface 31 and the second cable interface 32 and is used for receiving a corresponding first code type signal sent by the second control module 22 through the first cable interface 31 or receiving a corresponding second code type signal sent by the first control module 21 through the second cable interface 32 and sending the received first code type signal to the corresponding second control module 22 or sending the received second code type signal to the corresponding first control module 21; the first control module 21 is in communication connection with the first cable interface 31, sends a corresponding second code type signal through the first cable interface 31, and performs a quality test on the second code type signal according to the received second code type signal; the second control module 22 is in communication connection with the second cable interface 32, sends a corresponding first code pattern signal through the second cable interface 32, and performs a quality test on the first code pattern signal according to the received corresponding first code pattern signal; the programmable logic controller 1 is respectively in communication connection with the first control module 21, the second control module communication 22 and the code pattern signal selection module 4, and controls the first control module 21 to send a corresponding second code pattern signal or controls the second control module 22 to send a corresponding first code pattern signal through communication with the code pattern signal selection module 4.
Further, when the cable to be tested is connected normally, the programmable logic device 1 is also connected with the first cable interface 31 and the second cable interface 32 in a communication manner, and is configured to determine whether the cable to be tested is connected normally through the communication connection with the first cable interface 31 and the second cable interface 32. The first cable interface 31 and the second cable interface 32 may be SAS high-speed signal cable interfaces,
specifically, the level of the first GPIO pin communicatively connected to the programmable logic device 1 in the first cable interface 31 is low, and the level of the second GPIO pin communicatively connected to the programmable logic device 1 in the second cable interface 32 is low. Specifically, the level of a first GPIO pin in the first cable interface 31, which is in communication connection with the programmable logic device 1, is a low level, and the level of a third GPIO pin (located in the programmable logic device 1) connected to the first GPIO pin of the first cable interface 31 may be detected by the programmable logic device 1; the level of the second GPIO pin in the second cable interface 32 that is communicatively connected to the programmable logic device 1 is low, and the level of a fourth GPIO pin (located in the programmable logic device 1) that is connected to the second GPIO pin of the second cable interface 32 may be detected by the programmable logic device 1. The first GPIO pin and the third GPIO pin form a first GPIO channel, and the second GPIO pin and the fourth GPIO pin form a second GPIO channel.
The first control module 21 and the second control module 22 may be implemented by controllers, and the type of the controller may be PM8055, or may be other types of controllers, which is not limited herein. The programmable logic controller 1 controls the first control module 21 and the second control module 22 to be powered on respectively, wherein a TX signal (code type signal transmitting end) of the first control module 21 is connected to a TX signal (code type signal transmitting end) of the first cable interface 31, a TX signal (code type signal transmitting end) of the second control module 22 is connected to a TX signal (code type signal transmitting end) of the second cable interface 32, and an RX signal (code type signal receiving end) of the first cable interface 31 and an RX signal (code type signal receiving end) of the second cable interface 32 are led out by SMA heads and connected to the code type signal receiving module 5.
The first control module 21 and the second control module 22 are in communication connection with the programmable logic controller 1 through a serial UART (Universal Asynchronous Receiver/Transmitter) bus, respectively, and the programmable logic controller 1 is connected with the code pattern signal receiving module 5 through the serial UART bus for switching the first control module 21 or the second control module 22 to send out a corresponding test code pattern.
The code pattern signal receiving module 5 may be a high-speed oscilloscope, and by receiving the second code pattern signal sent by the first control module 21 or the first code pattern signal sent by the second control module 22, and sending the received second code pattern signal to the first control module 21, or sending the received first code pattern signal to the second control module 22, the high-speed signal quality test corresponding to different code patterns transmitted by the cable to be tested is realized. Specifically, when the code pattern signal receiving module 5 receives a corresponding second code pattern signal sent by the first control module 21 through the second cable interface 32, and sends the received second code pattern signal to the corresponding first control module 21; when the code pattern signal receiving module 5 receives the first code pattern signal sent by the second control module 22 through the first cable interface 32, the received first code pattern signal is sent to the corresponding second control module 22, so as to implement a high-speed signal quality test.
The first control module 21 or the second control module 22 is provided with a dedicated control software chiplink (chip connection control software) for sending the control code pattern, the SMA joint of the high-speed oscilloscope is connected to the SMA test point signal channel (differential signal) of the first cable interface 31 or the second cable interface 32, and the control software chiplink in the first control module 21 or the second control module 22 is used for verifying the quality of the SAS high-speed signal.
Specifically, when the quality of the SAS high-speed signal is verified, the first pattern signal and the second pattern signal in the technical solution of the present invention are equally divided into four test patterns: CJTPAT, D10.2, D24.3 and D30.3. When the SATA high-speed signal quality test is verified, the first code type signal and the second code type signal are equally divided into four test code types: LBP, D10.2, D24.3, D30.3. That is, the first pattern signal and the second pattern signal are different only in the transmission subject (the first control module 21 or the second control module 22) and are the same in the type of the pattern signal. Specifically, the first pattern signal refers to a generic term of different test pattern type signals sent by the second control module 22, and the second pattern signal refers to a generic term of different test pattern type signals sent by the first control module 21. In the testing of signals of the same protocol (for example, SAS or SATA), the type of pattern testing of the first pattern signal is the same as that of the second pattern signal. The signal quality of the cable is verified through the quality test of different test code type signals under the first code type signal and the quality test of different test code type signals under the second code type signal, and the cable is more visual and reliable.
In this embodiment, the signal quality test mainly refers to a test of high-speed signal integrity (for example, a ratio of the number of received signal data to the number of sent signal data under different types of code signals), and the high-speed oscilloscope may analyze the quality of different types of code signals (signal integrity) under different code signals or different types of code signals (signal integrity) under a second code under a first code signal or a second code signal transmitted by a cable to be tested, or may perform a signal loss test or the like, so as to implement a high-speed signal quality test corresponding to different code signals or different code types under the first code signal or the second code signal transmitted by the cable to be tested.
The Programmable logic controller 1 may be a CPLD (Complex Programmable logic device) or other Programmable logic devices, and the present invention is not limited herein.
The code type signal selection module 4 is an upper computer 41 or a dial switch 42, and both the upper computer 41 and the dial switch 42 select the first control module 21 to send the second code type signal or the second control module 22 to send the first code type signal through communicating with the programmable logic controller 1. The upper computer 41 may be a PC (personal computer) host, or may be other host devices, such as a server, and the invention is not limited herein.
Further, when the upper computer 41 fails, the dial switch 42 communicates with the programmable logic controller 1 to select the first control module 21 to send the second code type signal or the second control module 22 to send the first code type signal.
The dial switch 42 can be used for controlling the programmable logic controller 1 to select and control the code pattern when the programmable logic controller is separated from the upper computer 41, so that research personnel can conveniently test and operate high-speed signals.
The control of the change of the adjustment pattern by the dial switch 42 (different types of test patterns under the first pattern signal or different types of test patterns under the second pattern signal) is specifically: firstly, the dial switch 42 is adjusted to 1 bit, and the code value A, the code value B, the code value C, the code value D and the code value E are defined as shown in the following table, wherein the code value A is 1, which indicates that the programmable logic device 1 receives the code type signal selection control signal of the dial switch 42, and the code value A is 0, which indicates that the programmable logic device 1 receives the code type signal selection control signal of the upper computer 41; the code value B is used to confirm that the programmable logic controller 1 interacts with the first control module 21 or the second control module 22, that is, to confirm that the first code type signal or the second code type signal is sent, and the code value C, the code value D, and the code value E are used to confirm the code type, that is, different types of test code types under the first code type signal or different types of test code types under the second code type signal.
The GPIO pin of the programmable logic controller 1 reads the value of the dial switch 42, and when the encoded value ABCDE is 1XXXX (X represents 0 or 1), the control mode of sending the pattern is changed to the setting pattern of the dial switch 42 through the serial communication of the upper computer 41, and at this time, the programmable logic controller 1 cuts off the UART serial communication and controls the first control module 21 to send the second pattern signal through the IIC instruction.
When the code value ABCDE is 11XXX (X represents 0 or 1), it indicates that the programmable logic controller 1 controls the first control module 21 to transmit the second pattern signal through the IIC command, and when the code value ABCDE is 10XXX (X represents 0 or 1), it indicates that the programmable logic controller 1 controls the second control module 22 to transmit the first pattern signal through the IIC command.
And, specifically to which pattern, it may be combined by the dip switch C, D, E to confirm which type of test pattern was sent under the first pattern signal, depending on whether SAS signal integrity/SATA signal integrity was tested. If the setting of the code pattern does not meet any defined value in the table, the EEEE font can be directly displayed through the display module 6, and the setting of the code pattern is wrong and needs to be reset.
Preferably, the cable testing device based on code pattern signal verification provided by the invention further comprises a display module 6, wherein the display module 6 is in communication connection with the programmable logic device 1 and is used for displaying the type of the code pattern signal corresponding to the current test. I.e., the first pattern signal or the second pattern signal, and if the first pattern signal is the first pattern signal, it is specifically which type of test pattern under the first pattern signal or which type of test pattern under the second pattern signal. The selection of the code pattern corresponding to the current test can be directly displayed by the display module 6 (for example, a nixie tube).
The method effectively solves the problem of compatible test of code pattern verification and high-speed signal quality in the cable test in the prior art, realizes the compatible test of the code pattern verification and the high-speed signal quality in the cable, and effectively improves the cable test efficiency; and simultaneously realizes the test of the signal bidirectional transmission (namely sending and receiving) of the cable to be tested.
According to the technical scheme, the integrity of the SAS/SATA high-speed signal can be simply and effectively verified, and the problem that the signal quality of a cable cannot be directly and effectively verified in different code types due to the fact that the signal quality of the cable is verified only by means of a loss analyzer in the prior art is solved.
According to the technical scheme, the programmable logic device judges whether the connection of the cable to be tested is normal or not through the communication connection with the first cable interface and the second cable interface, so that the reliability and the accuracy of the quality verification test of different types of code type signals of the cable are guaranteed.
According to the technical scheme, when the upper computer fails, the dial switch is communicated with the programmable logic controller, the first control module is selected to send the corresponding second code type signal or the second control module is selected to send the corresponding first code type signal, the reliability of quality verification tests of different types of code type signals under the first code type signal or the second code type signal of the cable is further improved, and the condition that the code type signals cannot be adjusted due to the failure of the upper computer is avoided.
The technical scheme of the invention also comprises a display module which is used for displaying the type of the first code type signal or the type of the second code type signal corresponding to the current test, so that a tester can know the condition of the code type signal corresponding to the current test in time.
Example two
As shown in fig. 2, the technical solution of the present invention further provides a cable testing method based on code pattern signal verification, which is implemented based on the cable testing device based on code pattern signal verification in the first embodiment, and is used for testing the high-speed signal quality of a cable to be tested, including:
s1, the programmable logic controller obtains the selection signal of the code pattern signal selection module, and controls the first control module to sequentially send the corresponding second code pattern signals or controls the second control module to sequentially send the corresponding first code pattern signals according to the selection signal of the code pattern signal selection module;
s2, the code pattern signal receiving module sequentially receives the corresponding second code pattern signals sent by the first control module through the second cable interface and sequentially sends the received second code pattern signals to the first control module; or, sequentially receiving the corresponding first code type signals sent by the second control module through the first cable interface, and sequentially sending the received first code type signals to the second control module;
and S3, the first control module outputs the high-speed signal quality test result of the second code type signal according to the second code type signal received in sequence, or the second control module outputs the high-speed signal quality test result of the first code type signal according to the first code type signal received in sequence.
In step S1, the programmable logic controller controls the first control module and the second control module to be powered on, and the programmable logic controller communicates with the code pattern signal receiving module through the serial UART bus to switch the first control module to sequentially send the second code pattern signal or the second control module to sequentially send the first code pattern signal (the code pattern signal to be detected).
In step S2, high-speed signal quality tests corresponding to different code patterns transmitted by the cable to be tested are implemented by receiving the second code pattern signal sent by the first control module or the first code pattern signal sent by the second control module, and sending the received second code pattern signal to the first control module, or sending the received first code pattern signal to the second control module. Specifically, when the code pattern signal receiving module receives a second code pattern signal sent by the first control module through the second cable interface, the second code pattern signal receiving module sends the received second code pattern signal to the corresponding first control module; when the code pattern signal receiving module receives a corresponding first code pattern signal sent by the second control module through the first cable interface, the received first code pattern signal is sent to the corresponding second control module, and therefore high-speed signal quality testing is achieved.
In step S3, the first control module or the second control module is provided with a dedicated control software chiplink (chip connection control software) for sending control code patterns, the SMA joint of the high-speed oscilloscope is connected to the SMA test point signal channel (differential signal) of the first cable interface or the second cable interface, and the control software chiplink in the first control module is used to verify the quality of SAS (or SATA) high-speed signals for the second code type signals received in sequence, or the control software chiplink in the second control module is used to verify the quality of SAS (or SATA) high-speed signals for the first code type signals received in sequence.
Further, as shown in fig. 3, the technical solution of the present invention further provides a cable testing method based on pattern signal verification, that is, before step S1, the method further includes:
s0, the first cable interface and the second cable interface are in communication connection through the cable to be tested, and whether the connection of the cable to be tested is normal or not is judged; if not, the connection condition of the cable to be tested is rechecked.
In step S0, the specific step of determining whether the connection of the cable to be tested is normal is: if the level of a first GPIO pin in the first cable interface and in communication connection with the programmable logic device and the level of a second GPIO pin in the second cable interface and in communication connection with the programmable logic device are both low levels, the connection of the cable to be tested is normal; and if the level of a first GPIO pin in the first cable interface and in communication connection with the programmable logic device and the level of a second GPIO pin in the second cable interface and in communication connection with the programmable logic device are not both low levels, the cable to be tested is not normally connected.
Further, as shown in fig. 4, the technical solution of the present invention further provides a cable testing method based on code pattern signal verification, further comprising:
s4, judging whether the second code type signals of all types to be detected of the first control module or the first code type signals of all types to be detected of the second control module are sent in sequence, if so, executing the step S5; if the judgment result is no, executing step S6;
s5, the programmable logic controller informs the code pattern selection module to switch the selection signal, and switches and controls the second control module to sequentially send the first code pattern signal or the first control module to sequentially send the second code pattern signal according to the switched selection signal;
s6, the programmable logic controller controls the first control module to continue to send the different test type code patterns under the second code type signal in sequence, or controls the second control module to continue to send the different test type code patterns under the first code type signal in sequence, and returns to the step S4;
and S7, completing the sending of the second code type signals of all types to be tested of the first control module and the first code type signals of all types to be tested of the second control module in sequence.
In steps S4-S7, when the plc controls the first control module to complete sending all the signals of the type to be tested, the plc switches to the second control module to send all the signals of the type to be tested. Or when the first control module finishes the sending of the first type code type signal, the first control module is switched to the second control module to send the second type code type signal; and so on; or, other transmission control sequences may be set by self-definition according to actual situations, and the present invention is not limited herein.
Four patterns were tested: CJTPAT, D10.2, D24.3 and D30.3. Verifying the SATA high-speed signal quality test by four code patterns: LBP, D10.2, D24.3, D30.3. The signal quality of the cable is verified through the control of the code pattern, and the method is more visual and reliable.
In this embodiment, the signal quality test mainly refers to a test of integrity of a high-speed signal, and the high-speed oscilloscope may analyze the quality of the received high-speed signal corresponding to different code patterns transmitted by the cable to be tested, or may perform a signal loss test, and the like, so as to implement the high-speed signal quality test corresponding to different code patterns transmitted by the cable to be tested.
The code type signal selection module is an upper computer or a dial switch, and the upper computer or the dial switch selects the first control module to send the second code type signal or the second control module to send the first code type signal through communicating with the programmable logic controller.
Furthermore, when the upper computer is in fault, the dial switch is communicated with the programmable logic controller, and the first control module is selected to send the second code type signal or the second control module is selected to send the first code type signal.
The dial switch can be used for controlling the programmable logic controller to select and control the code pattern when the programmable logic controller is separated from (cannot be in communication connection with) an upper computer, and is convenient for research personnel to perform high-speed signal test operation.
The GPIO pin of the programmable logic controller reads the numerical value of the dial switch, when the code value ABCDE is 1XXXX (X represents 0 or 1), the control mode of sending the code pattern is changed into the setting code pattern of the dial switch through the serial port communication of an upper computer, at the moment, the programmable logic controller can cut off the UART serial port communication, and the first control module is controlled to send a second code pattern signal through an IIC instruction.
When the code value ABCDE is equal to 11XXX (X represents 0 or 1), the programmable logic controller controls the first control module to transmit the second code pattern signal through the IIC command, and when the code value ABCDE is equal to 10XXX (X represents 0 or 1), the programmable logic controller controls the second control module to transmit the first code pattern signal through the IIC command.
And, specifically to which pattern, it may be combined by the dip switch C, D, E to confirm which type of test pattern was sent under the first pattern signal, depending on whether SAS signal integrity/SATA signal integrity was tested. If the code pattern setting does not meet any defined value in the table, the EEEE font can be directly displayed through the display module, and the EEEE font indicates that the code pattern setting is wrong and needs to be reset.
For a more clear description of the second embodiment of the present invention, as shown in fig. 5, it is an overall flowchart of the technical solution of the present invention.
The method effectively solves the problem of compatible test of code pattern verification and high-speed signal quality in the cable test in the prior art, realizes the compatible test of the code pattern verification and the high-speed signal quality in the cable, and effectively improves the cable test efficiency; and simultaneously realizes the test of the signal bidirectional transmission (namely sending and receiving) of the cable to be tested.
According to the technical scheme, the integrity of the SAS/SATA high-speed signal can be simply and effectively verified, and the problem that the signal quality of a cable cannot be directly and effectively verified in different code types due to the fact that the signal quality of the cable is verified only by means of a loss analyzer in the prior art is solved.
According to the technical scheme, the programmable logic device judges whether the connection of the cable to be tested is normal or not through the communication connection with the first cable interface and the second cable interface, so that the reliability and the accuracy of the quality verification test of different types of code type signals of the cable are guaranteed.
According to the technical scheme, when the upper computer fails, the dial switch is communicated with the programmable logic controller, the first control module is selected to send the corresponding second code type signal or the second control module is selected to send the corresponding first code type signal, the reliability of quality verification tests of different types of code type signals under the first code type signal or the second code type signal of the cable is further improved, and the condition that the code type signals cannot be adjusted due to the failure of the upper computer is avoided.
The technical scheme of the invention also comprises a display module which is used for displaying the type of the first code type signal or the type of the second code type signal corresponding to the current test, so that a tester can know the condition of the code type signal corresponding to the current test in time.
Although the embodiments of the present invention have been described with reference to the accompanying drawings, it is not intended to limit the scope of the present invention, and it should be understood by those skilled in the art that various modifications and variations can be made without inventive efforts by those skilled in the art based on the technical solution of the present invention.
Claims (10)
1. The utility model provides a cable testing arrangement based on code pattern signal is verified, characterized by, through the cable connection that awaits measuring for the high-speed signal quality of the cable that awaits measuring of test includes: the code type signal receiving module is respectively connected with the first cable interface and the second cable interface and is used for receiving a corresponding first code type signal sent by the second control module through the first cable interface, or receiving a corresponding second code type signal sent by the first control module through the second cable interface and sending the received first code type signal to the corresponding second control module, or sending the received second code type signal to the corresponding first control module; the first control module is in communication connection with the first cable interface, sends a corresponding second code type signal through the first cable interface, and performs quality test on the second code type signal according to the received second code type signal; the second control module is in communication connection with the second cable interface, sends a corresponding first code type signal through the second cable interface, and performs quality test on the first code type signal according to the received corresponding first code type signal; the programmable logic controller is respectively in communication connection with the first control module, the second control module and the code pattern signal selection module, and controls the first control module to send a corresponding second code pattern signal or controls the second control module to send a corresponding first code pattern signal through the communication with the code pattern signal selection module.
2. The cable testing device based on code pattern signal verification as claimed in claim 1, wherein the programmable logic device is further in communication connection with the first cable interface and the second cable interface respectively, and is configured to determine whether the cable to be tested is connected normally through the communication connection with the first cable interface and the second cable interface.
3. The cable test device based on the code type signal verification as claimed in claim 2, wherein when the cable to be tested is connected normally, the level of a first GPIO pin in the first cable interface that is in communication connection with the programmable logic device is low, and the level of a second GPIO pin in the second cable interface that is in communication connection with the programmable logic device is low.
4. The cable testing device based on pattern signal verification as claimed in claim 1, wherein the pattern signal selection module is an upper computer or a dial switch, and the upper computer or the dial switch selects the first control module to send the second pattern signal or the second control module to send the first pattern signal by communicating with the programmable logic controller.
5. The cable testing device based on pattern signal verification as claimed in claim 4, wherein when the upper computer fails, the upper computer communicates with the programmable logic controller through a dial switch to select the first control module to send the corresponding second pattern signal or the second control module to send the corresponding first pattern signal.
6. The cable testing device based on the code pattern signal verification as claimed in any one of claims 1 to 5, further comprising a display module, wherein the display module is in communication connection with the programmable logic device and is used for displaying the type of the first code pattern signal or the second code pattern signal corresponding to the current test.
7. A cable testing method based on code pattern signal verification, which is implemented based on the cable testing apparatus based on code pattern signal verification as claimed in any one of claims 1 to 6, and is used for testing the high-speed signal quality of a cable to be tested, including:
the programmable logic controller acquires a selection signal of the code pattern signal selection module, and controls the first control module to sequentially send corresponding second code pattern signals or controls the second control module to sequentially send corresponding first code pattern signals according to the selection signal of the code pattern signal selection module;
the code pattern signal receiving module sequentially receives corresponding first code pattern signals sent by the second control module through the first cable interface and sequentially sends the received first code pattern signals to the second control module, or sequentially receives corresponding second code pattern signals sent by the first control module through the second cable interface and sequentially sends the received second code pattern signals to the first control module;
the first control module outputs a high-speed signal quality test result of the second code type signal according to the second code type signal received in sequence, or the second control module outputs a high-speed signal quality test result of the first code type signal according to the first code type signal received in sequence.
8. The cable test method based on pattern signal verification as claimed in claim 7, wherein before the plc acquires the selection signal of the pattern signal selection module, the method further comprises:
the first cable interface and the second cable interface are in communication connection through the cable to be tested, and whether the connection of the cable to be tested is normal or not is judged; if not, the connection condition of the cable to be tested is rechecked.
9. The method for testing a cable based on code pattern signal verification according to claim 8, wherein the step of judging whether the connection of the cable to be tested is normal is specifically as follows: if the level of a first GPIO pin in the first cable interface and in communication connection with the programmable logic device and the level of a second GPIO pin in the second cable interface and in communication connection with the programmable logic device are both low levels, the connection of the cable to be tested is normal; and if the level of a first GPIO pin in the first cable interface and in communication connection with the programmable logic device and the level of a second GPIO pin in the second cable interface and in communication connection with the programmable logic device are not both low levels, the cable to be tested is not normally connected.
10. The cable test method based on pattern signal verification according to any one of claims 7 to 9, further comprising:
if all second code type signals of the types to be detected of the first control module or all first code type signals of the types to be detected of the second control module are sent in sequence, the programmable logic controller acquires a selection switching signal of the code type signal selection module, and the second control module is switched to send the first code type signals in sequence or the first control module sends the second code type signals in sequence; and sending the second code type signals of all types to be tested of the first control module and the first code type signals of all types to be tested of the second control module in sequence.
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