CN201114167Y

CN201114167Y - Dynamically reconfigurable multipath serial interface connector

Info

Publication number: CN201114167Y
Application number: CNU2007201134352U
Authority: CN
Inventors: 陈罡; 徐志明; 刘葵; 吴菁; 马子余
Original assignee: Zhejiang Textile and Fashion College
Current assignee: Zhejiang Textile and Fashion College
Priority date: 2007-08-20
Filing date: 2007-08-20
Publication date: 2008-09-10
Anticipated expiration: 2017-08-20

Abstract

The utility model discloses a dynamic and reconfigurable multi-channel serial interface connector which comprises a large-scale complicated programmable logic device chip unit (for short CPLD) arranged in a connector body, wherein a CPLC chip in the CPLD unit is connected with four ports through a logic circuit flexible circuit conductor, the four ports are namely a first port PA connected with data terminal equipment, a second port PB connected with data communication equipment, a third port PC connected with a first serial ports arranged in a microprocessor unit and used to transmit command information, a fourth port PD connected with a second serial port arranged in the microprocessor unit and used to transmit data information. The dynamic and reconfigurable multi-channel serial interface connector is composed by a large-scale complicated programmable logic device, realizing flexible circuit conductor function and speed conversion function of a signal pathway; the dynamic and reconfigurable multi-channel serial interface connector is flexible and convenient to use, can be inspected online and in real time, has short development cycle and low cost; the standard product does not need to be tested, is stable in quality and contributes to improving the protection of intellectual property right and the software performance.

Description

The multi-path serial interface connector of dynamically can recombinating

Technical field

The utility model relates to digital communication technology, Protocol Analysis and instrument field, relates in particular to a kind of multi-path serial interface connector of dynamically can recombinating.

Background technology

At present, serial communication is a kind of digital communication technology of extensive use, in digital system, and main equipment and slave unit, the modes that are connected most employing serials of main system and subsystem.Interface standard commonly used has RS-232C, RS-422, RS-485 etc.In order to test, analyze, debug relevant communication process, the method that many software and hardwares are arranged now, as computer based AccessPort program, data communication analyzer based on instrumentation, as a rule, they can solve the test problem of serial communication effectively, but tangible limitation is also arranged.

In the process of equipment being carried out the performance transformation, the motherboard of equipment and other parts mainly communicate in the mode of serial line interface.Because the parts of being transformed have functions such as data in magnetic disk input, disc information storage, key commands control, working state of system indication, thereby the data volume of communication is big, and agreement is comparatively complicated.This feasible communication protocol of analyzing this system becomes the major technique bottleneck in the scrap build project.Trial utilizes the AccessPort program, adopts the PC serial ports analytical method that receives data in parallel, has run into very big difficulty.At first, the baud rate the during serial communication of equipment is not fixed, and is relevant with operating state, if can't obtain complete communication data with the serial ports routine analyzer, analyzes agreement and just has no way of carrying out yet; Secondly, during the serial communication of this equipment, the baud rate of 76800BPS is arranged wherein, the PC serial ports does not have this speed, brings many difficulties to analytical work; At last, the traditional analysis method that receives data in parallel is a kind of passive method of testing, can not initiatively send data and give system under test (SUT) so that whether the indentification protocol analysis is correct.The key of problem is, what traditional method of testing adopted is the hardwire method, the path of recombination signal dynamically, and any buffering also useless is adjusted the baud rate of signal.

Summary of the invention

Technical problem to be solved in the utility model is the present situation at prior art, but a kind of multi-path serial interface connector of dynamically can recombinating of flexible and convenient to use, steady quality real-time online check is provided.It has the effect that the construction cycle is short, cost is low, investment risk is little, standardized product need not to test and help the raising of protection of Intellectual Property Rights and software performance.

The utility model solves the problems of the technologies described above the technical scheme that is adopted: the multi-path serial interface connector of dynamically can recombinating, comprise the large-scale complex programmable logic device chip unit that is positioned at connector body, this large-scale complex programmable logic device is called for short CPLD, CPLD chip in its CPLD chip unit is connected with four ports through the logical circuit soft wiring, is respectively the first port PA mouth that is connected with data terminal equipment, the second port PB mouth that is connected with data communications equipment, the 3rd port PC mouth that is connected with the first serial of transferring command information in the microprocessor unit, the 4th port PD mouth that is connected with the second serial of transfer data information in the microprocessor unit.

The technical measures of optimizing also comprise: connect separately interface level adapter respectively through the logical circuit soft wiring between four ports of above-mentioned CPLD chip unit and the CPLD chip.

Above-mentioned CPLD chip unit is provided with working method register, running parameter register, communication byte buffer register, path selector, timing circuit and the communications status indicating circuit that cooperatively interacts and connect through the logical circuit soft wiring.

Above-mentioned PA mouth is located at first side of described CPLD chip unit; Described PB mouth is located at second side of described CPLD chip unit; Described PC mouth, PD mouth are located at the 3rd side of described CPLD chip unit.

Compared with prior art, the utility model is core with CPLD, and its logical relation and connecting path can real time alterings, thereby make the analyzing communication agreement more flexible, free, the restriction that is subjected to still less, whole hardware module scale is also less, the product price ratio of making is higher; After adopting the CPLD art designs to finish, can carry out real-time sequential emulation, checking improves design result, and the hardware that need not repeat test, design by after write chip, can come into operation by test, but its construction cycle is short, cost is low, investment risk is little, standardized product need not test, the check of steady quality real-time online; Utilize this technology oneself algorithm, technology and some software can be made hardware and be cured on the CPLD, both improved the speed of service, also make the bootlegger be difficult to duplicate, help the raising of protection of Intellectual Property Rights and software performance.

Description of drawings

Fig. 1 is the structural representation of the utility model embodiment;

Fig. 2 is the connection layout of the utility model embodiment and ancillary equipment.

Embodiment

Embodiment describes in further detail the utility model below in conjunction with accompanying drawing.

Shown in Figure 1, the multi-path serial interface connector of dynamically can recombinating, comprise the large-scale complex programmable logic device chip unit that is positioned at connector body, this large-scale complex programmable logic device is called for short CPLD, CPLD chip in its CPLD chip unit is connected with four ports through the logical circuit soft wiring, is respectively the first port PA mouth that is connected with data terminal equipment, the second port PB mouth that is connected with data communications equipment, the 3rd port PC mouth that is connected with the first serial of transferring command information in the microprocessor unit, the 4th port PD mouth that is connected with the second serial of transfer data information in the microprocessor unit; Connect separately interface level adapter respectively through the logical circuit soft wiring between four ports of its CPLD chip unit and the described CPLD chip; Its CPLD chip unit is provided with working method register, running parameter register, communication byte buffer register, path selector, timing circuit and the communications status indicating circuit that cooperatively interacts and connect through the logical circuit soft wiring; Its PA mouth is located at first side of described CPLD chip unit, and the PB mouth is located at second side of described CPLD chip unit, and PC mouth, PD mouth are located at the 3rd side of described CPLD chip unit.

Shown in Figure 2 is the connection layout of the utility model embodiment and ancillary equipment.With the CPLD chip unit is core, be provided with PA, PB, four serial ports of PC, PD, wherein the PA mouth connects the data terminal equipment of analyzed system, the data communications equipment that the PB mouth connects analyzed system, and the PC mouth is connected with the first serial of transferring command information in the microprocessor unit; The PD mouth is connected with the second serial of transfer data information in the microprocessor unit.The additional necessary level shifting circuit of its each interface is to adapt to the needs of distinct communication standards.

Its PC mouth in order to the first serial that connects microprocessor unit sending order, the working method of control connection device, and also can monitor the information of PA mouth; The PD mouth in order to the second serial that connects microprocessor unit connecting transmission information, simulation or the transmission information of replacing PA, and also can monitor the information of PB mouth.

It realizes the soft wiring function and the speed conversion function of signal path by working method register, running parameter register, communication byte buffer register, path selector, timing circuit and communications status indicating circuit are set on the CPLD of CPLD chip unit chip.

The working method register is used to be provided with working method of the present utility model and interface type, to determine current direct-passing mode or the analog form of being operated in, whether needs direct pooling feature, whether need stamp the markers mark in the information flow of communication.The numerical value of working method register is by the input of PC mouth, and the PC mouth is the order mouth; Wherein, straight-through function provides transparent connection, the i.e. existence of data terminal equipment and the imperceptible connector of data communications equipment fully for two edge equipments of PA, PB mouth; Under this mode, the PC mouth is monitored the transmission information of PA mouth, and the PD mouth is monitored the transmission information of PB mouth, and the baud rate of PC, PD mouth is consistent with the baud rate of PA, PB mouth.Analog functuion can be received the transmission information of PB mouth for the PA mouth, but the transmission information of PA mouth is only delivered to the PC mouth, and does not deliver to the PB mouth.Come to set up direct-passing mode with the PD mouth, promptly use the computer generation that links to each other with the PD mouth equipment, simulate the communication process of PA mouth and PB mouth for the PA mouth with the PB mouth.Because PA mouth and PB mouth are symmetrical, can realize that equally the computer generation that links to each other with the PD mouth replaces the equipment of PB mouth, the communication process of simulation PB mouth and PA mouth.

The running parameter register is used to describe messaging parameter, the speed during as asynchronous communication, figure place, position of rest number, whether adopts parity check.The running parameter here is PC mouth and the setting of PD mouth, and is irrelevant with the waveform and the sequential of PA mouth and PB mouth.

The support of communication byte buffer register has the byte pooling feature, and it is provided with to be divided into and accepts buffering and send buffering, also is relevant with the PD mouth with the PC mouth, is mainly and understands the never transfer problem of same rate.The byte pooling feature specifically describes: when the communication baud rate of PA, PB mouth is non-standard, in byte of buffer stores, adjust to slightly higher standard traffic speed then during reception, send to PC mouth and PD mouth.When PC mouth and PD mouth send information, should stop a moment after each byte sends, can send with slower speed from PA, PB mouth to satisfy.The mapping function that it can realize baud rate makes microprocessor unit can analyze the communication process of non-standard baud rate equipment.

The effect of path selector is under the control of working method register, changes the annexation of signal path, but reaches the dynamic recombination function of signal.

Timing circuit is used for the frequency division to crystal oscillator, and produces corresponding beat control signal, as shift pulse, and the detection of frame initial sum position of rest; And for example, every the regular hour, produce timing signal.Timing circuit is supported the markers function, when the traffic rate setting of PC and PD mouth is higher than PA and PB mouth, can stamp time tag to PA and the PB message breath monitored every the regular hour, so that analyze both sides' communication process.Obviously, the course of work of timing circuit is subjected to the control of running parameter register.

The communications status indicating circuit is used for the transmitting terminal signal flow situation of indicated number PA, PB, PC, four mouths of PD, also indicates the frame structure correctness.The information of communications status indicating circuit when needed, is read in after can sending specific order by the PC mouth again.

Wherein, except that straight-through function and analog functuion were the function of mutual exclusion, byte pooling feature and markers function can compoundly be used, and can be provided with in real time by the order of PC mouth.

Except above-mentioned logical circuit, the interface level adapter must be mixed in its periphery, with the level conversion of the serial port protocol correspondence that realizes Transistor-Transistor Logic level and other interface type.We have adopted the multi-protocol interface chip, can support the serial port protocol of interface types such as RS232, RS422, RS449.During the multi-protocol interface chip operation, adopt which kind of serial port protocol, promptly the signal level of circuit depends on the setting of working method register.

For the information of the PA that flows through, two mouths of PB is analyzed, also need a program that operates on the microprocessor unit, be called Protocol Analysis software.The microprocessor unit of operational communications protocal analysis software need provide two serial ports, and it connects with PC and two mouths of PD respectively.The main effect of Protocol Analysis software is the setting of function, and the communication information of the information of flowing through being stored, add up, analyzes, reappearing each port.

During power-up initializing, the working method of its acquiescence adopts straight-through function, because connecting the data terminal equipment of PA mouth can proper communication be the basis of analyzing agreement with the data communications equipment that is connected the PB mouth, the microprocessor unit that connects PC mouth and PD mouth just can listen to the communication information of communicating pair.Under the effect of Protocol Analysis software, can obtain communicatory essential information, as the figure place of the figure place of traffic rate, every byte, position of rest, whether adopt parity check etc., and understand whether belong to certain protocol type commonly used, as the intra-office base station controller etc.Protocol Analysis software can be by giving an order to the PC mouth, to its transportation work mode, come real time altering signal connecting path or messaging parameter, typical application is, it is operated in analog form, the stored information that listens to from the PA mouth is forwarded by the PD mouth, thus the correctness that indentification protocol is analyzed.In like manner, the utility model can under the Protocol Analysis software control, be realized byte pooling feature and markers function according to the needs of signal analysis.

The beneficial effects of the utility model are: but 1, the construction cycle is short, cost is low, investment risk is little, standardized product need not test, steady quality real-time online check; After adopting the CPLD art designs to finish, can carry out real-time sequential emulation; Checking improves design result, and the hardware that need not repeat test; Design by after write chip, by the test can come into operation; Some special-purpose chip development are simple than using, and saved other development equipments, so cost is also lower.2, flexible and convenient to use, because it is core with CPLD, logical relation and connecting path can real time alterings, thus make that the analyzing communication agreement is more flexible, free, the restriction that is subjected to still less, whole hardware module scale is also less, the product price ratio of making is higher.3, help the raising of protection of Intellectual Property Rights and software performance; utilize this technology oneself algorithm, technology and some software can be made hardware and be cured on the CPLD, both improved the speed of service, also make the bootlegger be difficult to duplicate; simple and practical, very high using value is arranged.

Most preferred embodiment of the present utility model is illustrated, and various variations or the remodeling made by those of ordinary skills can not break away from scope of the present utility model.

Claims

1, the multi-path serial interface connector of dynamically can recombinating, comprise the large-scale complex programmable logic device chip unit that is positioned at connector body, this large-scale complex programmable logic device is called for short CPLD, it is characterized in that: the CPLD chip in the described CPLD chip unit is connected with four ports through the logical circuit soft wiring, and described four ports are respectively the first port PA mouth that is connected with data terminal equipment, the second port PB mouth that is connected with data communications equipment, the 3rd port PC mouth that is connected with the first serial of transferring command information in the microprocessor unit, the 4th port PD mouth that is connected with the second serial of transfer data information in the microprocessor unit.

2, the multi-path serial interface connector of dynamically can recombinating according to claim 1 is characterized in that: connect separately interface level adapter respectively through the logical circuit soft wiring between four ports of described CPLD chip unit and the described CPLD chip.

3, the multi-path serial interface connector of dynamically can recombinating according to claim 1 and 2 is characterized in that: described CPLD chip unit is provided with working method register, running parameter register, communication byte buffer register, path selector, timing circuit and the communications status indicating circuit that cooperatively interacts and connect through the logical circuit soft wiring.

4, the multi-path serial interface connector of dynamically can recombinating according to claim 1 and 2, it is characterized in that: described PA mouth is located at first side of described CPLD chip unit; Described PB mouth is located at second side of described CPLD chip unit; Described PC mouth, PD mouth are located at the 3rd side of described CPLD chip unit.