CN1411173A - Universal testing method for broad band product interface single board - Google Patents

Universal testing method for broad band product interface single board Download PDF

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Publication number
CN1411173A
CN1411173A CN01133293A CN01133293A CN1411173A CN 1411173 A CN1411173 A CN 1411173A CN 01133293 A CN01133293 A CN 01133293A CN 01133293 A CN01133293 A CN 01133293A CN 1411173 A CN1411173 A CN 1411173A
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interface
test
bus
cpu
data
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CN1184756C (en
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李占有
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Abstract

A wide a band product interface single plate general test method based on a system containing host test device of providing data source, analyzing and receiving data includes the following steps: connecting the tested interface plate to a general bus interface of the testing device via n interface bus converting module; controlled by the host, CPU initializes the tested interface plate, matches and sends tested data and circulates back via tested interface plate, processes received data; CPU fetches the above mentioned test result and statistic information to the testing host.

Description

Universal testing method for broad band product interface single board
Technical field
The invention belongs to the communication equipment measuring technology, specifically is a kind of universal testing method for broad band product interface single board.
Background technology
Along with development of Communication Technique, the interface single board kind of broadband product is more and more, and speed is more and more faster, therefore the test of this class veneer is also had higher requirement.
Interface single board is general to be constituted simply, mainly realizes the physical layer function of communication network, and the business interface with link layer is provided.General broadband interface class veneer is formed as shown in Figure 1.Mainly by physical layer process chip, link layer interface, optic electric interface and string and converting unit etc.
Broadband interface class veneer always links to each other with the transceiver bus of link layer by standard or off-gauge link layer interface.Be the interface single plate of friction speed, its interface type with link layer is different, and the speed of interface board is high more, and width fast more with the interface bus signal speed of link layer or bus is wide more.
The test of the interface board various at kind of interface at present, that interface rate is more and more faster, two kinds of methods are arranged usually: a kind of is to test with the interface board butt joint by the broadband test instrument, this kind method is to send out packet to interface board by tester, through link layer or more high-rise loopback, by tester the data that receive are analyzed again, thereby realized test.Link layer or more high-risely the configuration feature of butt joint oralia also will be provided and clock is provided simultaneously.Another kind method is to realize that by the mode that increases data source, Controlling Source, clock source in link layer or more high-rise functional module achieve a butt joint initialization, configuration and the state of oralia of the test of interface single board, Controlling Source reads.The clock source provides the reference clock of interface board necessity, and data source then is provided to the test data of interface board, and the data of butt joint oralia loopback are analyzed.
There is following shortcoming in above-mentioned method of testing:
Because interface single board generally is the veneer of output maximum in communication equipment, if therefore adopt such scheme one, increased the instrument input, testing cost can improve greatly.Interface single board of a great variety, general tester are difficult to the mating interface that provides whole, therefore, often need multiple different tester in test, except that increasing cost, also are unfavorable for the system integration.Therefore the speed of interface board is more and more higher, and experience in the past is the development that the development of tester does not catch up with broadband product, the situation that tester can not satisfy test (or even simply performance test, functional test) may occur.
Adopt such scheme two, common situation is to realize the test of full rate, therefore to the flow disposal ability test of physical layer less than.In link layer or more high-rise increase data source, Controlling Source, clock source, tend to bring extra interference to the system of complexity.For the product of being eager to go on the market, can bring very big workload simultaneously, influence the listing progress.In addition, all there is the inflexible problem of configuration in above-mentioned two kinds of universal methods.
Summary of the invention
Main purpose of the present invention is that the interface single board for broadband product provides a kind of general method of testing, to satisfy the test request of broadband interface class veneer various in style, that speed is more and more faster, reduces testing cost, makes things convenient for the system integration.
The universal testing method for broad band product interface single board that the present invention proposes based on containing main frame, providing test data source and analysis to receive the system of the testing apparatus of data, is characterized in that comprising the steps:
1). tested interface board is connected to the general purpose interface bus of testing apparatus by interface bus type conversion module;
2). under the control of Test Host, the tested interface board of CPU initialization by testing apparatus disposes and issues test data, through tested interface board loopback, the data that receive is carried out analyzing and processing;
3) .CPU reads above-mentioned test result and statistical information is sent Test Host.
The testing apparatus that above-mentioned method of testing adopted, comprise: CPU, power supply, clock module, receive the test data processing unit and the general purpose interface bus of cpu bus, the data storage that is connected with the test data processing unit, clock module is connected respectively to general-purpose interface bus and test data processing unit, the test data processing unit is connected in the transmission of general-purpose interface bus and receives bus, and CPU is connected with main frame by communication port.
The present invention is applicable to the test of the interface single board of all broadband products, can realize that flowing full measures examination; The testing equipment cost is low, and system forms simple, and is easy to operate, made things convenient for the system integration.
Description of drawings
Fig. 1 is existing broadband interface class single plate structure figure;
Fig. 2 forms schematic diagram for test macro;
Fig. 3 is its testing apparatus theory diagram;
Fig. 4 is its test data processing logic function diagram;
Fig. 5 is its interface bus type conversion functions of modules figure.
Embodiment
In order to realize the universal test to broadband interface class veneer, the present invention has adopted test macro as shown in Figure 2.This test macro contains: main frame, and the test data source is provided and analyzes the testing apparatus (being test board) that receives data, and the interface bus type conversion module (or plate) between testing apparatus and the tested single board etc.The testing apparatus major function is: the test data source is provided and analyzes the data that receive; Provide Board Under Test required reference clock; Cpu bus to Board Under Test is provided; Draw control interface, can be by PC control test; Provide general data/address bus, so that be fit to the test of various interface veneer.
The composition frame chart of testing apparatus as shown in Figure 3.Testing apparatus mainly is made up of CPU, power supply, clock module, test data processing unit and general purpose interface bus.Wherein CPU realizes the control of this plate and the Board Under Test cpu bus is provided, and its communication interface mainly provides tests control and test mode and result to the user and read, and CPU can select for use X86 or POWER PC etc. all can.Clock module mainly provides the reference clock of tested single board, and clock module can be provided by the clock (as 19.44M Transistor-Transistor Logic level clock, 155M PECL level clock or the like) that provides the various interface plate to provide.Power supply mainly is that the conversion external power source is device (or plate), interface conversion plate and the required power supply of Board Under Test (generally being 5V, 3.3V).The data storage that is connected to the test data processing unit mainly comprises: the transmission data storage that is used to store the test data that sends to interface board; Be used to catch the reception data storage that receives data; Be used to store and be used for receiving the analysis source data storage that data are analyzed, the general data with the transmission data storage of the data of this memory are identical.These memories can be selected SDRAM, SSRAM, DPRAM, ROM etc. for use.The test data processing unit is the core of this device, and it mainly produces various test datas (random number or fixed number), and analyzes the data through the interface board loopback, and this functional unit can be realized by the FPGA design; General purpose interface bus mainly is the test for realization various interface plate, and the unified interface that provides, certainly according to different interface boards, can change by the interface conversion veneer, when general purpose interface bus is realized in design, can in same FPGA, realize with the test data processing unit.
Introduce the implementation of test data processing unit and general purpose interface bus below in detail.
The logic function of test data processing unit as shown in Figure 4.Wherein cpu i/f is mainly realized read-write and the control timing interface logic of CPU, even provides at different cpu types and carry out bus type and clock matching treatment etc.; The test command register is mainly explained the various test commands that issued by the user, and command register can be provided with as required flexibly, and general order comprises: data initialization sign, test data transmission enable, receive data read and enable or the like; Test state register is mainly deposited current detecting information, as mistake indication, memory completely indicate, initialization is successfully indicated, test mode indication or the like, can be provided with flexibly according to actual needs; Various memory interface logics mainly realize the read-write and the control timing of memory interface, will design different interface logics according to different memories; Various counters mainly are to realize statistical function, and actual test statistics information can be provided, and these counters can carry out counter length setting (as 16,24,32 etc.) according to actual conditions; The data analysis logic realization reception data with analyze alignment of data, data comparison, particular data extraction and analysis, flow control, mistake or particular data and catch, provide functions such as statistics pulse or signal.
General purpose interface bus is made of two groups of buses of transmitting-receiving.Wherein sending bus comprises the transmission data wire, sends synchronised clock, sends the data start flag signal, sends the end-of-data mark signal; Receiving bus comprises the reception data wire, receives synchronised clock, receives the data start flag signal, receives the end-of-data mark signal.
The bus speed of general purpose interface bus and the disposal ability of data processing unit have determined the interface board type of the treatable maximum stream flow of this test board.Usually the synchronised clock of versabus is fast more, and data-bus width is wide more, requires the disposal ability of processing module just strong more, to the test traffic big more (promptly can test the more interface single plate of high bandwidth) of tested interface board.
Interface bus type conversion module (or plate) mainly realizes the conversion of the general purpose interface bus of testing apparatus (or plate) to tested interface board link layer interface bus.Its functional block diagram as shown in Figure 5.
The major part of this interface conversion plate is the interface conversion logic, the general-purpose interface of testing apparatus is converted to the link layer interface bus (as gmii interface, UTOPIA interface, POS-PHY interface, FIFO BUS or the like) of tested interface board by this logic.The design of interface conversion logic can design according to the bus standard of link layer, and in this few narration, logical device can be selected the multiple FPGA of companies such as XILINX, ALTERA for use.
The testing process that adopts the present invention program to dock oralia is: data, statistics → CPU read test result and the statistical information etc. of the tested interface board of CPU initialization → configuration testing data → issue test command (data are to the interface board loopback) → analysis reception → provide test result.

Claims (2)

1, a kind of universal testing method for broad band product interface single board based on containing main frame, providing test data source and analysis to receive the system of the testing apparatus of data, is characterized in that comprising the steps:
1). tested interface board is connected to the general purpose interface bus of testing apparatus by interface bus type conversion module;
2). under the control of Test Host, the tested interface board of CPU initialization by testing apparatus disposes and issues test data, through tested interface board loopback, the data that receive is carried out analyzing and processing;
3) .CPU reads above-mentioned test result and statistical information is sent Test Host.
2, the testing apparatus that is used for the described method of testing of claim 1, it is characterized in that comprising: CPU, power supply, clock module, receive the test data processing unit and the general purpose interface bus of cpu bus, the data storage that is connected with the test data processing unit, clock module is connected respectively to general-purpose interface bus and test data processing unit, the test data processing unit is connected in the transmission of general-purpose interface bus and receives bus, and CPU is connected with main frame by communication port.
CNB01133293XA 2001-09-27 2001-09-27 Universal testing method for broad band product interface single board Expired - Fee Related CN1184756C (en)

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Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100337440C (en) * 2003-12-03 2007-09-12 华为技术有限公司 Method and system for testing intercommunity between equipments
CN1888922B (en) * 2006-07-19 2010-05-12 无锡凯尔科技有限公司 Mobile telephone photographic module universal testing method and tester thereof
CN101127650B (en) * 2007-09-29 2010-06-02 中兴通讯股份有限公司 A method and testing backboard for single board production test
CN101083570B (en) * 2007-06-26 2010-06-09 中兴通讯股份有限公司 Method and apparatus for testing single board throughput performance of broadband access system
CN101072089B (en) * 2006-05-08 2010-06-23 中兴通讯股份有限公司 Device for testing transmission cross single board
CN101159499B (en) * 2007-11-07 2011-11-30 中兴通讯股份有限公司 Method of testing hardware module
CN102346234A (en) * 2011-06-30 2012-02-08 福州瑞芯微电子有限公司 Functional test method of I2S (Inter-IC Sound Bus) interface
CN101594222B (en) * 2009-06-29 2012-12-19 中兴通讯股份有限公司 Interface testing method and device
CN103279407A (en) * 2013-05-31 2013-09-04 大唐移动通信设备有限公司 Off-line test system and auxiliary test card for ATCA (advanced telecom computing architecture) single boards
CN103427899A (en) * 2013-08-06 2013-12-04 武汉电信器件有限公司 Easy test board
CN104297665A (en) * 2014-04-15 2015-01-21 苏佳宁 ATE load board management assembly for chip quantity production test
CN104506377A (en) * 2014-12-02 2015-04-08 中国航天科工集团第三研究院第八三五七研究所 Device for effectively prolonging service life of bus protocol controller testing equipment
CN105095037A (en) * 2015-09-11 2015-11-25 北京星网锐捷网络技术有限公司 Wire card, backboard of wire card and wire card test method
WO2016123936A1 (en) * 2015-02-06 2016-08-11 中兴通讯股份有限公司 Method, device, test board, and system for testing traffic of interface board
CN106330613A (en) * 2016-08-31 2017-01-11 北京信而泰科技股份有限公司 Broadband communication equipment testing method, device and system

Cited By (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100337440C (en) * 2003-12-03 2007-09-12 华为技术有限公司 Method and system for testing intercommunity between equipments
CN101072089B (en) * 2006-05-08 2010-06-23 中兴通讯股份有限公司 Device for testing transmission cross single board
CN1888922B (en) * 2006-07-19 2010-05-12 无锡凯尔科技有限公司 Mobile telephone photographic module universal testing method and tester thereof
CN101083570B (en) * 2007-06-26 2010-06-09 中兴通讯股份有限公司 Method and apparatus for testing single board throughput performance of broadband access system
CN101127650B (en) * 2007-09-29 2010-06-02 中兴通讯股份有限公司 A method and testing backboard for single board production test
CN101159499B (en) * 2007-11-07 2011-11-30 中兴通讯股份有限公司 Method of testing hardware module
CN101594222B (en) * 2009-06-29 2012-12-19 中兴通讯股份有限公司 Interface testing method and device
CN102346234B (en) * 2011-06-30 2013-11-06 福州瑞芯微电子有限公司 Functional test method of I2S (Inter-IC Sound Bus) interface
CN102346234A (en) * 2011-06-30 2012-02-08 福州瑞芯微电子有限公司 Functional test method of I2S (Inter-IC Sound Bus) interface
CN103279407A (en) * 2013-05-31 2013-09-04 大唐移动通信设备有限公司 Off-line test system and auxiliary test card for ATCA (advanced telecom computing architecture) single boards
CN103279407B (en) * 2013-05-31 2015-09-09 大唐移动通信设备有限公司 A kind of off-line test system of ATCA veneer and subtest board
CN103427899A (en) * 2013-08-06 2013-12-04 武汉电信器件有限公司 Easy test board
CN104297665A (en) * 2014-04-15 2015-01-21 苏佳宁 ATE load board management assembly for chip quantity production test
CN104506377A (en) * 2014-12-02 2015-04-08 中国航天科工集团第三研究院第八三五七研究所 Device for effectively prolonging service life of bus protocol controller testing equipment
WO2016123936A1 (en) * 2015-02-06 2016-08-11 中兴通讯股份有限公司 Method, device, test board, and system for testing traffic of interface board
CN105991358A (en) * 2015-02-06 2016-10-05 中兴通讯股份有限公司 Method, device, test board and system for testing traffic of interface board
CN105095037A (en) * 2015-09-11 2015-11-25 北京星网锐捷网络技术有限公司 Wire card, backboard of wire card and wire card test method
CN106330613A (en) * 2016-08-31 2017-01-11 北京信而泰科技股份有限公司 Broadband communication equipment testing method, device and system

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