CN113964222B - Low-leakage crystalline silicon solar cell, cell assembly and preparation method - Google Patents
Low-leakage crystalline silicon solar cell, cell assembly and preparation method Download PDFInfo
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- CN113964222B CN113964222B CN202111201762.4A CN202111201762A CN113964222B CN 113964222 B CN113964222 B CN 113964222B CN 202111201762 A CN202111201762 A CN 202111201762A CN 113964222 B CN113964222 B CN 113964222B
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- 229910021419 crystalline silicon Inorganic materials 0.000 title claims abstract description 26
- 238000002360 preparation method Methods 0.000 title claims abstract description 14
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 97
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 97
- 239000010703 silicon Substances 0.000 claims abstract description 97
- 230000004888 barrier function Effects 0.000 claims abstract description 21
- 238000004140 cleaning Methods 0.000 claims abstract description 11
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 26
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 26
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 22
- 238000000151 deposition Methods 0.000 claims description 22
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 22
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 21
- 230000003647 oxidation Effects 0.000 claims description 21
- 238000007254 oxidation reaction Methods 0.000 claims description 21
- 229910052760 oxygen Inorganic materials 0.000 claims description 21
- 239000001301 oxygen Substances 0.000 claims description 21
- 238000009792 diffusion process Methods 0.000 claims description 18
- 229920002120 photoresistant polymer Polymers 0.000 claims description 18
- 238000005229 chemical vapour deposition Methods 0.000 claims description 15
- 239000013078 crystal Substances 0.000 claims description 13
- 238000000231 atomic layer deposition Methods 0.000 claims description 12
- 239000011267 electrode slurry Substances 0.000 claims description 12
- 238000005240 physical vapour deposition Methods 0.000 claims description 12
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 11
- 238000005245 sintering Methods 0.000 claims description 10
- 238000004528 spin coating Methods 0.000 claims description 9
- 238000005507 spraying Methods 0.000 claims description 9
- 230000005641 tunneling Effects 0.000 claims description 8
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 7
- 238000001035 drying Methods 0.000 claims description 7
- 229910052698 phosphorus Inorganic materials 0.000 claims description 7
- 239000011574 phosphorus Substances 0.000 claims description 7
- 238000007639 printing Methods 0.000 claims description 7
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 6
- 238000000137 annealing Methods 0.000 claims description 6
- 229910052796 boron Inorganic materials 0.000 claims description 6
- 238000007747 plating Methods 0.000 claims description 6
- 238000005498 polishing Methods 0.000 claims description 6
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 4
- 239000005388 borosilicate glass Substances 0.000 claims description 3
- 239000005360 phosphosilicate glass Substances 0.000 claims description 3
- 238000006243 chemical reaction Methods 0.000 abstract description 5
- 238000005520 cutting process Methods 0.000 abstract description 5
- 238000003698 laser cutting Methods 0.000 abstract description 3
- 210000004027 cell Anatomy 0.000 description 46
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 13
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 12
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 6
- 235000012239 silicon dioxide Nutrition 0.000 description 6
- 239000000377 silicon dioxide Substances 0.000 description 6
- 239000004408 titanium dioxide Substances 0.000 description 6
- 238000000034 method Methods 0.000 description 5
- 238000010248 power generation Methods 0.000 description 4
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical group [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 230000000903 blocking effect Effects 0.000 description 3
- -1 but not limited to Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 239000004332 silver Substances 0.000 description 3
- 229910052709 silver Inorganic materials 0.000 description 3
- 239000002002 slurry Substances 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- ILAHWRKJUDSMFH-UHFFFAOYSA-N boron tribromide Chemical group BrB(Br)Br ILAHWRKJUDSMFH-UHFFFAOYSA-N 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 2
- XHXFXVLFKHQFAL-UHFFFAOYSA-N phosphoryl trichloride Chemical group ClP(Cl)(Cl)=O XHXFXVLFKHQFAL-UHFFFAOYSA-N 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 238000007792 addition Methods 0.000 description 1
- 210000003850 cellular structure Anatomy 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0352—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
- H01L31/035272—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions characterised by at least one potential jump barrier or surface barrier
- H01L31/03529—Shape of the potential jump barrier or surface barrier
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- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
- H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
- H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type
- H01L31/0745—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
- H01L31/0747—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells comprising a heterojunction of crystalline and amorphous materials, e.g. heterojunction with intrinsic thin layer or HIT® solar cells; solar cells
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- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
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- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/20—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
- H01L31/202—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic System
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
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- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The invention discloses a crystalline silicon solar cell with low electric leakage, a cell assembly and a preparation method thereof, belonging to the field of solar cells; in the preparation process, a p-type or n-type silicon wafer which is subjected to cleaning and texturing is adopted, a pn junction barrier layer is arranged in a central line area on the front surface of the silicon wafer, and a pn junction is arranged in the rest area on the front surface of the silicon wafer; and the central line area of the front surface of the silicon wafer corresponds to the area of laser cutting and scribing. In the invention, the p region and the n region in the region are separated by the pn junction barrier layer, so that electric leakage caused by the exposed pn junction region after laser scribing is avoided, and a small cell with higher conversion efficiency and a solar cell module with higher output power can be obtained after cutting.
Description
Technical Field
The invention belongs to the field of solar cells, and particularly relates to a crystalline silicon solar cell with low electric leakage, a cell assembly and a preparation method of the crystalline silicon solar cell.
Background
The solar energy is taken as renewable clean energy, has the advantages of safety, reliability, no noise, less restriction, simple maintenance, wide resources and the like, and is widely applied to the aspects of grid-connected power generation, civil power generation, public facilities, integrated energy-saving buildings and the like.
In which the crystalline silicon photovoltaic power generation system occupies an important position, the current research and development work is mainly developed around the aim of cost reduction and efficiency improvement, the continuous improvement of the conversion efficiency of the solar cell is a key point for the development of solar power generation, in order to reduce the manufacturing cost of the crystalline silicon solar cell, the direct pulling monocrystalline silicon for photovoltaic is continuously developed towards the large-size direction, and the area of the monocrystalline silicon cell is also 125mm from the original 125mm to 125mm 2 Transition to 156X 156mm 2 And 166X 166mm at present 2 And 182X 182mm 2 Even 210X 210mm 2 。
However, the larger area solar cell brings about larger power loss, so that in recent years, half-piece solar cell technology and even four-piece solar cell technology are appeared, i.e. the prepared large area solar cell is divided into more than two small solar cells by laser cutting.
The chinese patent document with publication number CN211957655U discloses a solar cell suitable for manufacturing a half-sheet solar cell, wherein a cross-shaped gap is provided in a gate region on the surface of the cell, and an intersection point of the cross-shaped gap coincides with a center point of the cell, so that the gate region is divided into 4 equal and independent regions. The gap line of the cross gap on the grid electrode area is positioned on the central line of the cell piece and is equal to the side length of the cell piece in length.
However, with the existing method, after the battery piece is scribed by laser scribing, the exposed cut section may generate serious carrier recombination, thereby causing leakage of the half-cell, i.e., loss of electrical properties.
Disclosure of Invention
In order to solve the problems in the prior art, the invention provides a crystalline silicon solar cell with low electric leakage and a preparation method thereof, and a small cell with higher conversion efficiency and a solar cell component with higher output power can be obtained.
In the preparation process, a p-type or n-type silicon wafer which is subjected to cleaning and texturing is adopted, a pn junction blocking layer is arranged in a central line area on the front surface of the silicon wafer, and a pn junction is arranged in the rest area on the front surface of the silicon wafer; and the central line area of the front surface of the silicon wafer corresponds to the area of laser cutting and scribing.
According to the invention, before forming the pn junction, a pn junction blocking layer with optimized width and thickness is formed in the region of the laser scribing, and the p region and the n region in the region are separated, so that electric leakage caused by the exposed pn junction region after the laser scribing is avoided.
Further, the pn junction barrier layer is made of oxide or nitride insulating materials, including but not limited to silicon oxide, aluminum oxide and silicon nitride.
Further, the pn junction barrier layer is formed by a method including, but not limited to, plasma enhanced chemical vapor deposition, conventional chemical vapor deposition, physical vapor deposition, atomic layer deposition, dry oxygen oxidation, and wet oxygen oxidation.
Further, the width of the pn junction barrier layer is 0.2-2 mm, and the thickness is 0.02-2 um.
The invention also provides a solar cell module, which comprises a plurality of small cells formed by connecting the small cells in series, wherein the small cells are formed by cutting the crystalline silicon solar cell.
Further, the crystalline silicon solar cell is in a PERC structure, a TOPCon structure or a HJT structure.
The invention also provides a preparation method of the crystalline silicon solar cell with the PERC structure, which comprises the following steps:
(1) Providing a p-type crystalline silicon wafer, and cleaning and texturing;
(2) Forming photoresist on the front side of the obtained silicon wafer by a spin coating or spray coating method to serve as a mask, exposing a region to be treated near the front center line, and forming a pn junction barrier layer in the region to be treated near the front center line of the silicon wafer by a plasma enhanced chemical vapor deposition, conventional chemical vapor deposition, physical vapor deposition, atomic layer deposition, dry oxygen oxidation or wet oxygen oxidation mode;
(3) Removing the photoresist on the silicon wafer treated in the step (2);
(4) Performing high-temperature phosphorus diffusion on the front surface of the silicon wafer treated in the step (3) to form a pn junction, then removing phosphosilicate glass formed in the diffusion process and coiling and plating, and polishing the back surface of the silicon wafer;
(5) Depositing an aluminum oxide film and a silicon nitride film on the back surface of the silicon wafer treated in the step (4), and depositing a silicon nitride film on the front surface of the silicon wafer;
(6) And (3) taking the double-sided printing electrode slurry of the silicon wafer treated in the step (5) as a main grid and an auxiliary grid, drying, and sintering at a high temperature to form the electrode.
The invention also provides a preparation method of the crystalline silicon solar cell with the TOPCON structure, which comprises the following steps:
(1) Providing an n-type crystal silicon wafer, and cleaning and texturing;
(2) Forming photoresist on the front side of the obtained silicon wafer by a spin coating or spray coating method to serve as a mask, exposing a region to be treated near the front center line, and forming a pn junction barrier layer in the region to be treated near the front center line of the silicon wafer by a plasma enhanced chemical vapor deposition, conventional chemical vapor deposition, physical vapor deposition, atomic layer deposition, dry oxygen oxidation or wet oxygen oxidation mode;
(3) Removing the photoresist on the silicon wafer treated in the step (2);
(4) Performing high-temperature boron diffusion on the front surface of the silicon wafer treated in the step (3) to form a pn junction, then removing borosilicate glass formed in the diffusion process and coiling and plating, and polishing the back surface of the silicon wafer;
(5) Depositing a tunneling oxide layer on the back of the silicon wafer treated in the step (4), then depositing an n-type heavily doped amorphous silicon layer on the tunneling oxide layer, and annealing to form an n-type heavily doped polycrystalline silicon layer;
(6) Depositing an aluminum oxide film and a silicon nitride film on the front surface of the silicon wafer treated in the step (5), and depositing a silicon nitride film on the back surface of the silicon wafer;
(7) And (3) taking the double-sided printing electrode slurry of the silicon wafer treated in the step (6) as a main grid and an auxiliary grid, drying, and sintering at high temperature to form the electrode.
The invention also provides a preparation method of the HJT crystalline silicon solar cell, which comprises the following steps:
(1) Providing an n-type crystal silicon wafer, and cleaning and texturing;
(2) Forming photoresist on the front side of the obtained silicon wafer by a spin coating or spray coating method to serve as a mask, exposing a region to be treated near the front center line, and forming a pn junction barrier layer in the region to be treated near the front center line of the silicon wafer by a plasma enhanced chemical vapor deposition, conventional chemical vapor deposition, physical vapor deposition, atomic layer deposition, dry oxygen oxidation or wet oxygen oxidation mode;
(3) Removing the photoresist on the silicon wafer treated in the step (2);
(4) Forming an intrinsic amorphous silicon layer or a hydrogenated intrinsic amorphous silicon thin layer on the front side and the back side of the silicon wafer treated in the step (3);
(5) Respectively preparing a p+ type doped amorphous silicon thin layer and an n+ type doped amorphous silicon thin layer on the front side and the back side of the silicon wafer treated in the step (4);
(6) Respectively depositing ITO conductive layers on the front side and the back side of the silicon wafer treated in the step (5);
(7) And (3) printing electrode slurry on the two sides of the silicon wafer treated in the step (6) as a main grid and an auxiliary grid, drying, and performing low-temperature annealing to form good ohmic contact between the electrode and the ITO conductive layer.
Compared with the prior art, the invention has the following beneficial effects:
according to the invention, before forming the pn junction, a pn junction blocking layer with optimized width and thickness is formed in the region of the laser scribing, and the p region and the n region in the region are separated, so that electric leakage caused by the exposed pn junction region after the laser scribing is avoided. The crystalline silicon solar cell prepared by the invention is beneficial to obtaining a small cell with higher conversion efficiency and a solar cell module with higher output power after dicing and cutting.
Drawings
Fig. 1 is a diagram showing a structure of a crystalline silicon solar cell sheet of a PERC structure in embodiment 1 of the present invention;
fig. 2 is a diagram of a crystalline silicon solar cell structure of TOPCon structure in embodiment 2 of the present invention;
fig. 3 is a diagram showing a structure of a crystalline silicon solar cell of HJT in embodiment 3 of the present invention.
Detailed Description
The invention will be described in further detail with reference to the drawings and examples, it being noted that the examples described below are intended to facilitate the understanding of the invention and are not intended to limit the invention in any way.
Example 1
As shown in fig. 1, a crystalline silicon solar cell with a PERC structure is prepared by the following steps:
step 1, providing a p-type crystal silicon wafer 15, and cleaning and texturing; wherein, the resistivity of the p-type crystal silicon wafer 15 is 0.5-1.5 omega cm; the thickness of the p-type crystal silicon wafer 15 is 100-160 μm.
Step 2, photoresist is formed on the obtained silicon wafer by a spin coating or spray coating method to serve as a mask, a region to be treated near the front center line is exposed, and then a pn junction barrier layer 14 is formed in the region to be treated near the front center line of the silicon wafer; wherein the pn-junction barrier layer 14 is a material including, but not limited to, silicon dioxide, aluminum oxide, silicon nitride, titanium dioxide, and the like.
The silicon dioxide can be prepared by means of plasma enhanced chemical vapor deposition, conventional chemical vapor deposition, physical vapor deposition, dry oxygen oxidation or wet oxygen oxidation, and the like; alumina can be prepared by plasma enhanced chemical vapor deposition, atomic layer deposition and the like; silicon nitride and titanium dioxide can be prepared by plasma enhanced chemical vapor deposition, conventional chemical vapor deposition and the like; the pn junction barrier layer 14 has a width of 0.2 to 2mm and a thickness of 0.02 to 2um.
And 3, removing the photoresist on the silicon wafer treated in the step 2.
Step 4, putting the silicon wafer treated in the step 3 into an industrial high-temperature diffusion furnace to diffuse high-temperature phosphorus on the front surface to form a phosphorus diffusion layer 13, then removing phosphosilicate glass formed in the diffusion process and coiling plating, and polishing the back surface of the silicon wafer; wherein the phosphorus source is phosphorus oxychloride, the phosphorus diffusion temperature is 750-1000 ℃, the time is 60-180 minutes, and the square resistance value after phosphorus diffusion is 50-100 Ω/sqr.
And 5, depositing an aluminum oxide film 16 and a silicon nitride film 17 on the back surface of the silicon wafer treated in the step 4, and depositing a silicon nitride film 12 on the front surface of the silicon wafer. Wherein the alumina film 16 is prepared by atomic layer deposition and the like, and the thickness of the alumina film is 0.8-3 nm; the silicon nitride film 12 and the silicon nitride film 17 are prepared by plasma-enhanced chemical vapor deposition or the like; the thickness of the silicon nitride film 17 on the back of the silicon wafer is 20-60 nm; the thickness of the silicon nitride film 12 on the front surface of the silicon wafer is 60-100 nm.
Step 6, the electrode slurry is printed on the two sides of the silicon wafer treated in the step 5 to serve as a main grid and an auxiliary grid, and the main grid and the auxiliary grid are dried, enter a belt sintering furnace to be sintered at high temperature, and then an electrode 11 is formed; wherein the electrode slurry is silver-containing aluminum slurry; the sintering peak temperature is 700-850 ℃; the sintering time is 45-70 s.
Example 2
As shown in fig. 2, a crystalline silicon solar cell with a TOPCon structure is prepared by the following method:
step 1, providing an n-type crystal silicon wafer 26, and cleaning and texturing; wherein, the resistivity of the n-type crystal silicon wafer 26 is 0.5-1.5 omega cm; the thickness of the n-type crystal silicon wafer 26 is 100 to 160 μm.
And 2, forming photoresist on the obtained silicon wafer by a spin coating or spray coating method to serve as a mask, exposing a region to be treated near the front center line, and forming a pn junction barrier layer 25 in the region to be treated near the front center line of the silicon wafer. Wherein the pn-junction barrier layer 25 is a material including, but not limited to, silicon dioxide, aluminum oxide, silicon nitride, titanium dioxide, etc.; the silicon dioxide can be prepared by means of plasma enhanced chemical vapor deposition, conventional chemical vapor deposition, physical vapor deposition, dry oxygen oxidation or wet oxygen oxidation, and the like; alumina can be prepared by plasma enhanced chemical vapor deposition, atomic layer deposition and the like; silicon nitride and titanium dioxide can be prepared by plasma enhanced chemical vapor deposition, conventional chemical vapor deposition and the like; the pn junction barrier layer 25 has a width of 0.2 to 2mm and a thickness of 0.02 to 2um.
And 3, removing the photoresist on the silicon wafer treated in the step 2.
Step 4, putting the silicon wafer processed in the step 3 into an industrial high-temperature diffusion furnace to diffuse high-temperature boron on the front surface to form a boron-diffusion layer 24, then removing borosilicate glass formed in the diffusion process and coiling plating, and polishing the back surface of the silicon wafer; wherein the boron source is boron tribromide, the boron diffusion temperature is 750-1000 ℃, the time is 60-180 minutes, and the square resistance value after boron diffusion is 60-120 Ω/sqr.
Step 5, depositing a tunneling oxide layer 27 on the back surface of the silicon wafer treated in the step 4, then depositing a heavily phosphorus-doped amorphous silicon layer on the tunneling oxide layer 27, and annealing to form an n+ heavily doped polysilicon layer 28; wherein the tunneling oxide layer 27 is SiO x The method comprises the steps of carrying out a first treatment on the surface of the The thickness of the tunneling oxide layer 27 is 0.8-1.5 nm; tunnel oxide 27 may be prepared by plasma enhanced chemical vapor deposition, conventional chemical vapor deposition, physical vapor deposition, dry or wet oxygen oxidation, and the like; heavy weightThe phosphorus-doped amorphous silicon layer can be prepared by plasma enhanced chemical vapor deposition, conventional chemical vapor deposition, physical vapor deposition and the like; the thickness of the n+ heavily doped polysilicon layer 28 is 50-200 nm.
Step 6, depositing an aluminum oxide film 23 and a silicon nitride film 22 on the front surface of the silicon wafer treated in the step 5, and depositing a silicon nitride film 29 on the back surface of the silicon wafer; wherein the aluminum oxide film 23 is prepared by atomic layer deposition or the like; the thickness of the alumina film 23 is 0.8-3 nm; silicon nitride films 22 and 29 are prepared by plasma enhanced chemical vapor deposition or the like; the thickness of the silicon nitride film 29 on the back surface of the silicon wafer is 20-60 nm; the thickness of the silicon nitride film 22 on the front surface of the silicon wafer is 60-100 nm;
step 7, the electrode slurry is printed on the two sides of the silicon wafer treated in the step 6 to serve as a main grid and an auxiliary grid, and the main grid and the auxiliary grid are dried, enter a belt sintering furnace to be sintered at high temperature, and then an electrode 21 is formed; wherein the electrode slurry is silver-containing aluminum slurry; the sintering peak temperature is 700-850 ℃; the sintering time is 45-70 s.
Example 3
As shown in fig. 3, a HJT crystalline silicon solar cell has the following preparation method:
step 1, providing an n-type crystal silicon wafer 36, and cleaning and texturing; wherein, the resistivity of the n-type crystal silicon wafer 36 is 0.5-1.5Ω·cm; the thickness of the n-type crystal silicon wafer 36 is 80 to 140 μm.
Step 2, photoresist is formed on the obtained silicon wafer by a spin coating or spray coating method to serve as a mask, a region to be treated near the front center line is exposed, and then a pn junction barrier layer 35 is formed in the region to be treated near the front center line of the silicon wafer; wherein the pn-junction barrier layer 35 is a material including, but not limited to, silicon dioxide, aluminum oxide, silicon nitride, titanium dioxide, etc.; the silicon dioxide can be prepared by means of plasma enhanced chemical vapor deposition, conventional chemical vapor deposition, physical vapor deposition, dry oxygen oxidation or wet oxygen oxidation, and the like; alumina can be prepared by plasma enhanced chemical vapor deposition, atomic layer deposition and the like; silicon nitride and titanium dioxide can be prepared by plasma enhanced chemical vapor deposition, conventional chemical vapor deposition and the like; the pn junction barrier layer 35 has a width of 0.2 to 2mm and a thickness of 0.02 to 2um.
And 3, removing the photoresist on the silicon wafer treated in the step 2.
Step 4, forming an intrinsic amorphous silicon layer or a hydrogenated intrinsic amorphous silicon thin layer 34 on the front side and the back side of the silicon wafer treated in the step 3; wherein the intrinsic amorphous silicon layer or hydrogenated intrinsic amorphous silicon thin layer 34 may be prepared by plasma enhanced chemical vapor deposition or the like; the thickness of the intrinsic amorphous silicon layer or hydrogenated intrinsic amorphous silicon thin layer 34 is 1.5 to 4nm.
Step 5, depositing a p+ type doped amorphous silicon thin layer 33 and an n+ type doped amorphous silicon thin layer 37 on the front side and the back side of the silicon wafer treated in the step 4 through a plasma enhanced chemical vapor deposition furnace respectively; wherein the thickness of the p+ type doped amorphous silicon thin layer 33 and the n+ type doped amorphous silicon thin layer 37 is 20-25 nm, and the deposition temperature is 130-180 ℃.
Step 6, forming ITO conductive layers 32 on the front side and the back side of the silicon wafer processed in the step 5 respectively; the thickness of the ITO conductive layer 32 is 100-120 nm.
Step 7, printing electrode slurry on the two sides of the silicon wafer treated in the step 6 as a main grid and an auxiliary grid, drying, and annealing at low temperature to form good ohmic contact between the electrode 31 and the ITO conductive layer 32; wherein the electrode slurry is silver-containing aluminum slurry; the peak temperature of the low temperature is 130-170 ℃.
And cutting the crystalline silicon solar cell prepared in the three embodiments along the pn junction barrier layer, and forming the small cell obtained after cutting into a solar cell assembly. Through testing, the formed solar cell assembly has higher output power, so that the cell prepared by the method can obtain a small cell with higher conversion efficiency after being cut.
The foregoing embodiments have described in detail the technical solution and the advantages of the present invention, it should be understood that the foregoing embodiments are merely illustrative of the present invention and are not intended to limit the invention, and any modifications, additions and equivalents made within the scope of the principles of the present invention should be included in the scope of the invention.
Claims (3)
1. The preparation method of the crystalline silicon solar cell with the PERC structure is characterized by comprising the following steps of:
(1) Providing a p-type crystalline silicon wafer, and cleaning and texturing;
(2) Forming photoresist on the front side of the obtained silicon wafer by a spin coating or spray coating method to serve as a mask, exposing a region to be treated near the front center line, and forming a pn junction barrier layer in the region to be treated near the front center line of the silicon wafer by a plasma enhanced chemical vapor deposition, conventional chemical vapor deposition, physical vapor deposition, atomic layer deposition, dry oxygen oxidation or wet oxygen oxidation mode;
(3) Removing the photoresist on the silicon wafer treated in the step (2);
(4) Performing high-temperature phosphorus diffusion on the front surface of the silicon wafer treated in the step (3) to form a pn junction, then removing phosphosilicate glass formed in the diffusion process and coiling and plating, and polishing the back surface of the silicon wafer;
(5) Depositing an aluminum oxide film and a silicon nitride film on the back surface of the silicon wafer treated in the step (4), and depositing a silicon nitride film on the front surface of the silicon wafer;
(6) And (3) taking the double-sided printing electrode slurry of the silicon wafer treated in the step (5) as a main grid and an auxiliary grid, drying, and sintering at a high temperature to form the electrode.
2. The preparation method of the crystalline silicon solar cell with the TOPCon structure is characterized by comprising the following steps of:
(1) Providing an n-type crystal silicon wafer, and cleaning and texturing;
(2) Forming photoresist on the front side of the obtained silicon wafer by a spin coating or spray coating method to serve as a mask, exposing a region to be treated near the front center line, and forming a pn junction barrier layer in the region to be treated near the front center line of the silicon wafer by a plasma enhanced chemical vapor deposition, conventional chemical vapor deposition, physical vapor deposition, atomic layer deposition, dry oxygen oxidation or wet oxygen oxidation mode;
(3) Removing the photoresist on the silicon wafer treated in the step (2);
(4) Performing high-temperature boron diffusion on the front surface of the silicon wafer treated in the step (3) to form a pn junction, then removing borosilicate glass formed in the diffusion process and coiling and plating, and polishing the back surface of the silicon wafer;
(5) Depositing a tunneling oxide layer on the back of the silicon wafer treated in the step (4), then depositing an n-type heavily doped amorphous silicon layer on the tunneling oxide layer, and annealing to form an n-type heavily doped polycrystalline silicon layer;
(6) Depositing an aluminum oxide film and a silicon nitride film on the front surface of the silicon wafer treated in the step (5), and depositing a silicon nitride film on the back surface of the silicon wafer;
(7) And (3) taking the double-sided printing electrode slurry of the silicon wafer treated in the step (6) as a main grid and an auxiliary grid, drying, and sintering at high temperature to form the electrode.
3. The preparation method of the crystalline silicon solar cell with the HJT structure is characterized by comprising the following steps of:
(1) Providing an n-type crystal silicon wafer, and cleaning and texturing;
(2) Forming photoresist on the front side of the obtained silicon wafer by a spin coating or spray coating method to serve as a mask, exposing a region to be treated near the front center line, and forming a pn junction barrier layer in the region to be treated near the front center line of the silicon wafer by a plasma enhanced chemical vapor deposition, conventional chemical vapor deposition, physical vapor deposition, atomic layer deposition, dry oxygen oxidation or wet oxygen oxidation mode;
(3) Removing the photoresist on the silicon wafer treated in the step (2);
(4) Forming an intrinsic amorphous silicon layer or a hydrogenated intrinsic amorphous silicon thin layer on the front side and the back side of the silicon wafer treated in the step (3);
(5) Respectively preparing a p+ type doped amorphous silicon thin layer and an n+ type doped amorphous silicon thin layer on the front side and the back side of the silicon wafer treated in the step (4);
(6) Respectively depositing ITO conductive layers on the front side and the back side of the silicon wafer treated in the step (5);
(7) And (3) printing electrode slurry on the two sides of the silicon wafer treated in the step (6) as a main grid and an auxiliary grid, drying, and performing low-temperature annealing to form good ohmic contact between the electrode and the ITO conductive layer.
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20060037042A (en) * | 2004-10-27 | 2006-05-03 | 삼성에스디아이 주식회사 | Solar cell and fabrication method thereof |
| CN108133976A (en) * | 2018-01-29 | 2018-06-08 | 泰州隆基乐叶光伏科技有限公司 | A kind of monocrystalline mixes gallium back of the body passivating solar battery and preparation method thereof |
| CN108538783A (en) * | 2018-06-15 | 2018-09-14 | 佛山市国星半导体技术有限公司 | A kind of stealthy cutting LED chip and preparation method thereof |
| CN109103242A (en) * | 2018-09-30 | 2018-12-28 | 江苏明芯微电子股份有限公司 | A kind of controlled silicon chip and its production method of punch-through |
| CN112756808A (en) * | 2020-12-31 | 2021-05-07 | 天津爱旭太阳能科技有限公司 | Cutting method for reducing recombination loss of crystalline silicon solar cell |
| CN113161237A (en) * | 2021-04-20 | 2021-07-23 | 江苏韦达半导体有限公司 | Manufacturing process of inner groove mesa process trigger diode chip |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB0820684D0 (en) * | 2008-11-12 | 2008-12-17 | Silicon Cpv Plc | Photovoltaic solar cells |
-
2021
- 2021-10-15 CN CN202111201762.4A patent/CN113964222B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20060037042A (en) * | 2004-10-27 | 2006-05-03 | 삼성에스디아이 주식회사 | Solar cell and fabrication method thereof |
| CN108133976A (en) * | 2018-01-29 | 2018-06-08 | 泰州隆基乐叶光伏科技有限公司 | A kind of monocrystalline mixes gallium back of the body passivating solar battery and preparation method thereof |
| CN108538783A (en) * | 2018-06-15 | 2018-09-14 | 佛山市国星半导体技术有限公司 | A kind of stealthy cutting LED chip and preparation method thereof |
| CN109103242A (en) * | 2018-09-30 | 2018-12-28 | 江苏明芯微电子股份有限公司 | A kind of controlled silicon chip and its production method of punch-through |
| CN112756808A (en) * | 2020-12-31 | 2021-05-07 | 天津爱旭太阳能科技有限公司 | Cutting method for reducing recombination loss of crystalline silicon solar cell |
| CN113161237A (en) * | 2021-04-20 | 2021-07-23 | 江苏韦达半导体有限公司 | Manufacturing process of inner groove mesa process trigger diode chip |
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