CN113937981A - Semiconductor module substrate and electric vehicle - Google Patents
Semiconductor module substrate and electric vehicle Download PDFInfo
- Publication number
- CN113937981A CN113937981A CN202111187498.3A CN202111187498A CN113937981A CN 113937981 A CN113937981 A CN 113937981A CN 202111187498 A CN202111187498 A CN 202111187498A CN 113937981 A CN113937981 A CN 113937981A
- Authority
- CN
- China
- Prior art keywords
- chip
- semiconductor module
- module substrate
- diode
- igbt transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 52
- 239000000758 substrate Substances 0.000 title claims abstract description 49
- 238000003491 array Methods 0.000 claims abstract description 22
- 238000000926 separation method Methods 0.000 claims description 3
- 238000001465 metallisation Methods 0.000 claims 3
- 239000002184 metal Substances 0.000 abstract description 10
- 239000011247 coating layer Substances 0.000 abstract 2
- 238000005253 cladding Methods 0.000 description 8
- 238000010586 diagram Methods 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Inverter Devices (AREA)
Abstract
The invention provides a semiconductor module substrate and an electric vehicle, wherein the semiconductor module substrate comprises a power metal coating layer group and a chip group, and the chip group is arranged on the power metal coating layer group and comprises a first chip module and a second chip module; the first chip module comprises at least one group of first chip arrays, and each first chip array is arranged in a flush mode along the width direction of the semiconductor module substrate; the second chip module comprises at least one group of second chip arrays, and each second chip array is arranged in a flush mode along the width direction of the semiconductor module substrate; the arrangement direction of each first chip array is opposite to the symmetrical arrangement direction of a second chip array which is opposite to the length direction of the semiconductor module substrate and takes the dividing axis as the symmetrical axis. After the technical scheme is adopted, the capability boundary of a product with the semiconductor module substrate is favorably improved, the power density of the product is increased, and meanwhile, the competitiveness of the product is improved.
Description
Technical Field
The present invention relates to the field of semiconductors, and particularly to a semiconductor module substrate and an electric vehicle.
Background
At present, a double-loop IGBT module is often designed on a semiconductor module substrate to filter current.
Due to the influence of the position of a current conversion path and a common source, the conditions that the switching speed of an upper tube is higher and the voltage stress is higher often occur, so that the IGBT module is easy to damage due to overvoltage at low temperature, and for the reason, the scheme that the larger driving resistor is matched to reduce the current change speed is adopted to solve the problem, but the loss is increased by the solution, the efficiency is sacrificed, and the use limit of the module is limited.
In view of the above, a new design circuit for a semiconductor module substrate and an IGBT module thereof is needed to balance the upper and lower tubes from the module body to achieve a greater voltage current utilization rate.
Disclosure of Invention
In order to overcome the above technical defects, an object of the present invention is to provide a semiconductor module substrate and an electric vehicle, which are helpful for improving the filtering performance, reducing the size of the filter, increasing the power density of the product, and improving the competitiveness of the product.
The invention discloses a semiconductor module substrate, which comprises a power metal cladding layer group, an auxiliary metal cladding layer group and a chip group, wherein the power metal cladding layer group, the auxiliary metal cladding layer group and the chip group are laid on the semiconductor module substrate, the chip group is arranged on the power metal cladding layer group,
the chip group comprises a first chip module and a second chip module, and the first chip module and the second chip module are separated by taking the width direction of the semiconductor module substrate as a separation axis;
the first chip module comprises at least one group of first chip arrays, and each first chip array is arranged in a flush mode along the width direction of the semiconductor module substrate;
the second chip module comprises at least one group of second chip arrays, and each second chip array is arranged in a flush mode along the width direction of the semiconductor module substrate;
the arrangement direction of each first chip array is opposite to the symmetrical arrangement direction of a second chip array which is opposite to the length direction of the semiconductor module substrate and takes the dividing axis as the symmetrical axis.
Preferably, the first chip arrays are 3 groups, and the arrangement modes of the adjacent first chip arrays are opposite;
the second chip arrays are 3 groups, and the arrangement mode of the adjacent second chip arrays is opposite.
Preferably, each first chip array comprises a first IGBT transistor and a first diode, the cathode of the first diode is connected to the collector of the first IGBT transistor, and the anode of the first diode is connected to the emitter of the first IGBT transistor;
each second chip array comprises a second IGBT transistor and a second diode, the negative electrode of the second diode is connected with the collector electrode of the second IGBT transistor, and the positive electrode of the second diode is connected with the emitter electrode of the second IGBT transistor.
Preferably, the semiconductor module substrate forms an upper arm turn-off equivalent commutation loop and a lower arm turn-off equivalent commutation loop:
the upper bridge arm turn-off equivalent commutation loop comprises:
a power supply electrically connected to the semiconductor module substrate;
the first IGBT transistor is arranged in the first chip array, and a collector electrode of the first IGBT transistor is connected with a power supply;
the second diode is arranged in the second chip array, and the anode of the second diode is connected with the power supply;
the lower bridge arm turn-off equivalent commutation loop comprises:
the first diode is arranged in the first chip array, and the negative electrode of the first diode is connected with a power supply;
and a collector of the second IGBT transistor arranged in the second chip array is connected with the anode of the first diode, and an emitter of the second IGBT transistor is connected with the power supply.
Preferably, the commutation paths of the upper bridge arm turn-off equivalent commutation loop and the lower bridge arm turn-off equivalent commutation loop are symmetrical.
The invention also discloses an electric vehicle which comprises the motor controller, wherein the motor controller comprises the semiconductor module substrate.
After the technical scheme is adopted, compared with the prior art, the method has the following beneficial effects:
1. the upper bridge arm and the lower bridge arm formed on the semiconductor module substrate have the same current conversion path and the same equivalent stray inductance, so that the formation of voltage spikes is avoided;
2. the switching speeds of the upper tube and the lower tube are consistent, and the voltage overshoots of the upper tube and the lower tube are balanced.
Drawings
FIG. 1 is a schematic structural diagram of a semiconductor module substrate in accordance with a preferred embodiment of the present invention;
fig. 2a is a schematic circuit diagram of an upper bridge arm turn-off equivalent commutation loop in accordance with a preferred embodiment of the present invention;
fig. 2b is a schematic circuit diagram of the lower bridge arm turn-off equivalent commutation loop in a preferred embodiment according to the present invention.
Detailed Description
The advantages of the invention are further illustrated in the following description of specific embodiments in conjunction with the accompanying drawings.
Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the exemplary embodiments below are not intended to represent all implementations consistent with the present disclosure. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present disclosure, as detailed in the appended claims.
The terminology used in the present disclosure is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used in this disclosure and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.
It is to be understood that although the terms first, second, third, etc. may be used herein to describe various information, such information should not be limited to these terms. These terms are only used to distinguish one type of information from another. For example, first information may also be referred to as second information, and similarly, second information may also be referred to as first information, without departing from the scope of the present disclosure. The word "if" as used herein may be interpreted as "at … …" or "when … …" or "in response to a determination", depending on the context.
In the description of the present invention, it is to be understood that the terms "longitudinal", "lateral", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like, indicate orientations or positional relationships based on those shown in the drawings, and are used merely for convenience of description and for simplicity of description, and do not indicate or imply that the referenced devices or elements must have a particular orientation, be constructed in a particular orientation, and be operated, and thus, are not to be construed as limiting the present invention.
In the description of the present invention, unless otherwise specified and limited, it is to be noted that the terms "mounted," "connected," and "connected" are to be interpreted broadly, and may be, for example, a mechanical connection or an electrical connection, a communication between two elements, a direct connection, or an indirect connection via an intermediate medium, and specific meanings of the terms may be understood by those skilled in the art according to specific situations.
In the following description, suffixes such as "module", "component", or "unit" used to denote elements are used only for facilitating the explanation of the present invention, and have no specific meaning in themselves. Thus, "module" and "component" may be used in a mixture.
Fig. 1 is a schematic structural design diagram of a semiconductor module substrate according to a preferred embodiment of the present invention. In this embodiment, the semiconductor module substrate includes a power metal cladding layer group, an auxiliary metal cladding layer group, and a chip group laid on the semiconductor module substrate, and the chip group is arranged on the power metal cladding layer group, and when the semiconductor module substrate is externally connected with a power supply of the main board, the current is turned on and off by the chip group. Specifically, the chip set includes a first chip module and a second chip module, the first chip module and the second chip module are separated by using the width direction of the semiconductor module substrate as a separation axis, that is, the chip set on the semiconductor module substrate is mainly divided into two parts, the first chip module and the second chip module are arranged in a separated manner, and the first chip module and the second chip module are parallel to each other in the width direction (direction of shorter side) of the semiconductor module substrate. When separated, the two have a distance. The first chip module comprises at least one group of first chip arrays, each first chip array is arranged along the width direction of the semiconductor module substrate in a flush mode, so that the first chip module is formed into a form of arranging a plurality of groups of arrays, similarly, the second chip module comprises at least one group of second chip arrays, and each second chip array is arranged along the width direction of the semiconductor module substrate in a flush mode. To achieve symmetry of the up-down tube commutation loop in the semiconductor module substrate, unlike those skilled in the art or thought to be, the arrangement direction of each first chip array is not symmetrical to the arrangement direction of the second chip array, and conversely, is opposite to the symmetrical arrangement direction of a second chip array facing the length direction of the semiconductor module substrate with the dividing axis as the symmetry axis. That is, along the length direction of the semiconductor module substrate, each first chip array is opposite to a second chip array, and the first chip array and the second chip array which are opposite to each other are not axisymmetric with respect to the space between the first chip module and the second chip module, but are opposite to each other in the symmetrical arrangement direction, or in other words, the arrangement direction of the first chip array is completely consistent with the arrangement direction of the second chip array and the arrangement direction of the electronic devices in the first chip array and the second chip array is also completely consistent no matter what electronic devices are arranged in the first chip array and the second chip array.
Through the asymmetrical arrangement mode, the symmetry of the commutation paths is realized, and the mixed feelings formed by the commutation paths of the upper pipe and the lower pipe are the same.
With continued reference to fig. 1, in a preferred embodiment, the first chip arrays are 3 groups, and the arrangement of the adjacent first chip arrays is opposite, and correspondingly, the second chip arrays are 3 groups, and the arrangement of the adjacent second chip arrays is opposite. That is to say, the first chip array and the second chip array are completely the same, and the chip arrays of the adjacent groups are completely opposite, so that the stray inductance generated in the adjacent loops in the first chip module or the second chip module is not completely corresponding, and mutual inductance is prevented.
In a preferred embodiment, each first chip array comprises a first IGBT transistor and a first diode, the cathode of the first diode is connected with the collector of the first IGBT transistor, and the anode of the first diode is connected with the emitter of the first IGBT transistor; each second chip array comprises a second IGBT transistor and a second diode, the negative electrode of the second diode is connected with the collector electrode of the second IGBT transistor, and the positive electrode of the second diode is connected with the emitter electrode of the second IGBT transistor. After the first chip array and the second chip array have the above configuration, when the upper bridge arm turn-off equivalent commutation loop and the lower bridge arm turn-off equivalent commutation loop are formed, referring to fig. 2a and 2b, a power supply, a first IGBT transistor in the first chip array, and a second diode in the second chip array are formed, where the upper bridge arm turn-off equivalent commutation loop is formed, the power supply is electrically connected to the semiconductor module substrate, a collector of the first IGBT transistor is connected to the power supply, and an anode of the second diode is connected to the power supply, and thus, a loop cost of the upper bridge arm turn-off equivalent commutation loop includes a circuit cost from the second chip module direction, and a circuit cost of the first IGBT transistor, the second diode, and a circuit cost of returning to the second chip module direction. Correspondingly, a power supply, a second IGBT transistor in a second chip array and a first diode in a first chip array are formed for the lower bridge arm to turn off the equivalent commutation loop, the negative electrode of the first diode is connected with the power supply, the collector electrode of the second IGBT transistor is connected with the positive electrode of the first diode, and the emitter electrode of the second IGBT transistor is connected with the power supply. Therefore, the loop costs of the upper bridge arm cut-off equivalent commutation loop and the lower bridge arm cut-off equivalent commutation loop are equal, and as for the commutation paths, the commutation paths of the upper bridge arm cut-off equivalent commutation loop and the lower bridge arm cut-off equivalent commutation loop are symmetrical, so that the loop impurity inductance is reduced, and the balance of an upper tube and a lower tube is realized.
After the semiconductor module is sunk, the semiconductor module can be applied to a motor controller and installed in an electric vehicle for use.
It should be noted that the embodiments of the present invention have been described in terms of preferred embodiments, and not by way of limitation, and that those skilled in the art can make modifications and variations of the embodiments described above without departing from the spirit of the invention.
Claims (6)
1. A semiconductor module substrate comprising a power metallization group, an auxiliary metallization group and a chipset arranged on the semiconductor module substrate, the chipset being arranged on the power metallization group,
the chip group comprises a first chip module and a second chip module, and the first chip module and the second chip module are separated by taking the width direction of the semiconductor module substrate as a separation axis;
the first chip module comprises at least one group of first chip arrays, and each first chip array is arranged in a flush mode along the width direction of the semiconductor module substrate;
the second chip module comprises at least one group of second chip arrays, and each second chip array is arranged in a flush mode along the width direction of the semiconductor module substrate;
the arrangement direction of each first chip array is opposite to the symmetrical arrangement direction of a second chip array which is opposite to the length direction of the semiconductor module substrate and takes the dividing axis as the symmetrical axis.
2. The semiconductor module substrate of claim 1,
the first chip arrays are 3 groups, and the arrangement modes of the adjacent first chip arrays are opposite;
the second chip arrays are 3 groups, and the arrangement modes of the adjacent second chip arrays are opposite.
3. The semiconductor module substrate of claim 1,
each first chip array comprises a first IGBT transistor and a first diode, wherein the cathode of the first diode is connected with the collector of the first IGBT transistor, and the anode of the first diode is connected with the emitter of the first IGBT transistor;
each second chip array comprises a second IGBT transistor and a second diode, the negative electrode of the second diode is connected to the collector electrode of the second IGBT transistor, and the positive electrode of the second diode is connected to the emitter electrode of the second IGBT transistor.
4. The semiconductor module substrate of claim 3,
the semiconductor module substrate forms an upper bridge arm turn-off equivalent commutation loop and a lower bridge arm turn-off equivalent commutation loop:
the upper bridge arm turn-off equivalent commutation loop comprises:
a power supply electrically connected to the semiconductor module substrate;
the first IGBT transistor is arranged in the first chip array, and a collector electrode of the first IGBT transistor is connected with the power supply;
the second diode is arranged in the second chip array, and the anode of the second diode is connected with the power supply;
the lower bridge arm turn-off equivalent commutation loop comprises:
the first diode is arranged in the first chip array, and the negative electrode of the first diode is connected with the power supply;
and a collector of the second IGBT transistor arranged in the second chip array is connected with the anode of the first diode, and an emitter of the second IGBT transistor is connected with the power supply.
5. The semiconductor module substrate according to claim 4, wherein the commutation paths of the upper arm turn-off equivalent commutation loop and the lower arm turn-off equivalent commutation loop are symmetrical.
6. An electric vehicle comprising a motor controller, characterized in that the motor controller comprises the semiconductor module substrate according to any one of claims 1 to 5.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111187498.3A CN113937981A (en) | 2021-10-12 | 2021-10-12 | Semiconductor module substrate and electric vehicle |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111187498.3A CN113937981A (en) | 2021-10-12 | 2021-10-12 | Semiconductor module substrate and electric vehicle |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN113937981A true CN113937981A (en) | 2022-01-14 |
Family
ID=79278375
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111187498.3A Pending CN113937981A (en) | 2021-10-12 | 2021-10-12 | Semiconductor module substrate and electric vehicle |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113937981A (en) |
Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101378040A (en) * | 2007-08-31 | 2009-03-04 | 三菱电机株式会社 | Semiconductor device |
| CN103022022A (en) * | 2012-12-25 | 2013-04-03 | 浙江大学 | Low-parasitic-inductance IGBT (insulated gate bipolar translator) power module |
| JP2015018943A (en) * | 2013-07-11 | 2015-01-29 | 株式会社 日立パワーデバイス | Power semiconductor module and power conversion device using the same |
| JP2017208987A (en) * | 2016-05-20 | 2017-11-24 | 三菱電機株式会社 | Power converter |
| CN207250508U (en) * | 2017-08-15 | 2018-04-17 | 臻驱科技（上海）有限公司 | A kind of low spurious Inductor substrate and its power semiconductor modular |
| CN108447847A (en) * | 2018-06-06 | 2018-08-24 | 臻驱科技（上海）有限公司 | A kind of power semiconductor modular substrate and power semiconductor modular |
| CN108447846A (en) * | 2018-06-06 | 2018-08-24 | 臻驱科技（上海）有限公司 | A kind of power semiconductor modular substrate and power semiconductor modular |
| CN109155298A (en) * | 2016-05-24 | 2019-01-04 | 三菱电机株式会社 | The method of power module and manufacture power module |
| CN208861980U (en) * | 2018-09-13 | 2019-05-14 | 比亚迪股份有限公司 | Power module assembly, power semiconductor modular and vehicle |
| CN110491868A (en) * | 2018-05-14 | 2019-11-22 | 福特全球技术公司 | Direct copper power module with raised common source inductance |
| US20200091130A1 (en) * | 2018-09-14 | 2020-03-19 | Fuji Electric Co., Ltd. | Semiconductor module |
| CN111524871A (en) * | 2020-04-10 | 2020-08-11 | 湖南国芯半导体科技有限公司 | Power module |
-
2021
- 2021-10-12 CN CN202111187498.3A patent/CN113937981A/en active Pending
Patent Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101378040A (en) * | 2007-08-31 | 2009-03-04 | 三菱电机株式会社 | Semiconductor device |
| CN103022022A (en) * | 2012-12-25 | 2013-04-03 | 浙江大学 | Low-parasitic-inductance IGBT (insulated gate bipolar translator) power module |
| JP2015018943A (en) * | 2013-07-11 | 2015-01-29 | 株式会社 日立パワーデバイス | Power semiconductor module and power conversion device using the same |
| JP2017208987A (en) * | 2016-05-20 | 2017-11-24 | 三菱電機株式会社 | Power converter |
| CN109155298A (en) * | 2016-05-24 | 2019-01-04 | 三菱电机株式会社 | The method of power module and manufacture power module |
| CN207250508U (en) * | 2017-08-15 | 2018-04-17 | 臻驱科技（上海）有限公司 | A kind of low spurious Inductor substrate and its power semiconductor modular |
| CN110491868A (en) * | 2018-05-14 | 2019-11-22 | 福特全球技术公司 | Direct copper power module with raised common source inductance |
| CN108447847A (en) * | 2018-06-06 | 2018-08-24 | 臻驱科技（上海）有限公司 | A kind of power semiconductor modular substrate and power semiconductor modular |
| CN108447846A (en) * | 2018-06-06 | 2018-08-24 | 臻驱科技（上海）有限公司 | A kind of power semiconductor modular substrate and power semiconductor modular |
| CN208861980U (en) * | 2018-09-13 | 2019-05-14 | 比亚迪股份有限公司 | Power module assembly, power semiconductor modular and vehicle |
| US20200091130A1 (en) * | 2018-09-14 | 2020-03-19 | Fuji Electric Co., Ltd. | Semiconductor module |
| CN111524871A (en) * | 2020-04-10 | 2020-08-11 | 湖南国芯半导体科技有限公司 | Power module |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US11532538B2 (en) | Component structure, power module and power module assembly structure | |
| KR100461131B1 (en) | Inverter module | |
| US20090294847A1 (en) | Plasma Display Apparatus | |
| US20150270786A1 (en) | Semiconductor device | |
| CN103296016A (en) | Semiconductor module | |
| US9607931B2 (en) | Semiconductor device for suppressing a temperature increase in beam leads | |
| CN105374808B (en) | A kind of power module | |
| JP2001274322A (en) | Power semiconductor module | |
| CN110690278B (en) | Insulated gate bipolar transistor and preparation method thereof | |
| CN115513166A (en) | Low inductance power module | |
| CN105374811B (en) | A kind of power module | |
| US12014973B2 (en) | Multi-die-package and method | |
| JP2005287267A (en) | Power converting device | |
| CN113937981A (en) | Semiconductor module substrate and electric vehicle | |
| CN109768039A (en) | A kind of two-side radiation power module | |
| US20030002311A1 (en) | Power converter | |
| CN105374803B (en) | A kind of power module | |
| JP2015154001A (en) | semiconductor module | |
| CN205140972U (en) | Power module | |
| CN214203683U (en) | Multi-chip parallel power module | |
| CN205140970U (en) | Power module | |
| CN112864142A (en) | Multi-chip parallel power module | |
| CN208589440U (en) | A kind of DBC substrate for power electronic devices MOS module | |
| CN218827132U (en) | Enhanced power module and power module | |
| CN116761372B (en) | High-speed motor controller low parasitic inductance main topological structure based on silicon carbide device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |