CN113933677B - SiC MOSFET device grid aging monitoring circuit and online monitoring method - Google Patents
SiC MOSFET device grid aging monitoring circuit and online monitoring method Download PDFInfo
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- CN113933677B CN113933677B CN202111248678.8A CN202111248678A CN113933677B CN 113933677 B CN113933677 B CN 113933677B CN 202111248678 A CN202111248678 A CN 202111248678A CN 113933677 B CN113933677 B CN 113933677B
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- 238000012544 monitoring process Methods 0.000 title claims abstract description 156
- 230000032683 aging Effects 0.000 title claims abstract description 87
- 238000000034 method Methods 0.000 title claims abstract description 24
- 238000005070 sampling Methods 0.000 claims abstract description 8
- 238000012360 testing method Methods 0.000 claims description 12
- 230000036541 health Effects 0.000 claims description 10
- 238000012806 monitoring device Methods 0.000 claims description 9
- 230000008859 change Effects 0.000 claims description 6
- 230000008569 process Effects 0.000 claims description 5
- 230000002093 peripheral effect Effects 0.000 claims description 4
- 238000002474 experimental method Methods 0.000 claims description 3
- 230000035882 stress Effects 0.000 claims description 3
- 238000011156 evaluation Methods 0.000 claims description 2
- 230000008646 thermal stress Effects 0.000 claims description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 64
- 229910010271 silicon carbide Inorganic materials 0.000 description 62
- 238000010586 diagram Methods 0.000 description 8
- 239000004065 semiconductor Substances 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 3
- 238000012423 maintenance Methods 0.000 description 3
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- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000032798 delamination Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2601—Apparatus or methods therefor
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2607—Circuits therefor
- G01R31/2621—Circuits therefor for testing field effect transistors, i.e. FET's
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2607—Circuits therefor
- G01R31/2621—Circuits therefor for testing field effect transistors, i.e. FET's
- G01R31/2628—Circuits therefor for testing field effect transistors, i.e. FET's for measuring thermal properties thereof
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- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The invention discloses an aging monitoring circuit and an online monitoring method for a SiC MOSFET gate, wherein the monitoring circuit comprises a conventional driving circuit, a monitoring driving circuit, a sampling and logic operation circuit and a control unit; the monitoring method comprises the following steps: when the device to be tested works normally, the device is controlled to be turned on and off by the conventional drive; when the device to be tested is in an off state and the gate aging monitoring is implemented, the circuit is switched from the conventional driving to the monitoring driving to charge the gate; when the gate voltage reaches a set value, the logic operation circuit turns off the monitoring drive and generates a charging time signal to be transmitted to the control unit, and the control unit captures the duration of the effective level of the charging time signal, wherein the charging time is used as the characteristic quantity of gate aging and is used for monitoring the gate aging state. The invention can not influence the normal operation of devices and devices, can realize the on-line monitoring of the gate aging, solves the problem that most gate aging monitoring methods are difficult to implement on line, and effectively avoids the economic loss caused by shutdown monitoring.
Description
Technical Field
The invention relates to the technical field of power semiconductor device monitoring, in particular to a silicon carbide (SiC) MOSFET device monitoring circuit and an on-line monitoring method.
Background
With the rapid development of semiconductor technology and power electronics technology, semiconductor power devices are widely used in various fields such as new energy power generation, rail transit, consumer electronics and the like. The development trends of high frequency, high power density and the like of power electronic technology put higher demands on semiconductor power devices, and third-generation power semiconductor devices such as SiC and the like are also rapidly developed. Among them, silicon carbide (SiC) MOSFET has advantages of high temperature resistance, high voltage resistance, low loss, and fast switching speed, etc., thus has great application prospect and industrial value. However, the problem of reliability of the grid electrode of the SiC MOSFET is remarkable, and the grid electrode can be aged or even disabled when the SiC MOSFET is subjected to stress in long-term operation, so that the reliability and stability of a power electronic system are seriously affected.
The grid health level of the SiC MOSFET device is related to the parasitic parameter of the SiC MOSFET device, so that the aging state of the device is judged by monitoring the change of the parasitic parameter of the SiC MOSFET device, and a reasonable maintenance plan of the power electronic device can be formulated. However, the method for monitoring the gate state of the SiC MOSFET in the prior art is complex and has high cost, and the SiC MOSFET device needs to be stopped or disassembled; and the shutdown overhauling can cause huge economic loss, and the disassembly work can also cause certain damage to the SiC MOSFET device, thereby influencing the monitoring precision.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides the grid aging circuit of the SiC MOSFET device and the on-line monitoring method thereof, which can accurately monitor the grid aging state of the SiC MOSFET device under the condition of no shutdown and no disassembly, thereby accurately judging the grid aging state of the SiC MOSFET device, effectively avoiding the economic loss caused by shutdown monitoring and the influence on the measurement result caused by the damage of the disassembled SiC MOSFET device, reducing the operation and maintenance cost of SiC MOSFET application equipment (such as a converter and the like) and improving the reliability of the equipment.
The invention adopts the following technical scheme: the grid aging monitoring circuit of the SiC MOSFET device is characterized by comprising a conventional driving circuit, a monitoring driving circuit, a sampling circuit and a logic operation circuit, wherein the sampling circuit and the logic operation circuit form a comprehensive monitoring driving circuit; a controller sends out a control instruction to realize normal driving and gate aging monitoring of the SiC MOSFET device;
The integrated monitoring driving circuit of the SiC MOSFET is provided with four signal input ports and an output port, wherein the four signal input ports are a working signal port S n and a monitoring signal port S c respectively, a driving switching signal port S p and a charging time signal port S d, and one output port is a driving port and is connected to the grid electrode of the SiC MOSFET device; the controller is connected with four input ports of the comprehensive monitoring driving circuit, and an output port of the comprehensive monitoring driving circuit outputs driving signals to the SiC MOSFET device.
Further, the conventional driving circuit and the monitoring driving circuit are different in an off-voltage value and an on-driving resistance value; the turn-off voltage value of the conventional drive circuit is determined by the recommended value of the data manual of the monitoring device, and the turn-on drive resistance value is determined according to dynamic indexes such as the switching speed and the like, and is generally several omega to tens of omega; the turn-off voltage value of the monitoring driving circuit is determined by the grid aging sensitive interval of the monitoring device, and meanwhile, the maximum negative voltage value allowed by a data manual cannot be exceeded, and the turn-on driving resistance value of the monitoring driving circuit is designed according to the input capacitance and the expected charging time value of the specific monitoring device, and is generally in the k omega level.
The controller is provided with a pulse time capturing module, a digital signal controller with the model TMS320F28035 of TI company or similar high-precision products can be selected, the high-precision pulse width capturing module (HRCAP) with the precision of 300ps is mounted, and the pulse width time of the charging time signal S d can be accurately measured.
The total time of the monitoring process is smaller than the turn-off time of the device, so that the normal operation of the SiC MOSFET device is ensured to be monitored, and the gate charging time can be adjusted through the turn-on driving resistance of the monitoring driving circuit.
Meanwhile, the invention also provides an on-line monitoring method for the aging of the grid electrode of the SiC MOSFET, which adopts the monitoring circuit for the aging of the grid electrode of the SiC MOSFET device, and a controller sends out a control instruction to realize the normal driving and the monitoring for the aging of the grid electrode of the SiC MOSFET device; four signal input ports of the comprehensive monitoring driving circuit are connected with the controller, and an output port of the comprehensive monitoring driving circuit is connected to the grid electrode of the SiC MOSFET device to be tested; the monitoring method comprises the following steps:
when the device to be tested works normally, the device is controlled to be turned on and off by the conventional drive;
When the device to be tested is in an off state and the gate aging monitoring is implemented, the circuit is switched from the conventional driving to the monitoring driving to charge the gate; when the gate voltage reaches a set value, the logic operation circuit turns off the monitoring drive and generates a charging time signal to be transmitted to the control unit, and the control unit captures the duration time (defined as charging time) of the effective level of the charging time signal, wherein the charging time is used as the characteristic quantity of the gate aging and can be used for monitoring the gate aging state.
Further, the controller inputs a conventional driving signal to the driving circuit, and the conventional driving circuit works at the moment to control and monitor the normal work of the SiC MOSFET device;
When the monitoring SiC MOSFET device is in an off state, the controller inputs a monitoring driving signal to the driving circuit, and the monitoring driving circuit works at the moment, so that the off voltage of the monitoring device is adjusted to a monitoring voltage V EE and the grid electrode of the device is charged, and the grid electrode voltage is continuously increased; when the grid voltage reaches the set voltage V ref, the logic operation circuit sends a turn-off signal to the monitoring drive, generates a grid charging time signal S d and feeds the grid charging time signal back to the controller;
the controller captures the charging time signal and measures the duration of the effective level (defined as charging time), and the aging state of the grid electrode of the SiC MOSFET device to be detected can be judged according to the charging time value. The specific evaluation method is as follows:
The gate aging of the SiC MOSFET device can be simulated through a high-temperature gate bias accelerated aging test, and the gate aging of the SiC MOSFET to be tested is accelerated by applying gate stress and thermal stress to the SiC MOSFET to be tested;
before the test starts, placing the device to be tested into a comprehensive monitoring driving circuit to measure the charging time value of the grid electrode in the health state as a reference value; in the accelerated aging test process, aging is stopped at intervals, a device to be tested is put into a comprehensive monitoring driving circuit, and the charging time of the device after aging is measured; when obvious leakage current I gss appears on the grid electrode of the SiC MOSFET device to be tested (I gss is in nA level under the healthy state of the grid electrode, I gss is in mA level or above when the grid electrode is seriously aged or failed), the grid electrode of the device is considered to be seriously aged and is close to failure, at the moment, the accelerated aging test is stopped, and the charging time value measured last time before the failure of the grid electrode of the device is used as a grid electrode failure threshold value; comparing the charging time reference value with the failure threshold value, and performing interval subdivision to obtain charging time ranges of the grid electrode of the SiC MOSFET device under different health grades;
When the SiC MOSFET device to be tested is used for an actual device, firstly, measuring the charging time under the healthy state of a grid electrode as a reference; in the running process of the device, the charging time is measured regularly according to the requirement and is compared with a reference value and a failure threshold value, so that the health state of the grid electrode of the SiC MOSFET device is judged.
In the invention, the total time of the monitoring process is smaller than the turn-off time of the device, so that the normal work of the SiC MOSFET device is ensured to be monitored, and the gate charging time can be adjusted by monitoring the turn-on driving resistance of the driving circuit.
Further, the monitor voltage V EE and the set voltage V ref are determined by the gate aging sensitive voltage interval of the monitor device, and are specifically as follows:
Monitoring a C iss-Vgs characteristic curve (drain electrode is subjected to high voltage and grid electrode is subjected to negative voltage) of the SiC MOSFET device to be tested under different ageing states through a grid electrode accelerated ageing experiment; and determining an aging sensitive voltage interval according to the change condition of the C iss-Vgs characteristic curve before and after aging, and determining the voltage interval during monitoring by combining the allowable range of the negative voltage of the grid electrode provided by a device manufacturer. The smaller value of the aging sensitive voltage interval is V EE, and the larger value is the set voltage V ref.
The circuits and methods of the present invention are applicable in-line to a variety of devices including SiC MOSFET devices.
Compared with the prior art, the invention has the following beneficial effects:
1. the SiC MOSFET device gate aging monitoring circuit has complete functions and simple structure; meanwhile, the device has two functions of aging monitoring and conventional driving, and can be directly used as a gate driver; the provided monitoring circuit can extract aging characteristic quantity and monitor the aging of the grid electrode in the turn-off process of the device without affecting the normal operation of the device, thereby realizing on-line monitoring.
2. The monitoring circuit has ingenious conception and reasonable design, and the monitoring result is little influenced by the coupling of other physical quantities, and has three specific points: 1) The provided aging characteristic quantity (namely charging time) is insensitive to temperature change, so that the monitoring result is little influenced by the fluctuation of the junction temperature of the device; 2) The device is in an off state in the monitoring process, so that the monitoring result is not influenced by the working current of the device; 3) The provided burn-in characteristics are not affected by device package burn-in (e.g., bond wire delamination, solder layer burn-in, etc.). Therefore, the monitoring circuit can accurately monitor the health state of the grid electrode of the device under the conditions of unknown junction temperature, unknown load working condition and unknown encapsulation aging state of the device.
2. The on-line monitoring method for the aging of the grid electrode of the SiC MOSFET device can accurately monitor the aging state of the grid electrode of the SiC MOSFET device under the conditions of no shutdown and no disassembly, and the aging state of the device is judged through the change of parasitic parameters, so that the aging state of the grid electrode of the SiC MOSFET device is accurately judged, the economic loss caused by shutdown monitoring and the influence on the measurement result caused by the damage of the disassembled SiC MOSFET device are effectively avoided, the operation and maintenance cost of SiC MOSFET application equipment (such as a converter and the like) is reduced, and the reliability of the equipment is improved.
Drawings
Fig. 1 is a schematic diagram of a monitoring circuit according to the present invention.
Fig. 2 is a schematic diagram of characteristic measurement of the SiC MOSFET device C iss-Vgs.
FIG. 3 is a timing diagram of the monitoring signal according to the present invention.
Fig. 4 is a graph of experimental waveforms of the present invention applied to a Boost converter.
Fig. 5 is an enlarged view of the waveform of the monitoring phase of fig. 4.
Detailed Description
The invention is described in further detail below with reference to the drawings and examples.
As shown in FIG. 1, the invention provides a gate aging monitoring circuit of a SiC MOSFET device, which comprises a conventional driving circuit, a monitoring driving circuit, a sampling circuit and a logic operation circuit, wherein the four circuits form a comprehensive monitoring driving circuit, and a controller sends out a control instruction to realize normal driving and gate aging monitoring of the SiC MOSFET device. The conventional driving circuit and the monitor driving circuit are different in the off-voltage value and the on-driving resistance value.
The SiC MOSFET monitoring driving circuit is provided with four signal input ports and an output port, wherein the three signal input ports are respectively a working signal port S n, a monitoring signal port S c, a driving switching signal port S p and a charging time signal port S d, and one output port is a driving port; the controller is connected with four input ports of the comprehensive monitoring driving circuit, and an output port of the SiC MOSFET comprehensive monitoring driving circuit outputs driving signals to the SiC MOSFET device.
Referring to fig. 1, the conventional driving circuit is composed of an isolated gate driver and a peripheral power supply circuit, an input signal S n of the driver is sent by a controller, and an output end of the driver is connected to one of input ends of a single pole double throw switch; the monitoring driving circuit consists of an isolated gate driver and a peripheral power supply circuit, an input signal S d of the driver is sent out by a logic operation circuit, and the output end of the driver is connected to the other input end of the single-pole double-throw switch; the turn-off voltage values of the conventional driving circuit and the monitoring driving circuit are-4V-0V and-10V-6V respectively, and the turn-on driving resistance values are several omega-tens omega and several komega respectively; an input signal S p of the single pole double throw switch is sent by the controller to select the normal drive or the monitoring drive; the sampling circuit is formed by cascading a buffer, a comparator and a digital isolator, and the output of the isolator is connected to the input end of the logic operation circuit; the logic operation circuit is formed by cascading an SR latch and an AND gate, wherein the input end R of the SR latch is the output of the isolator, the input end S is a signal S c sent by the controller, and the output end Q is connected to one of the input ends of the AND gate; the other input end of the AND gate is a signal S c sent by the controller, the output signal of the AND gate is S d, and the output signal of the AND gate is connected to the input end of the monitoring driving circuit and fed back to the controller.
The controller is provided with a pulse time capturing module, such as a digital signal controller with the model TMS320F28035 of TI company, and is provided with a high-precision pulse width capturing module (HRCAP) with the precision of 300ps, so that the pulse width time of the charging time signal S d can be accurately measured.
The total monitoring process time of the SiC MOSFET monitoring driving circuit is smaller than the device turn-off time, so that the normal work of the SiC MOSFET device is ensured, and the grid charging time can be adjusted through the turn-on driving resistance of the monitoring driving circuit.
The invention also provides a method for monitoring the aging of the grid electrode of the SiC MOSFET by adopting the monitoring circuit, and the monitoring circuit is integrated into the grid electrode driving circuit to realize the normal operation of the SiC MOSFET device and the monitoring of the aging of the grid electrode. The comprehensive monitoring driving circuit comprises a monitoring module and a driving module, and the monitoring method comprises the following steps:
The controller inputs a conventional driving signal to the driving circuit, and the conventional driving circuit works at the moment to control and monitor the normal work of the SiC MOSFET device;
When the monitoring SiC MOSFET device is in an off state, the controller inputs a monitoring driving signal to the driving circuit, and the monitoring driving circuit works at the moment, adjusts the off voltage of the monitoring device to a monitoring voltage V EE and charges the grid electrode of the device, so that the grid electrode voltage is continuously increased; when the gate voltage reaches the set voltage V ref, the logic operation circuit sends a turn-off signal to the monitor drive, generates a gate charging time signal S d, and feeds back to the controller.
The controller captures the charging time signal and measures the duration of the effective level, and the aging state of the grid electrode of the SiC MOSFET device to be detected can be judged according to the charging time value. The smaller value of the voltage interval is V EE, and the larger value is the set voltage V ref. The monitor voltage V EE and the set voltage V ref are determined by the gate aging sensitive voltage interval of the monitor device, and are specifically as follows:
Through a grid accelerated aging experiment, the C iss-Vgs characteristic curve (drain electrode is high-voltage and grid electrode is negative-voltage) of the SiC MOSFET device to be tested under different aging states is monitored, and a measuring circuit is shown in figure 2. And determining an aging sensitive voltage interval according to the change condition of the C iss-Vgs characteristic curve before and after aging, and determining the voltage interval during monitoring by combining the allowable range of the negative voltage of the grid electrode provided by a device manufacturer. When the gate voltage reaches a set value, the logic operation circuit turns off the monitoring drive and generates a charging time signal to be transmitted to the control unit, and the control unit captures the duration time (defined as charging time) of the effective level of the charging time signal, wherein the charging time is used as the characteristic quantity of the gate aging and can be used for monitoring the gate aging state. The monitoring method is carried out in the turn-off state of the SiC MOSFET, so that the normal operation of devices and devices is not affected, the on-line monitoring of the gate aging can be realized, the problem that most of gate aging monitoring methods are difficult to implement on line is solved, and the economic loss caused by shutdown monitoring is effectively avoided.
Referring to fig. 3, the monitoring method is illustrated in conjunction with a timing diagram:
Stage t 0~t1: s n is high, and S c and S p are low. The single pole double throw switch is toggled to a conventional drive to control the device to turn on. Since the gate voltage V gs is greater than the set voltage V ref, the input terminal R of the latch is low, and the other input terminal S is also low, at which time the latch output signal level is unknown. However, since S c is low, and gate output signal S d is low.
Stage t 1~t2: s n,Sc and S p are both low. The device under test is turned off by conventional driving. At this stage, the gate voltage V gs is still greater than the set voltage V ref, so the latch input R is low and the latch output signal Q is unknown. Since S c is still low, S d is also low. The purpose of this stage is to ensure a stable turn-off of the device under test.
Stage t 2~t3: s n and S c are low, and S p is high. The single pole double throw switch dials to monitor drive, at which time V gs drops to monitor voltage V EE. Since V gs is smaller than V EE, latch input R is high. Since the other input S of the latch is low, the latch output Q is high in preparation for the next stage of monitoring. And gate output S d remains low.
Stage t 3~t4: s n remains low and S c goes high. Because S c and the latch output Q are both high level, the AND gate output end S d is changed from low level to high level, the monitoring drive is controlled to turn on the device to be tested, and the gate voltage V gs starts to rise. When V gs reaches the set voltage V ref, the comparator operates, the latch input terminal R changes from high to low, and the output terminal Q changes from high to low. S d is automatically changed from high level to low level, and the monitoring drive is controlled to turn off the device to be tested. V gs drops to V EE and the latch input R goes from low to high. Since S c holds high, the latch output Q holds low. The signal S d is fed back to the controller. The capture module of the controller measures S d the duration of the high level, i.e., the gate charge time.
Stage t 4~t5: this stage is used as a monitor time margin, and the state of the signal is the same as in the previous stage.
Stage t 5~t6: s n,Sc and S p are both low. The single-pole double-throw switch is driven to normal, and the device to be tested keeps the off state and waits for the next operation period. The gate voltage V gs returns to the normal off voltage.
Referring to fig. 4, the invention is applied to an experimental waveform diagram in a Boost converter, and as can be seen from the diagram, the comprehensive monitoring driving circuit can control the normal operation of the SiC MOSFET device in an actual device; meanwhile, when the device is in an off state, the controller sends out a monitoring instruction to control the monitoring driving circuit to monitor the grid state of the SiC MOSFET.
Fig. 5 is an enlarged waveform diagram of the monitoring stage in fig. 4, and it can be seen from the diagram that, when the gate state is monitored, the gate voltage is changed from the normal driving off voltage (-4V) to the monitoring driving off voltage (-6V), and after the voltage is stabilized, the charging of the gate of the device is started, and the gate charging speed is slow due to the large on resistance of the monitoring driving circuit; when the grid voltage reaches a set value V ref (-5V), the logic operation circuit acts to automatically turn off the monitoring drive circuit and turn into a conventional drive circuit, and meanwhile, a charging time signal is output and fed back to the controller. After the monitoring process is finished, the device is still in an off state, so that the normal operation of the device is not affected.
The controller captures the pulse width of the charging time signal to obtain a charging time value, and combines the failure threshold value obtained by the grid accelerated aging test and the measured reference value under the health state to judge the grid health state of the device.
In the invention, the total time of the monitoring process is smaller than the turn-off time of the device, so that the normal work of the SiC MOSFET device is ensured to be monitored, and the gate charging time can be adjusted by monitoring the turn-on driving resistance of the driving circuit. Therefore, the method does not affect the normal operation of the device under test and the equipment.
Finally, it should be noted that the above embodiments are only for illustrating the technical solution of the present invention and not for limiting the technical solution, and those skilled in the art should understand that modifications and equivalents may be made to the technical solution of the present invention without departing from the spirit and scope of the present invention, and all such modifications and equivalents are included in the scope of the claims.
Claims (9)
1. The grid aging monitoring circuit of the SiC MOSFET device is characterized by comprising a conventional driving circuit, a monitoring driving circuit, a sampling circuit and a logic operation circuit, wherein the sampling circuit and the logic operation circuit form a comprehensive monitoring driving circuit; a controller sends out a control instruction to realize normal driving and gate aging monitoring of the SiC MOSFET device;
The integrated monitoring driving circuit of the SiC MOSFET is provided with four signal input ports and an output port, wherein the four signal input ports are a working signal port S n and a monitoring signal port S c respectively, a driving switching signal port S p and a charging time signal port S d, and one output port is a driving port and is connected to the grid electrode of the SiC MOSFET device; the controller is connected with four input ports of the comprehensive monitoring driving circuit, and an output port of the comprehensive monitoring driving circuit outputs a driving signal to the SiC MOSFET device;
the conventional driving circuit consists of an isolated gate driver and a peripheral power supply circuit, an input signal S n of the driver is sent out by a controller, and the output end of the driver is connected to one of the input ends of the single-pole double-throw switch; the monitoring driving circuit consists of an isolated gate driver and a peripheral power supply circuit, an input signal S d of the driver is sent out by a logic operation circuit, and the output end of the driver is connected to the other input end of the single-pole double-throw switch; the turn-off voltage values of the conventional driving circuit and the monitoring driving circuit are-4V-0V and-10V-6V respectively, and the turn-on driving resistance values are several omega-tens omega and several komega respectively; an input signal S p of the single pole double throw switch is sent by the controller to select the normal drive or the monitoring drive; the sampling circuit is formed by cascading a buffer, a comparator and a digital isolator, and the output of the isolator is connected to the input end of the logic operation circuit; the logic operation circuit is formed by cascading an SR latch and an AND gate, wherein the input end R of the SR latch is the output of the isolator, the input end S is a signal S c sent by the controller, and the output end Q is connected to one of the input ends of the AND gate; the other input end of the AND gate is a signal S c sent by the controller, the output signal of the AND gate is S d, and the output signal of the AND gate is connected to the input end of the monitoring driving circuit and fed back to the controller;
When the device to be tested is in an off state and the gate aging monitoring is implemented, the circuit is switched from the conventional driving to the monitoring driving to charge the gate; when the gate voltage reaches a set value, the logic operation circuit turns off the monitoring drive and generates a charging time signal to be transmitted to the control unit, the control unit captures the duration of the effective level of the charging time signal, the duration is defined as charging time, and the charging time is used as the characteristic quantity of gate aging and is used for monitoring the gate aging state.
2. The SiC MOSFET device gate burn-in monitoring circuit of claim 1, wherein the conventional drive circuit and the monitor drive circuit differ in an off-voltage value and an on-drive resistance value; the turn-off voltage value of the conventional drive circuit is determined by the recommended value of the data manual of the monitoring device, and the turn-on drive resistance value is determined according to the switching speed and is several omega-tens omega; the turn-off voltage value of the monitoring driving circuit is determined by the grid aging sensitive interval of the monitoring device, and meanwhile, the maximum negative voltage value allowed by a data manual cannot be exceeded, and the turn-on driving resistance value of the monitoring driving circuit is required to be designed according to the input capacitance and the expected charging time value of the specific monitoring device and is of a k omega level.
3. The SiC MOSFET device gate aging monitor circuit of claim 1, wherein the controller has a pulse time capturing module, and selects a digital signal controller of model TMS320F28035 from TI company, which carries a high-precision pulse width capturing module with a precision up to 300ps, and accurately measures the pulse width time of the charging time signal S d.
4. The SiC MOSFET device gate burn-in monitoring circuit of claim 1 wherein the total monitoring process time is less than the device off time to ensure proper operation of the SiC MOSFET device, and the gate charge time is adjustable by monitoring the on drive resistance of the drive circuit.
5. The SiC MOSFET device gate burn-in monitoring circuit of claim 1; the method is characterized in that a controller sends out a control instruction to realize normal driving and gate aging monitoring of the SiC MOSFET device; four signal input ports of the comprehensive monitoring driving circuit are connected with the controller, and an output port of the comprehensive monitoring driving circuit is connected to the grid electrode of the SiC MOSFET device to be tested.
6. The SiC MOSFET gate aging monitor circuit of claim 1,
The controller inputs a conventional driving signal to the driving circuit, and the conventional driving circuit works at the moment to control and monitor the normal work of the SiC MOSFET device;
When the monitoring SiC MOSFET device is in an off state, the controller inputs a monitoring driving signal to the driving circuit, and the monitoring driving circuit works at the moment, so that the off voltage of the monitoring device is adjusted to a monitoring voltage V EE and the grid electrode of the device is charged, and the grid electrode voltage is continuously increased; when the grid voltage reaches the set voltage V ref, the logic operation circuit sends a turn-off signal to the monitoring drive, generates a grid charging time signal S d and feeds the grid charging time signal back to the controller;
The controller captures a charging time signal and measures the duration of the effective level, the duration is defined as charging time, and the gate aging state of the SiC MOSFET device to be tested can be judged according to the charging time value; the specific evaluation method is as follows:
The gate aging of the SiC MOSFET device can be simulated through a high-temperature gate bias accelerated aging test, and the gate aging of the SiC MOSFET to be tested is accelerated by applying gate stress and thermal stress to the SiC MOSFET to be tested;
Before the test starts, placing the device to be tested into a comprehensive monitoring driving circuit to measure the charging time value of the grid electrode in the health state as a reference value; in the accelerated aging test process, aging is stopped at intervals, a device to be tested is put into a comprehensive monitoring driving circuit, and the charging time of the device after aging is measured; when obvious leakage current I gss appears on the grid electrode of the SiC MOSFET device to be tested, I gss is in nA level under the healthy state of the grid electrode, I gss is above mA level when the grid electrode is seriously aged or failed, the grid electrode of the device is considered to be seriously aged and is close to failure, the accelerated aging test is stopped at the moment, and the charging time value measured last time before the failure of the grid electrode of the device is used as a grid electrode failure threshold value; comparing the charging time reference value with the failure threshold value, and performing interval subdivision to obtain charging time ranges of the grid electrode of the SiC MOSFET device under different health grades;
When the SiC MOSFET device to be tested is used for an actual device, firstly, measuring the charging time under the healthy state of a grid electrode as a reference; in the running process of the device, the charging time is measured regularly according to the requirement and is compared with a reference value and a failure threshold value, so that the health state of the grid electrode of the SiC MOSFET device is judged.
7. The SiC MOSFET gate aging monitor circuit of claim 1, wherein: the total time of the monitoring process is smaller than the turn-off time of the device, so that the normal operation of the SiC MOSFET device is ensured to be monitored, and the gate charging time can be adjusted through the turn-on driving resistance of the monitoring driving circuit.
8. The SiC MOSFET gate aging monitor circuit of claim 1, wherein: the monitor voltage V EE and the set voltage V ref are determined by the gate aging sensitive voltage interval of the monitor device, and are specifically as follows:
Through a grid accelerated aging experiment, the drain electrode is increased in voltage, the grid electrode is increased in negative voltage, and the C iss-Vgs characteristic curves of the SiC MOSFET device to be tested under different aging states are monitored; and determining an aging sensitive voltage interval according to the change condition of the C iss-Vgs characteristic curve before and after aging, and determining a voltage interval during monitoring by combining a grid negative voltage allowable range given by a device manufacturer, wherein the smaller value of the aging sensitive voltage interval is V EE, and the larger value of the aging sensitive voltage interval is set voltage V ref.
9. The SiC MOSFET gate aging monitor circuit of claim 1, wherein: the circuit is used in-line in a variety of devices including SiC MOSFET devices.
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