CN113823673A - Enhanced GaN HEMT device based on superlattice structure and preparation method thereof - Google Patents
Enhanced GaN HEMT device based on superlattice structure and preparation method thereof Download PDFInfo
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- 238000002360 preparation method Methods 0.000 title claims abstract description 12
- 229910052751 metal Inorganic materials 0.000 claims abstract description 84
- 239000002184 metal Substances 0.000 claims abstract description 84
- 230000004888 barrier function Effects 0.000 claims abstract description 26
- 239000000758 substrate Substances 0.000 claims abstract description 16
- 238000009792 diffusion process Methods 0.000 claims abstract description 5
- 230000000694 effects Effects 0.000 claims abstract description 5
- 239000007787 solid Substances 0.000 claims abstract description 5
- 238000000137 annealing Methods 0.000 claims description 16
- 238000001259 photo etching Methods 0.000 claims description 15
- 238000001704 evaporation Methods 0.000 claims description 13
- 238000000034 method Methods 0.000 claims description 11
- 230000008020 evaporation Effects 0.000 claims description 10
- 239000004065 semiconductor Substances 0.000 claims description 8
- 230000004913 activation Effects 0.000 claims description 5
- 238000005229 chemical vapour deposition Methods 0.000 claims description 5
- 238000010301 surface-oxidation reaction Methods 0.000 claims description 5
- 239000000463 material Substances 0.000 claims description 4
- 230000005533 two-dimensional electron gas Effects 0.000 claims description 3
- 238000001816 cooling Methods 0.000 claims description 2
- 238000010438 heat treatment Methods 0.000 claims description 2
- 230000003647 oxidation Effects 0.000 claims description 2
- 238000007254 oxidation reaction Methods 0.000 claims description 2
- 239000011777 magnesium Substances 0.000 description 9
- 238000005530 etching Methods 0.000 description 6
- 238000012546 transfer Methods 0.000 description 4
- 229910002704 AlGaN Inorganic materials 0.000 description 3
- 150000004767 nitrides Chemical class 0.000 description 3
- 150000001875 compounds Chemical class 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000010287 polarization Effects 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 238000011160 research Methods 0.000 description 2
- 238000006467 substitution reaction Methods 0.000 description 2
- 208000033999 Device damage Diseases 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 1
- 229910019080 Mg-H Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
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- 238000000407 epitaxy Methods 0.000 description 1
- 125000004435 hydrogen atom Chemical group [H]* 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
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Abstract
The invention discloses an enhanced GaN HEMT device based on a superlattice structure and a preparation method thereof, wherein the enhanced GaN HEMT device comprises a substrate, a GaN channel layer, a GaN/AlN superlattice structure layer, a p-type GaN/AlN doped layer, an MgO gate insulating layer, a drain metal electrode, a source metal electrode and a gate metal electrode; the invention utilizes the micro-strip effect of the superlattice structure and the solid thermal diffusion method to enhance the p-type doping efficiency in the barrier layer, and simply and efficiently realizes the high-performance enhanced GaN HEMT device.
Description
Technical Field
The invention belongs to the field of semiconductor devices, and particularly relates to an enhanced GaN HEMT device based on a superlattice structure and a preparation method thereof.
Background
HEMT devices based on GaN and related group iii nitride materials (AlN, InN) are currently the focus of research in compound semiconductor electronic devices. Compared with the second generation semiconductor GaAs, the GaN has the advantages of wide forbidden band, high critical breakdown electric field, high electronic saturation velocity, high thermal conductivity, strong radiation resistance and the like, so the GaN HEMT has the characteristics of excellent high frequency, pressure resistance, high temperature resistance and severe environment resistance, and is widely applied to the fields of radio frequency microwave, power switches and the like.
Spontaneous polarization and piezoelectric polarization at the AlGaN/GaN heterojunction interface can generate the concentration of about 10 between the common AlGaN/GaN heterojunction13cm-2And thus the GaN HEMT device is a natural depletion mode device. The depletion mode device uses negative turn-on voltage in radio frequency microwave application, so that the circuit structure becomes complicated, the false turn-on prevention protection function of the circuit is influenced, and the safety of the circuit is reduced, therefore, the research of an enhancement mode GaN HEMT device is needed to be carried out, the circuit design is simplified, and the preparation cost is reduced.
The mainstream method for realizing the commercial enhancement type GaN HEMT device is the p-type gate technology. The p-type gate is an enhancement type by inserting p-type nitride between the gate and the barrier layer to raise the conduction band bottom of the heterojunction above the fermi level. The p-type gate enhancement type device does not need to carry out additional process treatment on a gate, does not have the problem of gate instability, and has high reliability, so the p-type gate enhancement type device becomes a preferred structure for commercialization of a GaN power device. However, the p-type gate enhancement device still faces the problems of etching damage, high p-type doping difficulty and the like. Because the difficulty of the selective area epitaxy technology is high, the p-type gate is obtained by growing p-GaN/AlGaN/GaN in situ and etching the p-GaN in the region outside the gate completely at present, so that the requirement of the device on the etching precision is high, and the damage to the device cannot be avoided. Meanwhile, p-type GaN doping (usually adopting acceptor Mg) has low concentration and acceptor activation rate, so that the 2DEG under the gate cannot be fully depleted, and high threshold voltage is difficult to realize. In addition, the p-type gate has a series of problems of weak gate control capability, large gate leakage and the like, and further popularization and application of the power device are restricted. Therefore, a new technical means is needed to realize the enhancement-type GaN HEMT device simply and efficiently.
Disclosure of Invention
In order to overcome the defects and shortcomings of the prior art, the invention provides an enhanced GaN HEMT device based on a superlattice structure and a preparation method thereof. The invention utilizes the micro-strip effect of the GaN/AlN superlattice structure to reduce the activation energy of an acceptor Mg, carries out p-type doping on the GaN/AlN superlattice structure layer in the region under the gate through solid thermal diffusion, forms a pn junction with the material under the gate, and exhausts two-dimensional electron gas under the gate, thereby realizing the enhancement device.
The invention adopts the following technical scheme:
an enhancement mode GaN HEMT device based on a superlattice structure comprises a substrate, a GaN channel layer, a GaN/AlN superlattice structure layer, a p-type GaN/AlN doping layer, an MgO gate insulating layer, a drain metal electrode, a source metal electrode and a gate metal electrode;
the substrate, the GaN channel layer and the GaN/AlN superlattice structure layer are sequentially laminated from bottom to top;
the GaN/AlN superlattice structure layer is formed by alternately and periodically growing a GaN potential well layer and an AlN barrier layer;
the MgO gate insulating layer and the p-type GaN/AlN doped layer are sequentially positioned below the gate metal electrode, and the p-type GaN/AlN doped layer is positioned in the GaN/AlN superlattice structure layer;
the drain metal electrode and the source metal electrode are respectively positioned in the two side areas of the GaN/AlN superlattice barrier layer, and ohmic contact is formed between the drain metal electrode and the source metal electrode and the GaN/AlN superlattice barrier layer;
the gate metal electrode is positioned in the upper area of the MgO gate insulating layer, and the gate metal electrode, the MgO gate insulating layer and the superlattice barrier layer form a metal-insulating layer-semiconductor structure.
Further, in the GaN/AlN superlattice structure layer, an AlN barrier layer is located above the GaN channel layer.
Furthermore, the total thickness of the GaN/AlN superlattice structure layer is 20-30 nm, the period thickness is 3-6 nm, and the period number is 4-10 periods.
Further, the thickness of the p-type GaN/AlN doped layer is 5-30 nm.
Furthermore, the thickness of the MgO gate insulating layer is 20-100 nm.
Furthermore, the activation energy of an acceptor Mg is reduced by utilizing the micro-strip effect of the GaN/AlN superlattice structure, the GaN/AlN superlattice structure layer in the region under the gate is subjected to p-type doping through solid thermal diffusion to form a pn junction with the material under the gate, and two-dimensional electron gas under the gate is exhausted, so that the enhancement device is realized.
A preparation method of an enhanced GaN HEMT device comprises the following steps:
s1 respectively extending a GaN channel layer and a GaN/AlN superlattice structure layer on the substrate;
s2 photoetching the epitaxial wafer obtained in the S1 to expose the gate metal electrode area;
s3, after metal Mg is evaporated on the epitaxial wafer obtained in the S2, stripping and annealing are carried out;
s4, carrying out surface oxidation treatment on the epitaxial wafer obtained in the step S3, and forming an MgO gate insulating layer on the surface of the superlattice barrier layer;
s5, photoetching the epitaxial wafer obtained in the step S4, exposing source and drain metal electrode areas, and then carrying out evaporation, stripping and annealing to form drain and source metal electrodes;
and S6, photoetching is carried out on the epitaxial wafer obtained in the step S5 again to expose the gate metal electrode area, and the gate metal electrode is formed through evaporation and stripping.
Further, in the step S1, Metal Organic Chemical Vapor Deposition (MOCVD) is adopted for growth preparation, and the growth temperature is 850-1000 ℃.
Furthermore, the thickness of the metal Mg is 30-100 nm, the annealing temperature is 600-800 ℃, and the annealing time is 30-120 s.
Further, the oxidation treatment specifically comprises: and introducing air into the rapid annealing furnace, heating to 200-400 ℃, keeping the temperature for 60-120 s, and then cooling along with the furnace.
The invention has the beneficial effects that:
(1) the invention utilizes the micro-strip effect of the GaN/AlN superlattice structure to reduce the acceptor activation energy, and simultaneously utilizes solid thermal diffusion to avoid Mg and hydrogen atoms from being neutralized to form Mg-H compound, thereby effectively solving the problem of difficult p-type doping of III group nitrides.
(2) The preparation method of the invention does not need to use an etching process, so that the problem of high etching precision requirement of the traditional p-type gate device is solved, and the problems of device damage, reliability reduction and the like caused by etching are avoided.
(3) The method provided by the invention oxidizes the residual magnesium metal on the surface after doping to form the MgO gate insulating layer, the dielectric constant of MgO is as high as 9.8, and the leakage current of the gate can be effectively inhibited.
Drawings
FIG. 1 is a schematic structural view of the present invention;
fig. 2 is a graph of transfer characteristics measured for an enhanced GaN HEMT device of the present invention based on a superlattice structure.
Detailed Description
The present invention will be described in further detail with reference to examples and drawings, but the present invention is not limited to these examples.
Example 1
Fig. 1 shows a schematic structure of an enhancement mode GaN HEMT device of example 1 based on a superlattice structure. The method comprises the following steps: the GaN-based light-emitting diode comprises a substrate 1, a GaN channel layer 2, an AlN barrier layer 3 in a superlattice structure layer, a GaN potential well layer 4 in the superlattice structure layer, a p-type GaN/AlN doping layer 5, an MgO gate insulating layer 6, a source metal electrode 7, a drain metal electrode 8 and a gate metal electrode 9, wherein:
the substrate 1, the GaN channel layer 2 and the GaN/AlN superlattice structure layer are sequentially laminated from bottom to top;
the GaN/AlN superlattice structure layer is formed by alternately and periodically growing AlN barrier layers 3 and GaN potential well layers 4, wherein the AlN barrier layers 3 are positioned above the GaN channel layer 2.
The p-type GaN/AlN doped layer 5 is positioned in the GaN/AlN superlattice structure layer below the region of the gate metal electrode 9.
The MgO gate insulating layer 6 is located in an upper region of the p-type GaN/AlN doped layer 5.
The source metal electrode 7 and the drain metal electrode 8 are respectively positioned in the two side regions of the GaN/AlN superlattice structure layer and form ohmic contact with the GaN/AlN superlattice structure layer.
The gate metal electrode 9 is located in an upper region of the MgO gate insulating layer 6, and the gate metal electrode 9 forms an MIS (metal-insulator-semiconductor) structure with the MgO gate insulating layer 6 and the superlattice structure layer.
The enhancement mode GaN HEMT device based on the superlattice structure of the embodiment is prepared by the following method:
step 4, carrying out surface oxidation treatment on the epitaxial wafer obtained in the step 3, keeping the epitaxial wafer in an atmospheric environment at 200 ℃ for 120s, and forming an MgO gate insulating layer on the surface of the superlattice barrier layer;
and 6, photoetching the epitaxial wafer obtained in the step 5 again to expose the gate metal electrode area, and forming a gate metal electrode through evaporation and stripping.
The measured transfer characteristic curve of the enhancement mode GaN HEMT device based on the superlattice structure prepared in example 1 is shown in fig. 2, the threshold voltage of the obtained device is 0.48V, the output saturation current density is 278mA/mm when the gate voltage is 3V, and the enhancement mode of the device is realized.
Example 2
Fig. 1 is a schematic structural view of an enhancement-mode GaN HEMT device of example 2 based on a superlattice structure. The method comprises the following steps: the GaN-based light-emitting diode comprises a substrate 1, a GaN channel layer 2, an AlN barrier layer 3 in a superlattice structure layer, a GaN potential well layer 4 in the superlattice structure layer, a p-type GaN/AlN doping layer 5, an MgO gate insulating layer 6, a source metal electrode 7, a drain metal electrode 8 and a gate metal electrode 9, wherein:
the substrate 1, the GaN channel layer 2 and the GaN/AlN superlattice structure layer are sequentially laminated from bottom to top;
the GaN/AlN superlattice structure layer is formed by alternately and periodically growing AlN barrier layers 3 and GaN potential well layers 4, wherein the AlN barrier layers 3 are positioned above the GaN channel layer 2;
the p-type GaN/AlN doped layer 5 is positioned in the GaN/AlN superlattice structure layer below the gate metal electrode 9 region;
the MgO gate insulating layer 6 is positioned in the upper area of the p-type GaN/AlN doped layer 5;
the source metal electrode 7 and the drain metal electrode 8 are respectively positioned in the two side regions of the GaN/AlN superlattice structure layer and form ohmic contact with the GaN/AlN superlattice structure layer;
the gate metal electrode 9 is located in an upper region of the MgO gate insulating layer 6, and the gate metal electrode 9 forms an MIS (metal-insulator-semiconductor) structure with the MgO gate insulating layer 6 and the superlattice structure layer.
The enhancement mode GaN HEMT device based on the superlattice structure of the embodiment is prepared by the following method:
step 4, carrying out surface oxidation treatment on the epitaxial wafer obtained in the step 3, keeping the epitaxial wafer in an atmospheric environment at 300 ℃ for 90s, and forming an MgO gate insulating layer on the surface of the superlattice barrier layer;
and 6, photoetching the epitaxial wafer obtained in the step 5 again to expose the gate metal electrode area, and forming a gate metal electrode through evaporation and stripping.
The transfer characteristic curve results of the enhancement mode GaN HEMT device based on the superlattice structure prepared in example 2 are similar to those of example 1, and reference can be made to fig. 2.
Example 3
Fig. 1 is a schematic structural view of an enhancement-mode GaN HEMT device of this embodiment based on a superlattice structure. The method comprises the following steps: the GaN-based light-emitting diode comprises a substrate 1, a GaN channel layer 2, an AlN barrier layer 3 in a superlattice structure layer, a GaN potential well layer 4 in the superlattice structure layer, a p-type GaN/AlN doping layer 5, an MgO gate insulating layer 6, a source metal electrode 7, a drain metal electrode 8 and a gate metal electrode 9, wherein:
the substrate 1, the GaN channel layer 2 and the GaN/AlN superlattice structure layer are sequentially laminated from bottom to top.
The GaN/AlN superlattice structure layer is formed by alternately and periodically growing AlN barrier layers 3 and GaN potential well layers 4, wherein the AlN barrier layers 3 are positioned above the GaN channel layer 2.
The p-type GaN/AlN doped layer 5 is positioned in the GaN/AlN superlattice structure layer below the region of the gate metal electrode 9.
The MgO gate insulating layer 6 is located in an upper region of the p-type GaN/AlN doped layer 5.
The source metal electrode 7 and the drain metal electrode 8 are respectively positioned in the two side regions of the GaN/AlN superlattice structure layer and form ohmic contact with the GaN/AlN superlattice structure layer.
The gate metal electrode 9 is located in an upper region of the MgO gate insulating layer 6, and the gate metal electrode 9 forms an MIS (metal-insulator-semiconductor) structure with the MgO gate insulating layer 6 and the superlattice structure layer.
The enhancement mode GaN HEMT device based on the superlattice structure of the embodiment is prepared by the following method:
And 2, photoetching the epitaxial wafer obtained in the step 1 to expose a gate metal electrode area.
And 3, evaporating 60nm of metal Mg on the epitaxial wafer obtained in the step 2, then stripping, and annealing for 30s in a vacuum environment at 800 ℃.
And 4, carrying out surface oxidation treatment on the epitaxial wafer obtained in the step 3, keeping the epitaxial wafer in an atmospheric environment at 400 ℃ for 60s, and forming an MgO gate insulating layer on the surface of the superlattice barrier layer.
And 5, photoetching the epitaxial wafer obtained in the step 4, exposing the source and drain metal electrode regions, and then performing evaporation, stripping and annealing to form drain and source metal electrodes.
And 6, photoetching the epitaxial wafer obtained in the step 5 again to expose the gate metal electrode area, and forming a gate metal electrode through evaporation and stripping.
The transfer characteristic curve results of the enhancement mode GaN HEMT device based on the superlattice structure prepared in example 3 are similar to those of example 1, and fig. 2 can be referred.
The above embodiments are preferred embodiments of the present invention, but the present invention is not limited to the above embodiments, and any other changes, modifications, substitutions, combinations, and simplifications which do not depart from the spirit and principle of the present invention should be construed as equivalents thereof, and all such changes, modifications, substitutions, combinations, and simplifications are intended to be included in the scope of the present invention.
Claims (10)
1. An enhancement mode GaN HEMT device based on a superlattice structure is characterized by comprising a substrate, a GaN channel layer, a GaN/AlN superlattice structure layer, a p-type GaN/AlN doping layer, an MgO gate insulating layer, a drain metal electrode, a source metal electrode and a gate metal electrode;
the substrate, the GaN channel layer and the GaN/AlN superlattice structure layer are sequentially laminated from bottom to top;
the GaN/AlN superlattice structure layer is formed by alternately and periodically growing a GaN potential well layer and an AlN barrier layer;
the MgO gate insulating layer and the p-type GaN/AlN doped layer are sequentially positioned below the gate metal electrode, and the p-type GaN/AlN doped layer is positioned in the GaN/AlN superlattice structure layer;
the drain metal electrode and the source metal electrode are respectively positioned in the two side areas of the GaN/AlN superlattice barrier layer, and ohmic contact is formed between the drain metal electrode and the source metal electrode and the GaN/AlN superlattice barrier layer;
the gate metal electrode is positioned in the upper area of the MgO gate insulating layer, and the gate metal electrode, the MgO gate insulating layer and the superlattice barrier layer form a metal-insulating layer-semiconductor structure.
2. The enhancement-mode GaN HEMT device of claim 1, wherein the AlN barrier layer is located above the GaN channel layer in the GaN/AlN superlattice structure layer.
3. An enhanced GaN HEMT device according to claim 1, characterized in that the total thickness of the GaN/AlN superlattice structure layer is 20-30 nm, the period thickness is 3-6 nm, and the period number is 4-10 periods.
4. The enhancement-mode GaN HEMT device according to claim 1, wherein the thickness of the p-type GaN/AlN doped layer is 5-30 nm.
5. The enhancement-mode GaN HEMT device according to claim 1, wherein the MgO gate insulating layer has a thickness of 20-100 nm.
6. An enhanced GaN HEMT device as claimed in claim 1, wherein the activation energy of acceptor Mg is reduced by the microstrip effect of the GaN/AlN superlattice structure, the GaN/AlN superlattice structure layer in the region under the gate is p-doped by solid thermal diffusion to form a pn junction with the material below, and two-dimensional electron gas under the gate is exhausted, thereby realizing the enhanced device.
7. A preparation method for realizing the enhancement type GaN HEMT device of any one of claims 1-6 is characterized by comprising the following steps:
s1 respectively extending a GaN channel layer and a GaN/AlN superlattice structure layer on the substrate;
s2 photoetching the epitaxial wafer obtained in the S1 to expose the gate metal electrode area;
s3, after metal Mg is evaporated on the epitaxial wafer obtained in the S2, stripping and annealing are carried out;
s4, carrying out surface oxidation treatment on the epitaxial wafer obtained in the step S3, and forming an MgO gate insulating layer on the surface of the superlattice barrier layer;
s5, photoetching the epitaxial wafer obtained in the step S4, exposing source and drain metal electrode areas, and then carrying out evaporation, stripping and annealing to form drain and source metal electrodes;
and S6, photoetching is carried out on the epitaxial wafer obtained in the step S5 again to expose the gate metal electrode area, and the gate metal electrode is formed through evaporation and stripping.
8. The preparation method of claim 7, wherein the S1 is prepared by Metal Organic Chemical Vapor Deposition (MOCVD) growth at 850-1000 ℃.
9. The method according to claim 7, wherein the thickness of the metal Mg is 30 to 100nm, the annealing temperature is 600 to 800 ℃, and the annealing time is 30 to 120 seconds.
10. The preparation method according to claim 7, wherein the oxidation treatment is specifically: and introducing air into the rapid annealing furnace, heating to 200-400 ℃, keeping the temperature for 60-120 s, and then cooling along with the furnace.
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