CN113764267A - 一种晶圆减薄方法 - Google Patents

一种晶圆减薄方法 Download PDF

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CN113764267A
CN113764267A CN202110855120.XA CN202110855120A CN113764267A CN 113764267 A CN113764267 A CN 113764267A CN 202110855120 A CN202110855120 A CN 202110855120A CN 113764267 A CN113764267 A CN 113764267A
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thinning
grinding
wafer
chip
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刘在福
曾昭孔
郭瑞亮
陈武伟
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Suzhou Tongfu Chaowei Semiconductor Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00Lapping machines or devices; Accessories
    • B24B37/04Lapping machines or devices; Accessories designed for working plane surfaces
    • B24B37/042Lapping machines or devices; Accessories designed for working plane surfaces operating processes therefor
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00Lapping machines or devices; Accessories
    • B24B37/04Lapping machines or devices; Accessories designed for working plane surfaces
    • B24B37/07Lapping machines or devices; Accessories designed for working plane surfaces characterised by the movement of the work or lapping tool
    • B24B37/10Lapping machines or devices; Accessories designed for working plane surfaces characterised by the movement of the work or lapping tool for single side lapping
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00Lapping machines or devices; Accessories
    • B24B37/27Work carriers
    • B24B37/30Work carriers for single side lapping of plane surfaces
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting
    • HELECTRICITY
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    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
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    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding

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Abstract

本申请公开了一种晶圆减薄方法,其包括以下步骤:提供晶圆,所述晶圆包括芯片层和研磨层,在所述芯片层背离所述研磨层的表面上划设减薄线;沿所述减薄线减薄,减薄深度为所述芯片层厚度;在所述芯片层背离所述研磨层的表面涂设第一连接层;通过所述第一连接层将所述芯片层连接至晶圆研磨台;研磨所述研磨层,研磨深度为所述研磨层厚度;在所述芯片层背离所述第一连接层的表面涂设第二连接层;去除所述第一、二连接层,获取芯片。本申请的减薄方法,用于较薄的芯片层,在对研磨层研磨时,避免了芯片层的隐裂,有利于提高晶圆减薄精度,提高良品率。

Description

一种晶圆减薄方法
技术领域
本发明一般涉及半导体技术领域,具体涉及一种晶圆减薄方法。
背景技术
晶圆包括芯片层和研磨层,晶圆减薄工艺是对晶圆的研磨层材料进行磨削,去掉一定厚度的材料。
在相关技术中,晶圆减薄工艺包括正面形成减薄线和背面研磨等步骤,在上述背面研磨时,由于芯片层较薄,存在芯片层隐裂的问题。
发明内容
鉴于现有技术中的上述缺陷或不足,期望提供一种晶圆减薄方法。
本申请提供一种晶圆减薄方法,包括以下步骤:
提供晶圆,所述晶圆包括芯片层和研磨层,在所述芯片层背离所述研磨层的表面上划设减薄线;
沿所述减薄线减薄,减薄深度为所述芯片层厚度;
在所述芯片层背离所述研磨层的表面涂设第一连接层;
通过所述第一连接层将所述芯片层连接至晶圆研磨台;
研磨所述研磨层,研磨深度为所述研磨层厚度;
在所述芯片层背离所述第一连接层的表面涂设第二连接层;
去除所述第一、二连接层,获取芯片。
作为可选的方案,所述提供晶圆,所述晶圆包括芯片层和研磨层,在所述芯片层背离所述研磨层的表面上划设减薄线步骤,包括:
在所述芯片层背离所述研磨层的表面上涂设刻蚀层;
在所述刻蚀层上划设刻蚀线;
利用刻蚀工艺沿所述刻蚀线刻蚀,从而形成所述减薄线。
作为可选的方案,所述沿所述减薄线减薄,减薄深度为所述芯片层厚度步骤,包括:
利用激光沿所述减薄线减薄;
去除所述刻蚀层。
作为可选的方案,激光的功率为1~3W。
作为可选的方案,所述研磨所述研磨层,研磨深度为所述研磨层厚度步骤,包括:
对所述研磨层粗研磨;
对所述研磨层精研磨;
对所述研磨层抛光,直至所述研磨层弯曲去除。
作为可选的方案,所述晶圆还设有保护层,所述保护层涂设于所述芯片层背离所述研磨层的表面。
作为可选的方案,所述减薄线包括多个纵向减薄线和多个横向减薄线,所述纵向减薄线和所述横向减薄线相互垂直。
作为可选的方案,所述第一连接层为UV胶膜。
作为可选的方案,所述第二连接层为蓝膜。
本申请的减薄方法,用于较薄的芯片层,在对研磨层研磨时,避免了芯片层的隐裂,有利于提高晶圆减薄精度,提高良品率。
附图说明
通过阅读参照以下附图所作的对非限制性实施例所作的详细描述,本申请的其它特征、目的和优点将会变得更明显:
图1为本发明实施例提供的一种晶圆减薄方法的流程图;
图2~图11为本发明实施例提供的一种晶圆减薄方法的步骤示意图。
具体实施方式
下面结合附图和实施例对本申请作进一步的详细说明。可以理解的是,此处所描述的具体实施例仅仅用于解释相关发明,而非对该发明的限定。另外还需要说明的是,为了便于描述,附图中仅示出了与发明相关的部分。
需要说明的是,在不冲突的情况下,本申请中的实施例及实施例中的特征可以相互组合。下面将参考附图并结合实施例来详细说明本申请。
本发明使用的术语是仅仅出于描述特定实施例的目的,而非旨在限制本发明。在本发明和所附权利要求书中所使用的单数形式的“一种”、“所述”和“该”也旨在包括多数形式,除非上下文清楚地表示其他含义。还应当理解,本文中使用的术语“和/或”是指并包含一个或多个相关联的列出项目的任何或所有可能组合。
参考图1所示,本申请的实施例提供一种晶圆减薄方法的流程图,其方法包括以下步骤:
S10,提供晶圆10,晶圆10包括芯片层11和研磨层12,在芯片层11背离研磨层12的表面上划设减薄线;
需要说明的是,晶圆10包括芯片层11和研磨层12。在芯片层11上划减薄线,减薄线包括横向减薄线和纵向减薄线,横向减薄线和纵向减薄线相互垂直,呈井字型布置,减薄线将芯片层11划分为若干个等面积矩形的区域,该矩形区域的尺寸与所需的芯片尺寸相同。研磨层12为半导体材料,通过机械加工去除半导体材料。
在S10步骤中,其包括以下具体步骤:
S11,参考图2和图3,晶圆10包括芯片层11和研磨层12,在芯片层11背离研磨层12的表面上涂设刻蚀层30;
S12,在刻蚀层30上划设刻蚀线31,刻蚀线31包括横向刻蚀线和纵向刻蚀线,横向刻蚀线和纵向刻蚀线相互垂直,呈井字型布置,进而在刻蚀层30上形成若干个子刻蚀块。其中,子刻蚀块的尺寸与所需芯片尺寸相同;
S13,参考图4,利用刻蚀工艺,沿上述的横向刻蚀线和纵向刻蚀线进行刻蚀,在刻蚀层30上形成若干个横向缝隙和纵向缝隙,该横向缝隙和纵向缝隙即为所述减薄线。减薄线包括横向减薄线和纵向减薄线,横向减薄线和纵向减薄线相互垂直,呈井字型布置。
需要说明的是,在步骤S11中,如图2和图3,在芯片层11背离研磨层12的表面上涂设保护层20,保护层20有利于后续步骤中芯片的获取。在具体实施例中,在晶圆10的表面上依次涂设保护层20和刻蚀层30,即刻蚀层30、保护层20、芯片层11及研磨层12依次层叠设置。
S20,沿减薄线减薄,减薄深度为芯片层11厚度;
需要说明的是,通过激光技术沿横向减薄线和纵向减薄线减薄,激光线穿透保护层20和芯片层11。激光减薄应力小,能够避免芯片层11存在隐裂的问题。激光的功率为1~3W。
在S20步骤中,其包括以下具体步骤:
S21,参考图5,利用激光沿横向减薄线和纵向减薄线进行减薄;
S22,参考图6,减薄完毕后,去除上述的刻蚀层30。
S30,参考图7,在芯片层11背离研磨层12的表面涂设第一连接层40;
需要说明的是,第一连接层40为UV胶膜,经紫外线处理后的UV胶膜粘附作用力能够消失,有利于后续步骤的芯片获取。
S40,参考图8,通过第一连接层40将芯片层11连接至晶圆研磨台50;
可以理解的是,晶圆10研磨设备包括晶圆研磨台50和刀具,将晶圆10连接至晶圆研磨台50,即晶圆10的研磨层12朝向刀具。
S50,参考图9,研磨研磨层12,研磨深度为研磨层12厚度;
在S50步骤中,其包括以下具体步骤:
S51,对研磨层12进行粗研磨,提高研磨效率;
S52,对研磨层12进行精研磨,避免破坏芯片层11;
S53,对研磨层12抛光,直至研磨层12完全去除,能够保证完全去除研磨层12,精度高。
S60,参考图10,在芯片层11背离第一连接层40的表面涂设第二连接层60;
需要说明的是,第二连接层60为蓝膜。蓝膜在低温下,粘附作用力消失。通过紫外线处理,使得第一连接层40的粘附作用力消除,进而芯片层11能够脱离晶圆10研磨台。然后,将第二连接层60涂设于芯片层11背离第一连接层40的表面。
S70,参考图11,去除第一、二连接层,获取芯片。
需要说明的是,首先去除掉第一连接层40和保护层20,然后经过低温处理,使得芯片与第二连接层60之间的作用力消失,进而获取所需的芯片。
本申请的减薄方法,用于较薄的芯片层,在对研磨层研磨时,避免了芯片层的隐裂,有利于提高晶圆减薄精度,提高良品率。
以上描述仅为本申请的较佳实施例以及对所运用技术原理的说明。本领域技术人员应当理解,本申请中所涉及的发明范围,并不限于上述技术特征的特定组合而成的技术方案,同时也应涵盖在不脱离所述发明构思的情况下,由上述技术特征或其等同特征进行任意组合而形成的其它技术方案。例如上述特征与本申请中公开的(但不限于)具有类似功能的技术特征进行互相替换而形成的技术方案。

Claims (9)

1.一种晶圆减薄方法,其特征在于,包括以下步骤:
提供晶圆,所述晶圆包括芯片层和研磨层,在所述芯片层背离所述研磨层的表面上划设减薄线;
沿所述减薄线减薄,减薄深度为所述芯片层厚度;
在所述芯片层背离所述研磨层的表面涂设第一连接层;
通过所述第一连接层将所述芯片层连接至晶圆研磨台;
研磨所述研磨层,研磨深度为所述研磨层厚度;
在所述芯片层背离所述第一连接层的表面涂设第二连接层;
去除所述第一、二连接层,获取芯片。
2.根据权利要求1所述的晶圆减薄方法,其特征在于,所述提供晶圆,所述晶圆包括芯片层和研磨层,在所述芯片层背离所述研磨层的表面上划设减薄线步骤,包括:
在所述芯片层背离所述研磨层的表面上涂设刻蚀层;
在所述刻蚀层上划设刻蚀线;
利用刻蚀工艺沿所述刻蚀线刻蚀,从而形成所述减薄线。
3.根据权利要求1所述的晶圆减薄方法,其特征在于,所述沿所述减薄线减薄,减薄深度为所述芯片层厚度步骤,包括:
利用激光沿所述减薄线减薄;
去除所述刻蚀层。
4.根据权利要求3所述的晶圆减薄方法,其特征在于,激光的功率为1~3W。
5.根据权利要求1所述的晶圆减薄方法,其特征在于,所述研磨所述研磨层,研磨深度为所述研磨层厚度步骤,包括:
对所述研磨层粗研磨;
对所述研磨层精研磨;
对所述研磨层抛光,直至所述研磨层弯曲去除。
6.根据权利要求1所述的晶圆减薄方法,其特征在于,所述晶圆还设有保护层,所述保护层涂设于所述芯片层背离所述研磨层的表面。
7.根据权利要求1所述的晶圆减薄方法,其特征在于,所述减薄线包括多个纵向减薄线和多个横向减薄线,所述纵向减薄线和所述横向减薄线相互垂直。
8.根据权利要求1所述的晶圆减薄方法,其特征在于,所述第一连接层为UV胶膜。
9.根据权利要求1所述的晶圆减薄方法,其特征在于,所述第二连接层为蓝膜。
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