CN113760814A

CN113760814A - Integrated computing system

Info

Publication number: CN113760814A
Application number: CN202110952618.8A
Authority: CN
Inventors: 何其伟
Original assignee: Shanghai Sense Intelligent Technology Co ltd
Current assignee: Shanghai Sense Intelligent Technology Co ltd
Priority date: 2017-03-28
Filing date: 2017-03-28
Publication date: 2021-12-07
Anticipated expiration: 2037-03-28
Also published as: CN113721725A; CN108664436A; CN113721729A; CN113760817A; CN108664436B

Abstract

The invention relates to an integrated computing system which comprises a traditional computing unit, a co-computing unit, a self-defined IPU bus slot, a customized computing unit and a power supply unit.

Description

Integrated computing system

Technical Field

The invention relates to a new computing architecture, and particularly provides an integrated computing system.

Background

Various field requirements of automatic control are met, various individual requirements such as real-time, redundancy, high bandwidth and synchronization are difficult to meet, and a large amount of cost is required for targeted development. The working environment is also very harsh, and high temperature, high humidity, dust, salt fog, vibration, electromagnetic interference and the like all pose serious challenges to the reliability of the equipment. Once the system is out of order, economic loss can be caused directly, and even the life safety of personnel is affected.

Especially, in some data acquisition applications, the amount of data to be acquired or transmitted by a conventional computing unit is very large, so that a plurality of high-speed signal acquisition customized computing units or high-speed signal output customized computing units need to be installed in the system, if a pure GPIO protocol signal line is adopted, all the customized computing units communicate with the conventional computing unit through a parallel computing unit, and the parallel computing unit and the conventional computing unit only have one high-speed data transmission channel, so that the bandwidth bottleneck problem is caused.

Disclosure of Invention

The embodiment of the invention aims to provide an integrated computing system, aiming at meeting various individual requirements of an automation control field.

The embodiments of the present invention are implemented such that,

an integrated computing system, characterized in that,

the integrated computing system includes a conventional computing unit, one or more co-computing units, one or more custom IPU bus slots, one or more custom computing units,

the conventional computing unit is directly connected to one or more co-computing units,

the traditional computing unit, the co-computing unit and the customized computing unit are all connected with the IPU bus slot, the traditional computing unit is connected with one or more self-defined IPU bus slots, each co-computing unit is connected with one or more self-defined IPU bus slots, each customized computing unit is connected with one self-defined IPU bus slot,

the self-defined IPU bus slot comprises one or more protocol signal lines and GPIO signal lines, the traditional computing unit and the co-computing unit are directly communicated through the protocol signal line of the traditional computing unit, the traditional computing unit and the customized computing unit are communicated through the protocol signal line of the traditional computing unit in the self-defined IPU bus slot, and the co-computing unit and the customized computing unit are communicated through the GPIO signal line in the self-defined IPU bus slot.

The invention can meet various individual requirements of an automatic control field by the mutual matching of the traditional computing unit, the co-computing unit and the customized computing unit.

Drawings

The invention is described in further detail below with reference to the following figures and embodiments:

figure 1 is a block diagram of the whole,

figure 2 is a block diagram of IPU bus slot composition,

figure 3 is a block diagram of the co-computation unit,

figure 4 is a block diagram of the co-computation unit,

figure 5 is a block diagram of the co-computation unit,

figure 6 is a block diagram of the co-computation unit,

figure 7 is a block diagram of the communications module of the co-computing unit,

figure 8 is a block diagram of the communications module of the co-computing unit,

figure 9 is a block diagram of the communications module of the co-computing unit,

figure 10 is a block diagram of the interface timing module of the synergistic computing unit,

figure 11 is a block diagram of the interface timing module of the synergistic computing unit,

figure 12 is a block diagram of the interface timing module of the synergistic computing unit,

figure 13 is a block diagram of the interface timing module of the synergistic computing unit,

figure 14 is a block diagram of the parallel computing module of the co-computing unit,

figure 15 is a block diagram of the synergistic computing unit handshake module,

figure 16 is a block diagram of a custom computing unit,

figure 17 is a block diagram of a custom computing unit,

figure 18 is a block diagram of a custom computing unit composition,

figure 19 is a block diagram of a custom computing unit,

figure 20 is a block diagram of a custom computing unit,

figure 21 is a block diagram of a custom computing unit,

figure 22 is a block diagram of a custom computing unit,

figure 23 is a block diagram of a custom computing unit,

figure 24 is a block diagram of a custom computing unit,

figure 25 is a block diagram of a custom computing unit,

figure 26 is a block diagram of a custom computing unit,

FIG. 27 is a block diagram of a custom computing unit composition.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

For example, the technical requirements for the existing automation control field requirements are higher, and the following problems exist in the aspects of architecture, computing capacity, interface and bus:

some applications require synchronization of the acquisition process for multiple channels,

some application input and output channels have logic relation, and real-time response is required,

some applications require that the closed-loop control accuracy of the whole system be guaranteed,

the channels may come from different functional boards, the cooperative processing capability among the boards of the industrial personal computer must be completed through a CPU, the cooperative processing speed of the boards is mostly in the ms level and is difficult to meet the requirements,

some applications have very high stability requirements, and if the operating system is crashed or restarted, the external channel cannot be correctly controlled, so that equipment damage and even casualties can be caused.

After long-term elaborate practice and design by a large number of hardware architects, a comprehensive computing system is provided, and the problems can be effectively solved. The specific scheme is as follows (as shown in figure 1):

an integrated computing system, characterized in that,

the self-defined IPU bus slot comprises one or more protocol signal lines and GPIO signal lines (as shown in figure 2), the traditional computing unit and the co-computing unit are directly communicated through the protocol signal line of the traditional computing unit, the traditional computing unit and the customized computing unit are communicated through the protocol signal line of the traditional computing unit in the self-defined IPU bus slot, and the co-computing unit and the customized computing unit are communicated through the GPIO signal line in the self-defined IPU bus slot.

Because the co-computation unit and the customized computation unit are relatively independent of the traditional computation unit, if the traditional computation unit crashes or restarts, the co-computation unit and the customized computation unit correctly control the external channel, so that the equipment cannot be damaged, and the casualties cannot be caused.

In particular, the temperature stability of some occasions is extremely high. A fan is adopted for heat dissipation of a common industrial personal computer, the fan can accumulate dust after a long time, the heat dissipation effect can be poor, even the computer fails, and faults are caused by overhigh temperature of a CPU (central processing unit). In particular, in some occasions, because processing dust is large, a general industrial personal computer is designed with vent holes for heat dissipation, and a large amount of dust enters the interior of a case through the holes and is accumulated in the interior of a fan or other key parts, so that a CPU (central processing unit) is in failure, finally, a full-system failure is caused, and huge loss is caused. In this time, the external channel is correctly controlled by the co-computation unit and the customized computation unit, so that equipment damage and casualties are avoided.

Some devices find design defects during field debugging and even after sale, and general hardware devices can only solve the problems in a recall mode. In this time, the problem can be solved only by remotely upgrading the related firmware of the co-computing unit and the customized computing unit, so that the cost of repairing the problem is greatly reduced, and the upgrading time is shortened.

Preferably, the traditional computing unit and the co-computing unit communicate directly through a PCI/PCIe protocol signal line of the traditional computing unit. Because the bandwidth of the PCI/PCIe protocol signal line is far greater than that of the common bus protocol, one traditional computing unit can support the rapid communication of a plurality of co-computing units, customized computing units and traditional computing units.

In some applications, because the data volume is very large, if the data is transmitted to a computer through an expansion bus, the bus bandwidth is insufficient, and the industrial personal computer is difficult to meet the requirement only if the calculation data with delayed processing is transmitted to the computer. Because the bandwidth of the PCI/PCIe protocol signal line is far greater than that of the common bus protocol, one traditional computing unit can support the rapid communication of a plurality of co-computing units, customized computing units and traditional computing units.

Preferably, the traditional computing unit and the customized computing unit communicate through a PCI/PCIe or USB protocol signal line of the traditional computing unit in the self-defined IPU bus slot.

General expansion card, the extension of industrial computer must design into PCI or PCIe interface, just can normally work, and the interface design degree of difficulty is big, and is with high costs, and can't be at same connector, supports some commonly used interfaces: such as PCIe \ USB \ GPIO and the like. And the self-defined IPU bus slot supports PCI/PCIe or USB protocols, and the interface design difficulty is low.

From the complexity of the bus, PCIe > USB > GPIO, which results in a cost-effective learning of PCIe > USB > GPIO. The higher the PCIe bandwidth > the USB bandwidth > the GPIO bandwidth, the higher the high-speed signal, the higher the signal routing skill requirement, and the higher the debugging complexity. Because the traditional industrial personal computer only has PCIe and USB buses, and some simple low-speed applications also need to be converted through a high-speed high-bandwidth bus, the design threshold is greatly improved. The IPU simultaneously provides the three buses for users, and the users can freely select any one of the familiar buses to start development through own ability, past experience and success cases.

In the design of a board card of a traditional industrial personal computer, no matter the board card for developing a PCIe/PCI or USB bus, the standard buses are converted into a local bus through a protocol conversion module, and then various interface circuits are externally hung on the local bus. The structure and function of the protocol conversion module are similar for the boards with different functions. Any standard bus may be used to convert the local bus, as long as the bandwidth is generally sufficient. The IPU co-computation unit converts a standard computer bus into a plurality of GPIOs, and then divides the GPIOs into a plurality of groups to be used as local buses for different IPU slots, so that when a user designs different functional boards, an interface circuit can be designed directly from the GPIOs, namely only a customized computation unit needs to be designed, thereby greatly reducing the development difficulty and saving the development time and the production and maintenance costs.

Preferably, the conventional computing unit adopts an X86 platform or an ARM platform, and the co-computing unit adopts an FPGA platform or a CPLD platform.

Some application field environments are very complex, and the extended hardware selected by designers in the early stage is not suitable for use until the extended hardware is used in the field, and the re-selection or re-design is not in time. Therefore, it is highly desirable to be able to achieve this effect by using programmable hardware, such as FPGA platforms or CPLD platforms.

The self-defined IPU bus slot is a flat antenna type golden finger or a pinhole type Eurocard connector.

When the flat antenna type golden finger is adopted, in an application environment of impact or vibration, the contact looseness fault is caused by frequent shaking, and in addition, the golden finger can be oxidized along with the lapse of time to cause the fault due to poor contact, but the structure is simple, the manufacturing cost is low, and the board inserting is convenient.

When the pinhole type Eurocard connector is adopted, the industrial personal computer is low in replacement cost for scenes which are frequently changed or need to be upgraded in specific application, and cannot be out of order due to poor contact in some impact and vibration environments. The specific application of some occasions often changes or needs upgrading, and the industrial computer can only change the integrated circuit board of various golden finger structures to this kind of condition, and the replacement cost is high, and the replacement process destroys the golden finger easily, leads to contact failure scheduling problem, and in some impact, contact well easily among the vibration environment and fail.

The above technical solution can be applied to the following scenarios.

Application scenario 1:

some algorithms for data processing are complex, or a large number of parallel computing tasks exist, and cannot be directly borne by the CPU of the X86. In some wood processing plants, accidents often occur in which workers inadvertently cut their fingers, and there has been no perfect solution since it takes at least 100ms to react from the perception of pain by humans, a time long enough to cause irrecoverable accidents.

Aiming at the application scenes, the specific technical scheme is as follows:

the co-computation unit consists of a communication module, a parallel computation module, a handshake module and an interface time sequence module,

the parallel computation module links to each other with communication module and interface time sequence module respectively, and the module of shaking hands links to each other with communication module and interface time sequence module respectively, wherein:

the communication module is connected with the traditional computing unit and communicates with the PCI/PCIe protocol main controller of the traditional computing unit through the PCI/PCIe protocol signal line,

the parallel computing module is used for parallel processing or computing, obtaining computing tasks through the communication module or the interface time sequence module and outputting computing results to the communication module or the interface time sequence module,

the handshake module is used for processing the synchronous signals of the interface timing module,

the interface time sequence module is connected with the customized computing unit and used for controlling an external interface of the customized computing unit.

The problem can be easily solved by using the comprehensive computing system, the comprehensive computing system utilizes the vibration data cut by the electric saw of the customized computing unit with the acquisition function, then analyzes the vibration data by the parallel computing unit of the assistant computing unit, identifies whether the current cut wood or human body, and if the cut wood or human body is human body, immediately informs the customized computing unit with the braking function to control the electric saw to stop immediately by the handshake module, the whole process is completed by hardware computation, the comprehensive computing system has high reliability and high real-time performance, and the whole process can not exceed 1 ms. When such an accident occurs, the finger has only some skin trauma and the power saw has stopped.

Application scenario 2:

in distributed synchronous acquisition application, GPS PPS signals are used for synchronization, and because the PPS signals are pulse signals one per second, when other subsystems needing synchronization do not receive pulses as synchronization signals, synchronization signal conversion is needed; when the synchronous period of other systems is not 1S, the phase-locked frequency division needs to be carried out on the synchronous signal; existing data acquisition systems all require customization by other synchronized subsystems to achieve these functions.

Aiming at the application scenes, the specific technical scheme is as follows:

the co-computation unit consists of a communication module, a handshake module and an interface time sequence module,

the handshake module is respectively connected with the communication module and the interface timing module,

wherein:

Some applications require synchronization of acquisition processes of multiple channels, and some applications require real-time response with logical relationship between input and output channels. Some applications require that the closed-loop control precision of the whole system is guaranteed. The channels may come from different functional boards, the cooperative processing capability among the boards of the industrial personal computer must be completed through a CPU, the cooperative processing speed of the boards is mostly in the ms level, and the requirement is difficult to meet. And the IPU can directly utilize the handshake mode of the co-computation unit to realize various synchronization requirements of each customized computation unit. The handshake module mainly provides a synchronous clock for the receiving timing module, and helps the synchronization signals such as start and stop between the timing modules of different interfaces, and the real-time data transmission between the modules. Some tasks are performed by two different customized computing interface units working alternately, so that when the tasks are switched between them, the other party is notified by handshaking, and if the other party is notified by a conventional computing unit, the time required is too long, thereby reducing the efficiency.

Application scenario 3:

in the thermal strength test of the rocket, a huge temperature field needs to be designed to simulate the severe temperature change in the rocket ascending process. Therefore, a distributed high performance closed loop controller is required, whose control period must be less than 0.1 ms. Because the traditional closed-loop control is completed in a traditional calculation unit, and because the communication links are more and the operation system scheduling is relied on, the traditional closed-loop control period can not meet the requirement.

Aiming at the application scenes, the specific technical scheme is as follows:

the co-computation unit consists of a communication module, a parallel computation module and an interface time sequence module,

the parallel computing module is respectively connected with the communication module and the interface time sequence module,

wherein:

the parallel computing module is used for processing parallel computing tasks,

Some algorithms for data processing are complex, or a large number of parallel computing tasks exist, and cannot be directly borne by the CPU of the X86. In the solution of the IPU, all closed-loop calculations are completed through a parallel calculation module of a co-calculation unit, the number of communication links is small, hardware is calculated and judged in real time, and the closed-loop control period is easily realized for 0.1 ms.

Application scenario 4:

in some data acquisition applications, signals to be acquired are special, so that standard shelf products cannot be purchased, a data acquisition card is customized and developed traditionally, the acquisition card comprises an external interface, a time sequence control interface and a communication interface, and the development of the board card is difficult, long in period and high in risk.

Aiming at the application scenes, the specific technical scheme is as follows:

the co-computation unit consists of a communication module and an interface time sequence module,

the communication module is directly connected with the interface time sequence module,

wherein:

Some application field environments are very complex, and the extended hardware selected by designers in the early stage is not suitable for use until the extended hardware is used in the field, and the re-selection or re-design is not in time. There is therefore a great need to be able to pass programmable hardware. And adopt the IPU system, only need develop customization computational element as external interface, sequential control and communication interface can directly adopt the interface time sequence module and the communication module of co-computation element to realize, like this, whole development process degree of difficulty greatly reduced, cycle shorten, research and development risk greatly reduced.

Application scenario 5:

in some data acquisition applications, the amount of data to be acquired or transmitted by a conventional computing unit is very large, so that a plurality of high-speed signal acquisition customized computing units or high-speed signal output customized computing units need to be installed in the system, if a pure GPIO protocol signal line is adopted, all the customized computing units communicate with the conventional computing unit through a parallel computing unit, and the parallel computing unit and the conventional computing unit only have one high-speed data transmission channel, so that the bandwidth bottleneck problem is caused. If the PCIe/PCI/USB protocol signal line of the IPU bus is adopted for transmission, a new data transmission channel can be added for the customization unit and the traditional calculation unit, and the customization calculation unit can still use the GPIO protocol signal line for communication with the traditional calculation unit or carry out real-time data exchange with other customization calculation units through the GPIO protocol signal line, so that the high-bandwidth channel of the customization calculation unit and the traditional calculation unit is further ensured.

Aiming at the application scenes, the specific technical scheme is as follows:

the IPU bus consists of GPIO, PCIe and USB protocol signal lines,

the IPU bus is respectively connected with the parallel computing unit and the customized computing unit,

the parallel computing unit is connected to a conventional computing unit,

wherein:

the parallel computing module is used for processing parallel computing tasks,

In some application fields, customers already have a traditional solution based on PCI/PCIe/USB, when the customers need to be transplanted to the integrated computing system, if a parallel computing unit is not needed, the customers only need to redesign a PCB according to the structural size of a customized computing unit, and if the parallel computing unit is needed, only the part of interface circuits need to be added, so that the time required for transplanting the customers to a new integrated computing system from the existing solution is greatly reduced, and the design risk is reduced.

In the above-mentioned several scenarios, the user can select the target,

the communication module is used for communication between the traditional computing unit and the assistant computing unit and consists of a PCI/PCIe bus submodule, a PCI/PCIe bus state machine submodule, an FIFO submodule, a local bus state machine submodule, a local bus submodule, a logic control submodule and a configuration parameter submodule which are respectively arranged,

the PCI/PCIe bus submodule, the PCI/PCIe bus state machine submodule, the FIFO submodule, the local bus state submodule and the local bus state machine submodule are connected in sequence, the configuration parameter submodule is connected with the logic control submodule, the logic control submodule is connected with the FIFO submodule,

the PCI/PCIe bus sub-module is connected with the PCIe protocol main controller of the traditional computing unit, the local bus sub-module is connected with the interface time sequence module, or the parallel computing module, or the handshake module,

wherein:

the PCI/PCIe bus sub-module completes the information transmission of PCI/PCIe interfaces such as data, address, control and the like,

the PCI/PCIe bus state machine submodule completes the automatic switching of the PCI/PCIe work state,

the FIFO submodule stores management data in a first-in first-out mode,

the local bus state machine submodule is used for controlling the automatic switching of various working states of the local bus,

the local bus submodule is used for realizing signal transmission of data, address, control and the like of the local bus.

The logic control sub-module is used for controlling the interface time sequence module to transmit to the traditional computing unit through the local bus state machine sub-module, the FIFO sub-module and the PCI/PCIe bus state machine sub-module, and controlling the data of the traditional computing unit to transmit to the interface time sequence module through the PCI/PCIe bus state machine sub-module, the FIFO sub-module and the local bus state machine sub-module in sequence,

and the parameter configuration sub-module initializes the logic control sub-module according to the configured relevant parameters.

The interface time sequence module is mainly used for the synergistic computing unit to control the customized computing unit through GPIO signals and communicate with the customized computing unit and consists of a read-write cache submodule, a time sequence logic submodule and a read-write control submodule,

the read-write control submodule is connected with the read-write cache submodule, the read-write cache submodule is connected with the sequential logic submodule,

the read-write control submodule is connected with a local communication bus submodule of the communication module, or is connected with a task management submodule of the parallel computing module, or is connected with a monitoring submodule of the handshake module, the sequential logic submodule is connected with a control module of the customized computing unit,

wherein:

the read-write control submodule is used for controlling the data of the customized computing unit to be transmitted to the communication module or the parallel computing module through the sequential logic submodule and the read-write cache submodule in sequence, and controlling the data of the communication module or the parallel computing data to be transmitted to the customized computing unit through the read-write cache submodule and the logic sequential submodule in sequence,

the read-write cache submodule is used for matching different communication speeds between the sequential logic submodule and the read-write control submodule,

the sequential logic submodule is used for realizing clock and data interfaces of the sequential logic bus,

the sequential logic submodule comprises an SPI sequential logic submodule or an I2C sequential logic submodule or a parallel port sequential logic submodule or a UART sequential logic submodule.

comprises a task management submodule, more than one task calculation submodule and a result collection submodule, wherein each task calculation submodule is independently connected with the task management submodule and the result collection submodule,

the task management submodule is connected with the read-write control submodule of the interface timing sequence module and is connected with the local bus communication submodule of the communication module,

wherein:

the task management submodule is used for dividing the tasks transmitted by the communication module into a plurality of independent computing subtasks and distributing the tasks to different task computing submodules,

the task computing submodule is used for computing the computing subtasks distributed by the task management submodule,

and the result collection submodule is used for collecting the calculation result of the task calculation submodule and returning the result to the communication module or the interface time sequence module.

The handshake module is used for cooperative handshake of the customized computing units, different customized computing units can realize mutual synchronous work by using the handshake module and also can realize mutual cooperative work by using the handshake module to transmit control signals, and the customized computing unit consists of a monitoring submodule, a clock source submodule, a trigger bus submodule and a custom bus submodule,

the clock source submodule, the trigger bus submodule and the self-defined bus submodule are all connected with the monitoring submodule,

the monitoring submodule is connected with the local bus communication submodule of the communication module and is connected with the read-write control submodule of the interface timing sequence module,

wherein:

the monitoring submodule is used for managing the distribution of signals and monitoring the working state of handshake,

the clock sub-module provides a clock reference,

the trigger bus submodule is used for transmitting a trigger signal,

the custom bus submodule is used for realizing data transmission among different custom computing units.

In the above application scenarios 1, 3, 4, 5,

the customized computing unit consists of a signal conditioning module, a sampling module and a control module,

the signal conditioning module is connected with the sampling module, the sampling module is connected with the control module,

the control module is connected with the sequential logic submodule of the interface sequential module,

wherein

The signal conditioning module is used for conditioning the signal,

the sampling module is used for sampling each path of analog channel and converting the analog channel into a digital signal,

the control module is used for controlling the sampling module to start and stop working and collecting or providing sampling data. In the above application scenarios 1, 3, 4, 5,

the customized computing unit consists of a signal holding module, a digital-to-analog conversion module and a control module,

the control module is connected with the analog-to-digital conversion module, the analog-to-digital conversion module is connected with the signal holding module,

wherein:

wherein the signal holding module is used for holding analog output of each channel,

the digital-to-analog conversion module is used for converting the digital signal into an analog signal,

the control module controls range switching, update rate, and data communication with the conventional compute unit/co-compute unit.

In the above application scenarios 1, 2, 4, 5,

the customized computing unit consists of a level conversion module and a control module,

the control module is connected with the level conversion module,

wherein:

wherein the level conversion module is used for converting an external input signal into an internal working signal and converting the internal working signal into an external output signal,

the control module is used for controlling level switching and inputting and outputting time sequence.

The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.

Claims

1. An integrated computing system, characterized in that,

the self-defined IPU bus slot comprises one or more protocol signal lines and GPIO signal lines,

the traditional computing unit and the co-computing unit are communicated directly through the PCI/PCIe protocol signal line of the traditional computing unit,

the traditional computing unit and the customized computing unit communicate through a protocol signal line carried by the traditional computing unit in the self-defined IPU bus slot,

and the co-calculation unit and the customized calculation unit are communicated through GPIO signal lines in the self-defined IPU bus slot.

2. An integrated computing system as recited in claim 1,

the traditional computing unit and the customized computing unit communicate through a PCI/PCIe or USB protocol signal line carried by the traditional computing unit in the self-defined IPU bus slot.

3. An integrated computing system as recited in claim 1,

the conventional computing unit employs an X86 platform or an ARM platform,

the co-computation unit adopts an FPGA platform or a CPLD platform.

4. An integrated computing system as recited in claim 1,

5. An integrated computing system as recited in claim 1,

wherein:

the communication module is connected with the traditional computing unit and communicates with the protocol main controller of the traditional computing unit through the protocol signal wire of the traditional computing unit,

the parallel computing module is used for processing parallel computing tasks,

6. An integrated computing system as recited in claim 5,

wherein:

the FIFO submodule stores management data in a first-in first-out mode,

the local bus submodule is used for realizing signal transmission of data, address, control and the like of the local bus,

7. An integrated computing system as recited in claim 5,

wherein:

8. An integrated computing system as recited in claim 5,

wherein:

9. An integrated computing system as recited in claim 1,

wherein

The signal conditioning module is used for conditioning the signal,

the control module is used for controlling the sampling module to start and stop working and collecting or providing sampling data;

alternatively, the first and second electrodes may be,

wherein:

the control module controls range switching, updating rate and data communication with the traditional computing unit/the co-computing unit;

alternatively, the first and second electrodes may be,

the control module is connected with the level conversion module,

wherein: