CN1137197A - 利用可控振荡器的电路装置产生同步时钟的方法 - Google Patents

利用可控振荡器的电路装置产生同步时钟的方法 Download PDF

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Publication number
CN1137197A
CN1137197A CN 94106554 CN94106554A CN1137197A CN 1137197 A CN1137197 A CN 1137197A CN 94106554 CN94106554 CN 94106554 CN 94106554 A CN94106554 A CN 94106554A CN 1137197 A CN1137197 A CN 1137197A
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CN
China
Prior art keywords
frequency
signal
phase
output
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN 94106554
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English (en)
Chinese (zh)
Inventor
克劳斯-哈特维希·里德
冈特·霍希
威廉·爱德华·鲍威尔
弗朗西斯克·莱德
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel Lucent NV
Original Assignee
Alcatel NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19934319066 external-priority patent/DE4319066A1/de
Application filed by Alcatel NV filed Critical Alcatel NV
Publication of CN1137197A publication Critical patent/CN1137197A/zh
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
    • H03L7/0994—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising an accumulator
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/1806—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop the frequency divider comprising a phase accumulator generating the frequency divided signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
    • H03L7/1976—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider
    • H03L7/1978—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider using a cycle or pulse removing circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/22—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
    • H03L7/23—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop with pulse counters or frequency dividers
    • H03L7/235—Nested phase locked loops
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0331—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
CN 94106554 1993-06-09 1994-06-09 利用可控振荡器的电路装置产生同步时钟的方法 Pending CN1137197A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US7410893A 1993-06-09 1993-06-09
DE19934319066 DE4319066A1 (de) 1993-06-09 1993-06-09 Schaltungsanordnung für einen regelbaren Oszillator

Publications (1)

Publication Number Publication Date
CN1137197A true CN1137197A (zh) 1996-12-04

Family

ID=25926611

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 94106554 Pending CN1137197A (zh) 1993-06-09 1994-06-09 利用可控振荡器的电路装置产生同步时钟的方法

Country Status (3)

Country Link
EP (1) EP0630129A2 (enExample)
JP (1) JPH07143000A (enExample)
CN (1) CN1137197A (enExample)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100505828C (zh) * 2003-12-19 2009-06-24 松下电器产业株式会社 同步时钟产生装置及同步时钟产生方法
CN101064520B (zh) * 2006-04-26 2012-07-04 瑞萨电子株式会社 数字广播接收装置和数字广播系统
CN103338041A (zh) * 2013-07-16 2013-10-02 广州致远电子股份有限公司 同步采样时钟发生电路、发生方法及电能质量分析仪
CN111342776A (zh) * 2018-12-18 2020-06-26 精工爱普生株式会社 电路装置、振荡器、电子设备以及移动体

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0665651A3 (en) * 1994-01-31 1995-11-08 Hewlett Packard Co Frequency synthesizer with phase synchronization loop comprising a digital rate multiplier circuit.
NL9500034A (nl) * 1995-01-06 1996-08-01 X Integrated Circuits Bv Frequentiesyntheseschakeling.
JP2001230660A (ja) * 2000-02-17 2001-08-24 Matsushita Electric Ind Co Ltd クロック信号発生装置およびそれを用いた通信装置
WO2002005431A1 (en) * 2000-07-10 2002-01-17 Ciena Corporation Frequency synthesizer
JP4691024B2 (ja) * 2003-05-02 2011-06-01 シリコン・ラボラトリーズ・インコーポレーテツド 低ジッタ２ループフラクショナルｎ合成器のための方法および装置
TWI378648B (en) * 2005-03-21 2012-12-01 Integrated Device Tech Frequency calibration system and apparatus and method for frequency calibration of an oscillator

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3928813A (en) * 1974-09-26 1975-12-23 Hewlett Packard Co Device for synthesizing frequencies which are rational multiples of a fundamental frequency
US3976945A (en) * 1975-09-05 1976-08-24 Hewlett-Packard Company Frequency synthesizer
GB2049245A (en) * 1979-05-09 1980-12-17 Marconi Co Ltd Frequency synthesisers
GB2117199A (en) * 1982-03-19 1983-10-05 Philips Electronic Associated Frequency synthesiser
US4590602A (en) * 1983-08-18 1986-05-20 General Signal Wide range clock recovery circuit
EP0278140A1 (en) * 1987-02-12 1988-08-17 Hewlett-Packard Limited Clock signal generation

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100505828C (zh) * 2003-12-19 2009-06-24 松下电器产业株式会社 同步时钟产生装置及同步时钟产生方法
CN101064520B (zh) * 2006-04-26 2012-07-04 瑞萨电子株式会社 数字广播接收装置和数字广播系统
CN103338041A (zh) * 2013-07-16 2013-10-02 广州致远电子股份有限公司 同步采样时钟发生电路、发生方法及电能质量分析仪
CN103338041B (zh) * 2013-07-16 2016-09-07 广州致远电子股份有限公司 同步采样时钟发生方法及电能质量分析仪
CN111342776A (zh) * 2018-12-18 2020-06-26 精工爱普生株式会社 电路装置、振荡器、电子设备以及移动体
CN111342776B (zh) * 2018-12-18 2023-09-29 精工爱普生株式会社 电路装置、振荡器、电子设备以及移动体

Also Published As

Publication number Publication date
EP0630129A2 (de) 1994-12-21
JPH07143000A (ja) 1995-06-02
EP0630129A3 (enExample) 1995-01-11

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WD01 Invention patent application deemed withdrawn after publication