CN113707727B - 一种具有倒梯形槽的垂直GaN二极管 - Google Patents

一种具有倒梯形槽的垂直GaN二极管 Download PDF

Info

Publication number
CN113707727B
CN113707727B CN202111000769.XA CN202111000769A CN113707727B CN 113707727 B CN113707727 B CN 113707727B CN 202111000769 A CN202111000769 A CN 202111000769A CN 113707727 B CN113707727 B CN 113707727B
Authority
CN
China
Prior art keywords
barrier layer
gan
conductive material
layer
inverted trapezoidal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202111000769.XA
Other languages
English (en)
Other versions
CN113707727A (zh
Inventor
魏杰
廖德尊
张�成
罗小蓉
邓思宇
贾艳江
孙涛
郗路凡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
University of Electronic Science and Technology of China
Original Assignee
University of Electronic Science and Technology of China
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by University of Electronic Science and Technology of China filed Critical University of Electronic Science and Technology of China
Priority to CN202111000769.XA priority Critical patent/CN113707727B/zh
Publication of CN113707727A publication Critical patent/CN113707727A/zh
Application granted granted Critical
Publication of CN113707727B publication Critical patent/CN113707727B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H01L29/872—Schottky diodes
    • H01L29/8725—Schottky diodes of the trench MOS barrier type [TMBS]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]

Abstract

本发明属于功率半导体技术领域，涉及一种具有倒梯形槽的垂直GaN二极管。本发明主要特征在于：通过倒梯形槽结构设计，新件构在部分肖特基阳极金属与势垒层之间插入介质层，并在体内引入P‑GaN高掺杂阻挡层与碳掺杂GaN阻挡层以有效降低势垒层中电场；因此，相较于传统电流孔径垂直电子晶体管(CAVET)，本发明不仅增加倒梯形底部电流孔径横向尺寸以降低导通电阻，还能能有效抑制反向泄漏电流；同时，本发明兼具横向GaN HEMT器件中二维电子气作为沟道以降低器件导通电阻的优势。

Description

一种具有倒梯形槽的垂直GaN二极管
技术领域
本发明属于功率半导体技术领域，涉及一种具有倒梯形槽的垂直GaN二极管。
背景技术
与第一代半导体材料Si相比，第三代宽禁带半导体材料GaN具有更为优秀的材料物理特性，其禁带宽度、电子迁移率、电子饱和速率、临界击穿电场、热导率和高/低频Baliga优值等物理参数均远高于Si材料。AlGaN/GaN肖特基势垒二极管(SBD)在大功率开关应用中表现出优异的性能，例如开关速度快、导通电阻低等。
但由于肖特基势垒在高电压偏置条件下降低，SBD通常具有较大的反向泄漏电流，为了减少开关电路中二极管的静态功率损耗，需要尽量降低反向泄漏电流。常用的几种降低器件泄漏电流的技术有肖特基结终端、AlGaN背势垒技术等。
对于传统的电流孔径垂直电子晶体管(CAVET)，当器件处于关断状态时，为了降低通过电流孔径到达栅极和源极的反向泄漏电流，通常将电流孔径的横向尺寸设计的较小，但这会导致导通电阻的增加以及饱和电流的降低。
发明内容
本发明基于GaN功率二极管应用的需要，提出一种具有倒梯形槽的垂直GaN二极管。
本发明的技术方案是：
一种具有倒梯形槽的垂直GaN二极管，包括沿器件垂直方向自下而上依次层叠设置的第一导电材料1、N型高掺杂GaN层2、N型GaN漂移区3、P型高掺杂GaN阻挡层4、碳掺杂GaN阻挡层5；
所述P型高掺杂GaN阻挡层4、碳掺杂GaN阻挡层5上设置有倒梯形凹槽，在凹槽底部和侧壁分布有未掺杂GaN层6，且未掺杂GaN层6还沿倒梯形凹槽外部平面向两侧延伸至覆盖GaN阻挡层5上表面；在未掺杂GaN层6上表面覆盖有势垒层7，在势垒层7上表面覆盖有介质层8；在介质层8上表面远离倒梯形凹槽的一侧设置有凹槽，第二导电材料9覆盖在介质层8上表面并填充在凹槽中，位于凹槽中的第二导电材料9下表面与势垒层7上表面接触；
所述第一导电材料1与所述N型高掺杂GaN层2形成欧姆接触，所述第一导电材料1的引出端为阴极；所述第二导电材料9与所述的势垒层7形成肖特基接触，且所述的第二导电材料9的引出端为阳极。
进一步的，所述势垒层7采用的材料为AlN、AlGaN、InGaN、InAlN中的一种或几种的组合；
本发明的有益效果是：相较于传统电流孔径垂直电子晶体管(CAVET)，本发明在增加电流孔径横向尺寸以降低导通电阻的同时，不会引起反向泄漏电流的增加；器件通过倒梯形槽的结构设计，允许器件在部分肖特基阳极金属与势垒层之间插入介质层，有利于降低器件的反向泄漏电流，摆脱电流孔径横向尺寸设计的限制；与器件横向方向呈一定角度的异质结区域，当阳极电压为0V时，半极性面降低了该区域的二维电子气浓度，实现了器件的常关功能；P-GaN高掺杂阻挡层与碳掺杂GaN阻挡层进一步抑制了器件关断状态下的泄漏电流，有利于提升器件关断特性；此外，器件兼具GaN横向器件与纵向器件的优势，横向AlGaN/GaN异质结构引入的二维电子气有利于降低器件的导通电阻，纵向GaN漂移区使得器件提高击穿电压的同时不会扩大芯片尺寸。
附图说明
图1是实施例1的结构示意图。
具体实施方式
下面结合附图和实施例，详细描述本发明的技术方案：
实施例1
如图1所示，本例的一种具有倒梯形槽的垂直GaN二极管，包括沿器件垂直方向自下而上依次层叠设置的第一导电材料1、N型高掺杂GaN层2、N型GaN漂移区3、P型高掺杂GaN阻挡层4、碳掺杂GaN阻挡层5；
沿器件垂直方向，所述碳掺杂GaN阻挡层5上表面覆盖有未掺杂GaN层6；其中部分所述的未掺杂GaN层6沿器件垂直方向贯穿所述的碳掺杂GaN阻挡层5与所述的P型高掺杂GaN阻挡层4，使得该部分未掺杂GaN层6的下表面与所述的N型GaN漂移区3的上表面、所述的P型高掺杂GaN阻挡层4的侧壁和所述的碳掺杂GaN阻挡层5的侧壁接触，形成倒梯形凹槽；
沿器件垂直方向，所述的未掺杂GaN层6上表面自下而上依次覆盖有势垒层7、介质层8和第二导电材料9，其中部分所述的第二导电材料9沿器件垂直方向在所述的倒梯形凹槽上方以外区域贯穿所述的介质层8，并与所述的势垒层7的上表面和所述的介质层8的侧壁接触；
所述第一导电材料1与所述N型高掺杂GaN层2形成欧姆接触，所述第一导电材料1的引出端为阴极；所述第二导电材料9与所述的势垒层7形成肖特基接触，且所述的第二导电材料9的引出端为阳极；
本发明摆脱了传统电流孔径垂直电子晶体管电流孔径横向尺寸设计的制约；通过倒梯形槽的结构设计，器件能够在获得较大饱和电流的同时，利用P型高掺杂GaN层、碳掺杂阻挡层以及介质层降低器件的反向泄漏电流；本发明具有击穿电压高，比导通电阻低等优点。

Claims (2)

1.一种具有倒梯形槽的垂直GaN二极管，包括沿器件垂直方向自下而上依次层叠设置的第一导电材料(1)、N型高掺杂GaN层(2)、N型GaN漂移区(3)、P型高掺杂GaN阻挡层(4)、碳掺杂GaN阻挡层(5)；
其特征在于：
所述P型高掺杂GaN阻挡层(4)、碳掺杂GaN阻挡层(5)上设置有倒梯形凹槽，在凹槽底部和侧壁分布有未掺杂GaN层(6)，且未掺杂GaN层(6)还沿倒梯形凹槽外部平面向两侧延伸至覆盖GaN阻挡层(5)上表面；在未掺杂GaN层(6)上表面覆盖有势垒层(7)，在势垒层(7)上表面覆盖有介质层(8)；在介质层(8)上表面远离倒梯形凹槽的一侧设置有凹槽，第二导电材料(9)覆盖在介质层(8)上表面并填充在凹槽中，位于凹槽中的第二导电材料(9)下表面与势垒层(7)上表面接触；
所述第一导电材料(1)与所述N型高掺杂GaN层(2)形成欧姆接触，所述第一导电材料(1)的引出端为阴极；所述第二导电材料(9)与所述的势垒层(7)形成肖特基接触，且所述的第二导电材料(9)的引出端为阳极。
2.根据权利要求1所述的一种垂直GaN二极管，其特征在于，所述势垒层(7)采用的材料为AlN、AlGaN、InGaN、InAlN中的一种或几种的组合。
CN202111000769.XA 2021-08-30 2021-08-30 一种具有倒梯形槽的垂直GaN二极管 Active CN113707727B (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202111000769.XA CN113707727B (zh) 2021-08-30 2021-08-30 一种具有倒梯形槽的垂直GaN二极管

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111000769.XA CN113707727B (zh) 2021-08-30 2021-08-30 一种具有倒梯形槽的垂直GaN二极管

Publications (2)

Publication Number Publication Date
CN113707727A CN113707727A (zh) 2021-11-26
CN113707727B true CN113707727B (zh) 2023-03-28

Family

ID=78656489

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202111000769.XA Active CN113707727B (zh) 2021-08-30 2021-08-30 一种具有倒梯形槽的垂直GaN二极管

Country Status (1)

Country Link
CN (1) CN113707727B (zh)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103078027A (zh) * 2013-01-31 2013-05-01 武汉迪源光电科技有限公司 一种具有电流阻挡层的发光二极管

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8772901B2 (en) * 2011-11-11 2014-07-08 Alpha And Omega Semiconductor Incorporated Termination structure for gallium nitride schottky diode
US9640627B2 (en) * 2012-03-07 2017-05-02 Cree, Inc. Schottky contact
TWI560890B (en) * 2015-04-24 2016-12-01 Univ Nat Central Diode device and method for forming the same
TWI762486B (zh) * 2016-05-31 2022-05-01 美商創世舫科技有限公司 包含漸變空乏層的三族氮化物裝置
JP7303807B2 (ja) * 2018-07-17 2023-07-05 パナソニックホールディングス株式会社 窒化物半導体装置

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103078027A (zh) * 2013-01-31 2013-05-01 武汉迪源光电科技有限公司 一种具有电流阻挡层的发光二极管

Also Published As

Publication number Publication date
CN113707727A (zh) 2021-11-26

Similar Documents

Publication Publication Date Title
CN107093628B (zh) 一种极化掺杂增强型hemt器件
CN107359196B (zh) 半导体装置
US20150270355A1 (en) Semiconductor device and manufacturing method for the same
CN110392929A (zh) 氮化镓晶体管
CN107482059B (zh) 一种GaN异质结纵向逆导场效应管
CN111739934B (zh) 一种具有结型场板的氮化镓高电子迁移率晶体管
CN105097911A (zh) 一种具有结型半导体层的hemt器件
US11588045B2 (en) Fortified trench planar MOS power transistor
CN111969047B (zh) 一种具有复合背势垒层的氮化镓异质结场效应晶体管
CN114447102A (zh) 具有衬底上复合半导体层的氮化镓异质结场效应晶体管
CN107623032A (zh) 一种新型的GaN异质结场效应晶体管
CN111312815B (zh) GaN基功率晶体管结构及其制备方法
WO2023273900A1 (zh) 一种低动态电阻增强型GaN器件
CN113690311B (zh) 一种集成续流二极管的GaN HEMT器件
CN113675270A (zh) 一种具有逆向导通能力的GaN RC-HEMT
CN116913951A (zh) 一种具有P型埋层的双沟道增强型GaN HEMT器件
CN113707727B (zh) 一种具有倒梯形槽的垂直GaN二极管
CN113611742B (zh) 一种集成肖特基管的GaN功率器件
CN115513293A (zh) 一种增强型氮化镓异质结场效应晶体管
CN115332334A (zh) 具有反向续流能力的集成二极管的GaN HEMT纵向器件
US20230065808A1 (en) Vertical field-effect transistor, method for producing a vertical field-effect transistor and component having vertical field-effect transistors
CN114864687A (zh) 一种集成自反馈栅控制结构的氮化镓功率半导体器件
US20230387284A1 (en) Enhancement mode switching devices and manufacturing methods thereof
CN113611741B (zh) 一种具有鳍状结构的GaN HMET器件
CN114068677B (zh) 一种AlGaN沟槽的增强型高压GaN基垂直HFET装置

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant