CN113506753A - Method for detecting plane deformation of silicon wafer - Google Patents
Method for detecting plane deformation of silicon wafer Download PDFInfo
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- CN113506753A CN113506753A CN202110707320.0A CN202110707320A CN113506753A CN 113506753 A CN113506753 A CN 113506753A CN 202110707320 A CN202110707320 A CN 202110707320A CN 113506753 A CN113506753 A CN 113506753A
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- silicon wafer
- displacement
- alignment mark
- axis direction
- plane
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
- G03F7/70605—Workpiece metrology
- G03F7/70616—Monitoring the printed patterns
- G03F7/70633—Overlay, i.e. relative alignment between patterns printed by separate exposures in different layers, or in the same layer in multiple exposures or stitching
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
- G03F7/70605—Workpiece metrology
- G03F7/70616—Monitoring the printed patterns
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
Abstract
The application discloses a method for detecting plane deformation of a silicon wafer, and relates to the field of semiconductor manufacturing. The method for detecting the plane deformation of the silicon wafer comprises the steps of obtaining the silicon wafer, wherein a contraposition mark is formed on the silicon wafer; putting the silicon wafer into an exposure machine; measuring the displacement of the alignment mark on the silicon wafer by using the exposure machine; detecting whether the silicon wafer deforms in a plane or not according to the displacement of the alignment mark on the silicon wafer obtained through measurement; the problem that the deformation condition of the silicon wafer in a plane cannot be detected at present is solved; the effect of effectively monitoring the deformation condition of the silicon wafer in the plane is achieved.
Description
Technical Field
The application relates to the field of semiconductor manufacturing, in particular to a method for detecting plane deformation of a silicon wafer.
Background
In the production and manufacturing process of the semiconductor device, processes such as etching, oxidation, deposition, photoetching and the like are carried out on a silicon wafer. In these processes, the silicon wafer is subjected to a high temperature process heat treatment.
The high temperature process can cause the silicon chip to warp and deform. At present, when the deformation of a silicon wafer is detected, the conventional means can only detect the warpage of the silicon wafer in the Z direction, but cannot detect the nano-scale displacement deformation of the silicon wafer in the X direction and the Y direction.
Along with the continuous reduction of the size of the device, the alignment precision is smaller and smaller, the alignment of the front and the back processes is more and more important, and the alignment degree of the alignment directly influences the yield of the device. If the displacement deformation of the silicon wafer in the X direction and the Y direction cannot be monitored in advance, the alignment effect of the front and the back working procedures is difficult to guarantee.
Disclosure of Invention
In order to solve the problems in the related art, the application provides a method for detecting the plane deformation of a silicon wafer. The technical scheme is as follows:
on one hand, the embodiment of the application provides a method for detecting the plane deformation of a silicon wafer, which comprises the following steps:
obtaining a silicon wafer, wherein a contraposition mark is formed on the silicon wafer;
putting the silicon wafer into an exposure machine;
measuring the displacement of the alignment mark on the silicon wafer by using an exposure machine;
and detecting whether the silicon wafer deforms in the plane or not according to the displacement of the alignment mark on the silicon wafer obtained by measurement.
Optionally, the silicon wafer placed in the exposure machine is not coated with the photoresist.
Optionally, measuring the displacement of the alignment mark on the silicon wafer by using an exposure machine includes:
and aligning the silicon wafer by using the exposure machine table, and measuring the displacement of the alignment mark on the silicon wafer to obtain a displacement vector diagram corresponding to the alignment mark.
Optionally, detecting whether the silicon wafer is deformed in the plane according to the measured displacement of the alignment mark on the silicon wafer, includes:
determining the displacement of the alignment mark on the silicon chip according to the displacement vector diagram;
and detecting whether the silicon chip is deformed in the plane or not according to the displacement of the alignment mark.
Optionally, detecting whether the silicon wafer is deformed in the plane according to the displacement of the alignment mark includes:
detecting whether the silicon wafer deforms in the X-axis direction according to the displacement of the alignment mark in the X-axis direction;
and detecting whether the silicon chip deforms in the Y-axis direction according to the displacement of the alignment mark in the Y-axis direction.
Optionally, the method further includes:
and determining the deformation degree of the silicon chip in the X-axis direction and/or the Y-axis direction according to the displacement of the alignment mark.
Optionally, the method further includes:
and establishing statistical process control according to the displacement of the alignment mark.
Optionally, the silicon wafer placed in the exposure machine is a heat-treated silicon wafer.
The technical scheme at least comprises the following advantages:
the method comprises the steps of measuring the displacement of an alignment mark on a silicon wafer by using an exposure machine platform by obtaining the silicon wafer and placing the silicon wafer into the exposure machine platform, and detecting whether the silicon wafer deforms in a plane or not according to the measured displacement of the alignment mark; the problem that the deformation condition of the silicon wafer in a plane cannot be detected at present is solved; the effect of effectively monitoring the deformation condition of the silicon wafer in the plane is achieved.
Drawings
In order to more clearly illustrate the detailed description of the present application or the technical solutions in the prior art, the drawings needed to be used in the detailed description of the present application or the prior art description will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 is a flowchart of a method for detecting planar deformation of a silicon wafer according to an embodiment of the present application.
Detailed Description
The technical solutions in the present application will be described clearly and completely with reference to the accompanying drawings, and it is obvious that the described embodiments are some, but not all embodiments of the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplicity of description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present application, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; the connection can be mechanical connection or electrical connection; the two elements may be directly connected or indirectly connected through an intermediate medium, or may be communicated with each other inside the two elements, or may be wirelessly connected or wired connected. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art.
In addition, the technical features mentioned in the different embodiments of the present application described below may be combined with each other as long as they do not conflict with each other.
Referring to fig. 1, a flowchart of a method for detecting planar deformation of a silicon wafer according to an embodiment of the present application is shown, where the method at least includes the following steps:
in step 101, a silicon wafer is obtained, and alignment marks are formed on the silicon wafer.
Optionally, the obtained silicon wafer is processed through a plurality of processes, and the plurality of processes include a high temperature process. After being processed by a plurality of procedures, the silicon wafer may deform in the plane of the silicon wafer, so that the deformation condition of the silicon wafer in the plane needs to be detected.
In step 102, the silicon wafer is placed in an exposure tool.
And monitoring the deformation condition of the silicon wafer in the plane by using an exposure machine.
In step 103, the exposure tool is used to measure the displacement of the alignment mark on the silicon wafer.
In step 104, it is detected whether the silicon wafer is deformed in the plane according to the measured displacement of the alignment mark on the silicon wafer.
The silicon slice deforms in the plane of the silicon slice, namely, crystal lattices in the silicon slice slip, so that the silicon slice stretches or contracts in the X-axis direction and/or the Y-axis direction.
Optionally, detecting whether the displacement of the alignment mark is within a predetermined range with respect to the displacement of the alignment mark in the X-axis direction or the Y-axis direction; aiming at the X-axis direction, if the displacement of the alignment mark is detected to be within a preset range, determining that the silicon wafer is not deformed in the X-axis direction; if the displacement of the alignment mark is detected not to be within a preset range, determining that the silicon wafer deforms in the X-axis direction; aiming at the Y-axis direction, if the displacement of the alignment mark is detected to be within a preset range, determining that the silicon wafer is not deformed in the Y-axis direction; and if the displacement of the alignment mark is detected not to be within the preset range, determining that the silicon wafer deforms in the Y-axis direction.
In summary, the method for detecting planar deformation of a silicon wafer according to the embodiment of the present application includes obtaining a silicon wafer with an alignment mark, placing the silicon wafer into an exposure machine, measuring a displacement of the alignment mark on the silicon wafer by using the exposure machine, and detecting whether the silicon wafer deforms in a plane according to the measured displacement of the alignment mark; the problem that the deformation condition of the silicon wafer in a plane cannot be detected at present is solved; the effect of effectively monitoring the deformation condition of the silicon wafer in the plane is achieved.
Wherein, the silicon chip put into the exposure machine is not coated with the photoresist.
Optionally, the silicon wafer placed in the exposure machine is a heat-treated silicon wafer.
In an alternative embodiment based on the embodiment shown in fig. 1, the step 103, namely the step of measuring the displacement of the alignment mark on the silicon wafer by using the exposure tool, can be implemented as follows:
in step 1031, the exposure machine is used to align the silicon wafer, and the displacement of the alignment mark on the silicon wafer is measured to obtain the displacement vector diagram of the alignment mark.
The displacement mark vector diagram comprises each alignment mark on the silicon chip and an X-axis direction vector and a Y-axis direction vector corresponding to each alignment mark; the larger the vector, the larger the displacement of the alignment mark.
In step 1032, whether the silicon chip is deformed in the plane is detected according to the displacement of the alignment mark.
Optionally, whether the silicon wafer deforms in the X-axis direction is detected according to the displacement of the alignment mark in the X-axis direction.
Optionally, it is detected whether the displacement amount of the alignment mark in the X-axis direction is within a predetermined range, if it is detected that the displacement amount of the alignment mark in the X-axis direction is within the predetermined range, it indicates that the silicon wafer is not deformed in the X-axis direction, and if it is detected that the displacement amount of the alignment mark in the X-axis direction is not within the predetermined range, it indicates that the silicon wafer is deformed in the X-axis direction.
Optionally, whether the silicon wafer deforms in the Y-axis direction is detected according to the displacement of the alignment mark in the Y-axis direction.
Optionally, it is detected whether the displacement amount of the alignment mark in the Y-axis direction is within a predetermined range, if it is detected that the displacement amount of the alignment mark in the Y-axis direction is within the predetermined range, it indicates that the silicon wafer is not deformed in the Y-axis direction, and if it is detected that the displacement amount of the alignment mark in the X-axis direction is not within the predetermined range, it indicates that the silicon wafer is deformed in the Y-axis direction.
In an alternative embodiment based on the embodiment shown in fig. 1, the method further comprises: and determining the deformation degree of the silicon chip in the X-axis direction and/or the Y-axis direction according to the displacement of the alignment mark.
And determining the deformation degree of the silicon wafer in the X-axis direction according to the displacement amounts of all the alignment marks on the silicon wafer in the X-axis direction.
And determining the deformation degree of the silicon wafer in the Y-axis direction according to the displacement amounts of all the alignment marks on the silicon wafer in the Y-axis direction.
In an alternative embodiment based on the embodiment shown in fig. 1, the method further comprises: and establishing SPC (Statistical Process Control) according to the displacement of the alignment mark to realize monitoring of the plane deformation condition of the silicon wafer.
According to the method for detecting the plane deformation of the silicon wafer, the silicon wafer with the alignment mark is sent to the exposure machine table, glue is not coated on the surface of the silicon wafer, the exposure machine table is used for aligning the silicon wafer, the displacement of the alignment mark on the silicon wafer is measured, the non-contact detection of the deformation condition of the silicon wafer in the plane is realized, and the subsequent circulation of the silicon wafer is not influenced; the precision of alignment in the subsequent process is improved by detecting the deformation condition of the silicon wafer in the plane in advance. For the silicon wafer processed by the high-temperature process, the influence of the high-temperature process on the silicon wafer can be effectively monitored.
It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications of this invention are intended to be covered by the scope of the invention as expressed herein.
Claims (8)
1. A method for detecting plane deformation of a silicon wafer is characterized by comprising the following steps:
obtaining a silicon wafer, wherein a contraposition mark is formed on the silicon wafer;
putting the silicon wafer into an exposure machine;
measuring the displacement of the alignment mark on the silicon wafer by using the exposure machine;
and detecting whether the silicon wafer deforms in a plane or not according to the displacement of the alignment mark on the silicon wafer obtained by measurement.
2. The method of claim 1, wherein the silicon wafer placed in the exposure tool is not coated with photoresist.
3. The method as claimed in claim 1 or 2, wherein measuring the displacement of the alignment mark on the silicon wafer by the exposure tool comprises:
and aligning the silicon wafer by using the exposure machine table, measuring the displacement of the alignment mark on the silicon wafer, and obtaining a displacement vector diagram corresponding to the alignment mark.
4. The method as claimed in claim 3, wherein the detecting whether the silicon wafer is deformed in a plane according to the measured displacement of the alignment mark on the silicon wafer comprises:
determining the displacement of the alignment mark on the silicon chip according to the displacement vector diagram;
and detecting whether the silicon wafer deforms in a plane or not according to the displacement of the alignment mark.
5. The method according to claim 1 or 4, wherein the detecting whether the silicon wafer is deformed in a plane according to the displacement of the alignment mark comprises:
detecting whether the silicon wafer deforms in the X-axis direction according to the displacement of the alignment mark in the X-axis direction;
and detecting whether the silicon wafer deforms in the Y-axis direction according to the displacement of the alignment mark in the Y-axis direction.
6. The method of claim 1 or 4, further comprising:
and determining the deformation degree of the silicon wafer in the X-axis direction and/or the Y-axis direction according to the displacement of the alignment mark.
7. The method of any of claims 1 to 6, further comprising:
and establishing statistical process control according to the displacement of the alignment mark.
8. The method according to any one of claims 1 to 7, wherein the silicon wafer placed in the exposure tool is a heat-treated silicon wafer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110707320.0A CN113506753A (en) | 2021-06-17 | 2021-06-17 | Method for detecting plane deformation of silicon wafer |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202110707320.0A CN113506753A (en) | 2021-06-17 | 2021-06-17 | Method for detecting plane deformation of silicon wafer |
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| CN113506753A true CN113506753A (en) | 2021-10-15 |
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| CN202110707320.0A Pending CN113506753A (en) | 2021-06-17 | 2021-06-17 | Method for detecting plane deformation of silicon wafer |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114002226A (en) * | 2021-10-29 | 2022-02-01 | 西安奕斯伟材料科技有限公司 | Silicon wafer detection method |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1550910A (en) * | 2003-05-13 | 2004-12-01 | Asml荷兰有限公司 | Method of characterising a process step and device manufacturing method |
| JP2009014864A (en) * | 2007-07-02 | 2009-01-22 | Hitachi High-Technologies Corp | Exposure apparatus, exposure method and method for manufacturing display panel substrate |
| CN101369548A (en) * | 2007-08-14 | 2009-02-18 | 中芯国际集成电路制造(上海)有限公司 | Method for detecting whether present layer aligning with anterior layer of chip |
| CN101542231A (en) * | 2006-11-21 | 2009-09-23 | 康宁股份有限公司 | Gauge to measure distortion in glass sheet |
| CN105336637A (en) * | 2015-09-24 | 2016-02-17 | 武汉新芯集成电路制造有限公司 | Method for measuring wafer deformation |
| CN106483770A (en) * | 2015-08-31 | 2017-03-08 | 中芯国际集成电路制造(上海)有限公司 | Alignment precision compensation method |
| CN107850862A (en) * | 2015-07-13 | 2018-03-27 | Asml荷兰有限公司 | Lithographic equipment and device making method |
-
2021
- 2021-06-17 CN CN202110707320.0A patent/CN113506753A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1550910A (en) * | 2003-05-13 | 2004-12-01 | Asml荷兰有限公司 | Method of characterising a process step and device manufacturing method |
| CN101542231A (en) * | 2006-11-21 | 2009-09-23 | 康宁股份有限公司 | Gauge to measure distortion in glass sheet |
| JP2009014864A (en) * | 2007-07-02 | 2009-01-22 | Hitachi High-Technologies Corp | Exposure apparatus, exposure method and method for manufacturing display panel substrate |
| CN101369548A (en) * | 2007-08-14 | 2009-02-18 | 中芯国际集成电路制造(上海)有限公司 | Method for detecting whether present layer aligning with anterior layer of chip |
| CN107850862A (en) * | 2015-07-13 | 2018-03-27 | Asml荷兰有限公司 | Lithographic equipment and device making method |
| CN106483770A (en) * | 2015-08-31 | 2017-03-08 | 中芯国际集成电路制造(上海)有限公司 | Alignment precision compensation method |
| CN105336637A (en) * | 2015-09-24 | 2016-02-17 | 武汉新芯集成电路制造有限公司 | Method for measuring wafer deformation |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114002226A (en) * | 2021-10-29 | 2022-02-01 | 西安奕斯伟材料科技有限公司 | Silicon wafer detection method |
| CN114002226B (en) * | 2021-10-29 | 2024-01-26 | 西安奕斯伟材料科技股份有限公司 | Silicon wafer detection method |
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