CN115180588A - Test structure for measuring alignment deviation - Google Patents

Test structure for measuring alignment deviation Download PDF

Info

Publication number
CN115180588A
CN115180588A CN202210758698.8A CN202210758698A CN115180588A CN 115180588 A CN115180588 A CN 115180588A CN 202210758698 A CN202210758698 A CN 202210758698A CN 115180588 A CN115180588 A CN 115180588A
Authority
CN
China
Prior art keywords
region
silicon
wafer
cubes
bonding material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202210758698.8A
Other languages
Chinese (zh)
Inventor
王俊杰
徐爱斌
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Huahong Grace Semiconductor Manufacturing Corp
Original Assignee
Shanghai Huahong Grace Semiconductor Manufacturing Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Huahong Grace Semiconductor Manufacturing Corp filed Critical Shanghai Huahong Grace Semiconductor Manufacturing Corp
Priority to CN202210758698.8A priority Critical patent/CN115180588A/en
Publication of CN115180588A publication Critical patent/CN115180588A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/02—Microstructural systems; Auxiliary parts of microstructural devices or systems containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS]
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C99/00—Subject matter not provided for in other groups of this subclass
    • B81C99/0035—Testing
    • B81C99/004—Testing during manufacturing
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2201/00—Specific applications of microelectromechanical systems
    • B81B2201/02—Sensors
    • B81B2201/0228—Inertial sensors
    • B81B2201/0235—Accelerometers
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2201/00—Specific applications of microelectromechanical systems
    • B81B2201/02—Sensors
    • B81B2201/0264—Pressure sensors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Micromachines (AREA)

Abstract

The application discloses a test structure for measuring alignment deviation includes: a silicon cube, a top layer of which is formed with a first bonding material layer formed on a dielectric film formed on a first wafer; a second layer of bonding material formed on the second wafer; the test area comprises a central area, the silicon cubes are formed in a first area and a second area in the test area from the top view, a plurality of silicon cubes are formed in the first area, a plurality of silicon cubes are formed in the second area, the first area is located above the central area, the second area is located on the right side of the central area, each silicon cube in the first area is parallel to each other, each silicon cube in the second area is parallel to each other, and the second bonding material layer is rectangular. The alignment deviation of the sensor wafer can be measured by detecting the conducted silicon cube, and the accuracy of monitoring the alignment accuracy is improved.

Description

Test structure for measuring alignment deviation
Technical Field
The application relates to the technical field of semiconductor manufacturing, in particular to a test structure for measuring alignment deviation.
Background
A Complementary Metal Oxide Semiconductor (CMOS) -micro-electromechanical system (MEMS) sensor is a device formed by bonding a CMOS wafer and a MEMS wafer, and in the manufacturing process of the sensor, the alignment precision of the micro patterns of the CMOS and the MEMS is very important, which directly affects the performance of the device.
The related art provides a CMOS-MEMS sensor, which includes a first wafer, a second wafer and a third wafer that are bonded in sequence, the first wafer being a capping layer of the sensor, the second wafer being a wafer on which a MEMS device is formed, and the third wafer being a wafer on which a CMOS device is formed. The second wafer and the third wafer are bonded through a eutectic bonding process, a first bonding material layer is formed on the second wafer, a second bonding material layer is formed on the third wafer, and eutectic bonding is achieved between the second wafer and the third wafer through the first bonding material layer and the second bonding material layer.
However, in the related art, the alignment pattern only has search marks (searchmarks) of the bonding machine, which are the first search mark of the first bonding material layer and the second search mark of the second bonding material layer, respectively, but there is no mark (i.e., registration mark) for measuring overlay error (overlay) of the first search mark and the second search mark, and therefore, the alignment deviation cannot be accurately determined, and the alignment accuracy of the bonding machine cannot be effectively monitored.
Disclosure of Invention
The application provides a test structure for measuring alignment deviation, can solve the alignment pattern that provides among the correlation technique because do not possess the alignment mark thereby can't effectively monitor the alignment precision of bonding board, and then reduced the problem of yield to a certain extent.
The test structure is applied to a CMOS-MEMS sensor, the CMOS-MEMS sensor comprises a first wafer and a second wafer, the first wafer is a wafer formed with MEMS devices, the second wafer is a wafer formed with CMOS devices, the test structure is formed in a test area, and the test structure comprises:
a silicon cube, a top layer of the silicon cube being formed with a first bonding material layer, the silicon cube being formed on a dielectric film, the dielectric film being formed on the first wafer;
a second layer of bonding material formed on the second wafer;
wherein the test region includes a central region, the silicon cubes are formed in a first region and a second region in the test region, the first region has a plurality of the silicon cubes formed therein, the second region has a plurality of the silicon cubes formed therein, the first region is located above the central region, the second region is located to the right of the central region, each of the silicon cubes in the first region is parallel to each other, each of the silicon cubes in the second region is parallel to each other, and the second bonding material layer is rectangular in shape;
the second bonding material layer is bonded to at least one first bonding material layer of the top silicon cube layer when the first and second wafers are bonded and an alignment deviation does not meet a deviation criterion, and the second bonding material layer is not bonded to the first bonding material layer of the top silicon cube layer and is located in the center region when the first and second wafers are bonded and an alignment deviation meets the deviation criterion.
In some embodiments, the first layer of bonding material comprises a layer of germanium.
In some embodiments, the second layer of bonding material comprises an aluminum layer.
In some embodiments, the test region further comprises a third region and a fourth region, the third region being located below the central region and the fourth region being located to the left of the central region from the top view, each of the silicon cubes in the third region being parallel to each other and each of the silicon cubes in the fourth region being parallel to each other.
In some embodiments, the silicon cubes are rectangular in shape when viewed from the top, and the spacing between each of the silicon cubes is equal in the first, second, third and fourth regions.
In some embodiments, from the top view, the direction of the length of the silicon cube in the first region is perpendicular to the direction of the length of the silicon cube in the second region, the direction of the length of the silicon cube in the third region is parallel to the direction of the length of the silicon cube in the first region, and the direction of the length of the silicon cube in the fourth region is perpendicular to the direction of the length of the silicon cube in the second region.
In some embodiments, the silicon cubes are L-shaped when viewed from the top, and the spacing between each of the silicon cubes is equal in the first, second, third and fourth regions.
In some embodiments, from the top view, the direction of the length of the silicon cube in the first region is perpendicular to the direction of the length of the silicon cube in the second region, the direction of the length of the silicon cube in the third region is parallel to the direction of the length of the silicon cube in the first region, and the direction of the length of the silicon cube in the fourth region is perpendicular to the direction of the length of the silicon cube in the second region.
In some embodiments, the CMOS-MEMS sensor further comprises a third wafer, the third wafer being a capping layer of the sensor, the third wafer being bonded to a back side of the first wafer, the back side being a surface of the first wafer where the test structure is not formed;
the MEMS sensor comprises a fixed electrode and a movable electrode, and a groove is formed between the fixed electrode and the movable electrode;
and cavities corresponding to the fixed electrode and the movable electrode are formed on the surfaces of the third wafer and the second wafer, which are bonded on the back surfaces.
In some embodiments, the MEMS sensor comprises a pressure sensor and/or an acceleration sensor.
The technical scheme at least comprises the following advantages:
by forming silicon cube grids in different areas of a central area of a testing area on a first wafer of a CMOS-MEMS sensor and forming a second bonding material layer corresponding to the central area on a second wafer of the CMOS-MEMS sensor, when the first wafer and the second wafer are bonded, if the alignment deviation does not meet the deviation standard, the second bonding material layer is bonded with the first bonding material layer on the top layer of at least one silicon cube, and further the alignment deviation of the sensor wafer can be measured by detecting the conducted silicon cube, so that the accuracy of monitoring the alignment precision is improved.
Drawings
In order to more clearly illustrate the detailed description of the present application or the technical solutions in the prior art, the drawings needed to be used in the detailed description of the present application or the prior art description will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative efforts.
FIG. 1 is a schematic top view of a test structure for measuring alignment deviation provided in an exemplary embodiment of the present application;
FIG. 2 is a cross-sectional schematic view of a test structure for measuring alignment deviation provided by an exemplary embodiment of the present application.
Detailed Description
The technical solutions in the present application will be described clearly and completely with reference to the accompanying drawings, and it is obvious that the described embodiments are some, but not all embodiments of the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplicity of description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present application, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; the connection can be mechanical connection or electrical connection; the two elements may be directly connected or indirectly connected through an intermediate medium, or may be communicated with each other inside the two elements, or may be wirelessly connected or wired connected. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art.
In addition, the technical features mentioned in the different embodiments of the present application described below can be combined with each other as long as they do not conflict with each other.
Referring to FIG. 1, a schematic top view of a test structure for measuring alignment misalignment provided by an exemplary embodiment of the present application is shown; referring to FIG. 2, a cross-sectional view of a test structure for measuring alignment deviation provided by an exemplary embodiment of the present application is shown; fig. 1 and 2 show the area of the test area 100, and fig. 2 is a cross-sectional view in the direction of line AA in fig. 1.
As shown in fig. 1 and 2, the test structure is applied to a CMOS-MEMS sensor, the CMOS-MEMS sensor includes a first wafer 110 and a second wafer 210, the first wafer 110 is a wafer formed with MEMS devices (not shown in fig. 1 and 2), the second wafer 210 is a wafer formed with CMOS devices (not shown in fig. 1 and 2), the test structure is formed in a test area 100, and the test structure includes:
the silicon cube 130, the top layer of which is formed with a first bonding material layer 140, is formed on the dielectric film 120, the dielectric film 120 being formed on the first wafer 110. The first bonding material layer 140 may include a germanium (Ge) layer.
And a second bonding material layer 220 formed on the second wafer 210. Wherein the second bonding material layer 220 may include an aluminum (Al) layer.
Wherein, from a top view, the test region 100 includes a central region (a region having a smaller area than the test region 100, which may be rectangular, circular, oval, etc., centered at the center of the test region 100), the silicon cubes 130 are formed in a first region 101 and a second region 102 in the test region 100, the first region 101 has a plurality of silicon cubes 130 formed therein, the second region 102 has a plurality of silicon cubes 130 formed therein, the first region 101 is located above the central region, the second region 102 is located at the right of the central region, each silicon cube 130 in the first region 101 is parallel to each other, each silicon cube 130 in the second region 102 is parallel to each other, and the second bonding material layer 220 is rectangular.
The second bonding material layer 220 is bonded to the first bonding material layer 140 on the top layer of the at least one silicon cube 130 when the first wafer 110 and the second wafer 210 are bonded and the alignment deviation does not meet the deviation criterion, and the second bonding material layer 220 is not bonded to the first bonding material layer 140 on the top layer of the silicon cube 130 and is located in the center region when the first wafer 110 and the second wafer 210 are bonded and the alignment deviation meets the deviation criterion.
In some embodiments, as shown in fig. 1, the test area 100 further includes a third area 103 and a fourth area 104, the third area 103 being located below the central area, the fourth area 104 being located to the left of the central area, each silicon cube 130 in the third area 103 being parallel to each other, and each silicon cube 130 in the fourth area 104 being parallel to each other, when viewed in a top view.
In some embodiments, the silicon cubes 130 are rectangular in top view, and the spacing between each silicon cube 130 is equal within the first region 101, the second region 102, the third region 103, and the fourth region 104; in some embodiments, the direction in which the lengths of the silicon cubes 130 in the first region 101 are perpendicular to the direction in which the lengths of the silicon cubes 130 in the second region 102 are perpendicular, the direction in which the lengths of the silicon cubes 130 in the third region 103 are parallel to the direction in which the lengths of the silicon cubes 130 in the first region 101 are parallel, and the direction in which the lengths of the silicon cubes 130 in the fourth region 104 are perpendicular to the direction in which the lengths of the silicon cubes 130 in the second region 102 are perpendicular.
In some embodiments, the silicon cubes 130 are L-shaped in a top view, and the spacing between each silicon cube 130 is equal in the first region 101, the second region 102, the third region 103, and the fourth region 104; in some embodiments, the direction in which the length of the silicon cube 130 in the first region 101 (the length of the L-shape in this embodiment is the length of any one of the two rectangles constituting the L-shape) is perpendicular to the direction in which the length of the silicon cube 130 in the second region 102 is located, the direction in which the length of the silicon cube 130 in the third region 103 is parallel to the direction in which the length of the silicon cube 130 in the first region 101 is located, and the direction in which the length of the silicon cube 130 in the fourth region 104 is perpendicular to the direction in which the length of the silicon cube 130 in the second region 102 is located, as viewed from above.
In summary, in the embodiment of the present application, silicon cube grids located in different areas of a central area of a testing area are formed on a first wafer of a CMOS-MEMS sensor, and a second bonding material layer corresponding to the central area is formed on a second wafer of the CMOS-MEMS sensor, so that when the first wafer and the second wafer are bonded, if an alignment deviation does not meet a deviation standard, the second bonding material layer is bonded to a first bonding material layer on a top layer of at least one silicon cube, and further, the alignment deviation of the sensor wafer can be measured by detecting a conductive silicon cube, thereby improving accuracy of monitoring alignment accuracy.
In some embodiments, the CMOS-MEMS sensor further comprises a third wafer (not shown in fig. 1 and 2), the third wafer being a capping layer of the sensor, the third wafer being bonded to a back side of the first wafer, the back side being a surface of the first wafer where no test structure is formed; the MEMS sensor comprises a fixed electrode and a movable electrode, wherein a groove is formed between the fixed electrode and the movable electrode; cavities corresponding to the fixed electrode and the movable electrode are formed on the surfaces of the third wafer and the second wafer, which are bonded on the back surfaces.
In some embodiments, the MEMS sensor comprises a pressure sensor and/or an acceleration sensor.
It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications of this invention are intended to be covered by the scope of the invention as expressed herein.

Claims (10)

1. A test structure for measuring alignment deviation, wherein the test structure is applied to a CMOS-MEMS sensor, the CMOS-MEMS sensor includes a first wafer and a second wafer, the first wafer is a wafer formed with MEMS devices, the second wafer is a wafer formed with CMOS devices, the test structure is formed in a test area, the test structure includes:
a silicon cube, a top layer of the silicon cube being formed with a first bonding material layer, the silicon cube being formed on a dielectric film, the dielectric film being formed on the first wafer;
a second layer of bonding material formed on the second wafer;
wherein the test region includes a central region, the silicon cubes are formed in a first region and a second region in the test region, the first region has a plurality of the silicon cubes formed therein, the second region has a plurality of the silicon cubes formed therein, the first region is located above the central region, the second region is located to the right of the central region, each of the silicon cubes in the first region is parallel to each other, each of the silicon cubes in the second region is parallel to each other, and the second bonding material layer is rectangular in shape;
the second bonding material layer is bonded to at least one first bonding material layer of the top silicon cube layer when the first and second wafers are bonded and an alignment deviation does not meet a deviation criterion, and the second bonding material layer is not bonded to the first bonding material layer of the top silicon cube layer and is located in the center region when the first and second wafers are bonded and an alignment deviation meets the deviation criterion.
2. The test structure of claim 1, wherein the first layer of bonding material comprises a germanium layer.
3. The test structure of claim 2, wherein the second layer of bonding material comprises an aluminum layer.
4. The test structure of claim 3, wherein the test region further comprises a third region and a fourth region, the third region being located below the central region and the fourth region being located to the left of the central region from the top view, each of the silicon cubes in the third region being parallel to each other and each of the silicon cubes in the fourth region being parallel to each other.
5. The method of claim 4, wherein the silicon cubes are rectangular in shape from the top view, and wherein the spacing between each of the silicon cubes is equal in the first, second, third and fourth regions.
6. The method according to claim 5, wherein, from the top view, the direction in which the lengths of the silicon cubes in the first region are located is perpendicular to the direction in which the lengths of the silicon cubes in the second region are located, the direction in which the lengths of the silicon cubes in the third region are located is parallel to the direction in which the lengths of the silicon cubes in the first region are located, and the direction in which the lengths of the silicon cubes in the fourth region are located is perpendicular to the direction in which the lengths of the silicon cubes in the second region are located.
7. The test structure of claim 4, wherein the silicon cubes are L-shaped when viewed from the top view, and wherein the spacing between each of the silicon cubes is equal in the first, second, third and fourth regions.
8. The test structure according to claim 7, wherein, from the top view, the direction in which the lengths of the silicon cubes in the first region are perpendicular to the direction in which the lengths of the silicon cubes in the second region are perpendicular, the direction in which the lengths of the silicon cubes in the third region are parallel to the direction in which the lengths of the silicon cubes in the first region are parallel, and the direction in which the lengths of the silicon cubes in the fourth region are perpendicular to the direction in which the lengths of the silicon cubes in the second region are perpendicular.
9. The test structure of any of claims 1 to 8, wherein the CMOS-MEMS sensor further comprises a third wafer, the third wafer being a capping layer of the sensor, the third wafer being bonded to a back side of the first wafer, the back side being a surface of the first wafer where the test structure is not formed;
the MEMS sensor comprises a fixed electrode and a movable electrode, and a groove is formed between the fixed electrode and the movable electrode;
and cavities corresponding to the fixed electrode and the movable electrode are formed on the surfaces of the third wafer and the second wafer, which are bonded on the back surfaces.
10. The test structure of claim 9, wherein the MEMS sensor comprises a pressure sensor and/or an acceleration sensor.
CN202210758698.8A 2022-06-29 2022-06-29 Test structure for measuring alignment deviation Pending CN115180588A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210758698.8A CN115180588A (en) 2022-06-29 2022-06-29 Test structure for measuring alignment deviation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210758698.8A CN115180588A (en) 2022-06-29 2022-06-29 Test structure for measuring alignment deviation

Publications (1)

Publication Number Publication Date
CN115180588A true CN115180588A (en) 2022-10-14

Family

ID=83515632

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202210758698.8A Pending CN115180588A (en) 2022-06-29 2022-06-29 Test structure for measuring alignment deviation

Country Status (1)

Country Link
CN (1) CN115180588A (en)

Similar Documents

Publication Publication Date Title
KR100907514B1 (en) Sensor device, sensor system and method of manufacturing the same
EP0744603A1 (en) Linear capacitive sensor by fixing the center of a membrane
US20110221455A1 (en) Micromechanical component and method for its production
US7900515B2 (en) Acceleration sensor and fabrication method thereof
US6923061B2 (en) Physical quantity sensor having beam
KR100514240B1 (en) Acceleration sensor and method of manufacturure thereof
US20070175865A1 (en) Process for the fabrication of an inertial sensor with failure threshold
US20060196268A1 (en) Acceleration sensor chip
US6858810B2 (en) Sensor with failure threshold
US8647908B2 (en) Semiconductor pressure sensor and method of manufacturing semiconductor pressure sensor
KR20170085450A (en) Probe guide plate and method of manufacturing the same and probe device
CN1944236B (en) Semiconductor device, method for manufacturing the same and method for inspecting the same
EP0994330B1 (en) Method for manufacturing an angular rate sensor
US6051855A (en) Electrostatic capacitive sensor
CN115180588A (en) Test structure for measuring alignment deviation
KR20070106358A (en) A method for fabricating a micro structures with multi differential gap on silicon substrate
US20190242709A1 (en) Sensor
JPH11274142A (en) Etching depth detecting method, manufacture of semiconductor device using the method, and manufacture of dynamical quantity sensor using the detecting method
JPH10111203A (en) Capacitive semiconductor sensor and its production
CN114121707A (en) Method for detecting STI trench depth
CN111762754A (en) Test structure for measuring eutectic bonding alignment deviation
CN114014261A (en) Method and structure for measuring wafer bonding alignment precision
CN113506753A (en) Method for detecting plane deformation of silicon wafer
US20080211041A1 (en) Micro electrical mechanical system device
CN116358744A (en) Processing method of pressure sensor and pressure sensor

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination