CN113394978B - Through circuit applied to buck converter - Google Patents

Through circuit applied to buck converter Download PDF

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Publication number
CN113394978B
CN113394978B CN202110622381.7A CN202110622381A CN113394978B CN 113394978 B CN113394978 B CN 113394978B CN 202110622381 A CN202110622381 A CN 202110622381A CN 113394978 B CN113394978 B CN 113394978B
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diode
switch
circuit
cathode
capacitor
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CN113394978A (en
Inventor
李垚
苏新河
方兵洲
倪宇驰
鲜宗钰
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Tuoer Microelectronics Co ltd
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Tuoer Microelectronics Co ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H02M3/1582—Buck-boost converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H02M1/34—Snubber circuits
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
    • H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The invention provides a pass-through circuit applied to a buck converter, which comprises: a first sub-circuit; and the second sub-circuit is connected with the first sub-circuit. The first sub-circuit includes: the input end of the logic controller is connected with the CT signal end; the input end of the first buffer is connected with the first output end of the logic controller; and the input end of the second buffer is connected with the second output end of the logic controller. The NMOS through circuit and the structure applied to the BUCK converter provided by the invention adopt the BST voltage of the BUCK as the starting voltage required by the charge pump to maintain the NMOS through pipe, can drive the NMOS through power pipe, replace the common PMOS through power pipe and reduce the production cost of the through circuit.

Description

Through circuit applied to buck converter
Technical Field
The invention relates to the field of circuits, in particular to a pass-through circuit applied to a buck converter.
Background
The existing buck converter with the through function is mostly realized by adopting a mode of driving a PMOS tube, and referring to the figure 1, when a CT signal is enabled, through LEVEL SHIFT and driving, QP is opened, so that VIN energy is directly transmitted to VOUT through QP, and the driving of QP is based on a floating voltage rail between floating_GND and VIN; because the through circuit of the PMOS is relatively easy to realize, and the power tube of the PMOS is relatively more expensive than the NMOS power tube, the problem of high production cost exists.
Disclosure of Invention
It is an object of the invention to provide a pass-through circuit for a buck converter.
The invention aims to solve the problem of high production cost of a direct-current circuit of the existing buck converter.
Compared with the prior art, the technical scheme of the invention has the following beneficial effects:
A pass-through circuit for a buck converter, comprising: a first sub-circuit; and the second sub-circuit is connected with the first sub-circuit. The first sub-circuit includes: the input end of the logic controller is connected with the CT signal end; the input end of the first buffer is connected with the first output end of the logic controller; and the input end of the second buffer is connected with the second output end of the logic controller.
As a further improvement, the first sub-circuit further includes: the positive electrode of the first diode is connected with the working voltage end, and the negative electrode of the first diode is connected with the first end of the first buffer; the drain electrode of the first MOS tube is connected with the input voltage end, the grid electrode of the first MOS tube is connected with the output end of the first buffer, and the source electrode of the first MOS tube is connected with the second end of the first buffer; the drain electrode of the second MOS tube is connected with the source electrode of the first MOS tube, the grid electrode of the second MOS tube is connected with the output end of the second buffer, the source electrode of the second MOS tube is connected with the second end of the second buffer, and the first end of the second buffer is connected with the working voltage end.
As a further improvement, the first sub-circuit further includes: one end of the first capacitor is connected with the cathode of the first diode, and the other end of the first capacitor is connected with the source electrode of the first MOS tube; one end of the inductor is connected with the source electrode of the first MOS tube, and the other end of the inductor is connected with the output voltage end; one end of the second capacitor is connected with the other end of the inductor, and the other end of the second capacitor is connected with the source electrode of the second MOS tube; and the first resistor is connected in parallel with the second capacitor.
As a further improvement, the second sub-circuit includes: one end of the first switch is connected with the cathode of the first diode, and the control end of the first switch is connected with the CT signal end; the negative electrode of the second diode is connected to the other end of the first switch, and the positive electrode of the second diode is connected to the other end of the inductor; the grid electrode of the third MOS tube is connected to the negative electrode of the second diode, the source electrode of the third MOS tube is connected to the positive electrode of the second diode, and the drain electrode of the third MOS tube is connected to the input voltage end.
As a further improvement, the second subcircuit further includes: the input end of the inverter is connected with the CT signal end; one end of the second switch is connected with the cathode of the second diode, the other end of the second switch is connected with the anode of the second diode, and the control end of the second switch is connected with the output end of the inverter; a third capacitor connected in parallel with the second diode; and the anode of the third diode is connected with the cathode of the first diode, and the cathode of the third diode is connected with one end of the first switch.
As a further improvement, the second subcircuit further includes: the input end of the inverter is connected with the CT signal end; one end of the second switch is connected with the cathode of the second diode, the other end of the second switch is connected with the anode of the second diode, and the control end of the second switch is connected with the output end of the inverter; the anode of the third diode is connected with the cathode of the first diode, and the cathode of the third diode is connected with one end of the first switch; and one end of the third capacitor is connected to the cathode of the third diode, and the other end of the third capacitor is grounded.
As a further improvement, the second subcircuit further includes: the input end of the inverter is connected with the CT signal end; one end of the second switch is connected with the cathode of the second diode, the other end of the second switch is connected with the anode of the second diode, and the control end of the second switch is connected with the output end of the inverter; the anode of the third diode is connected with the other end of the first switch, and the cathode of the third diode is connected with one end of the second switch; and the third capacitor is connected in parallel with the second diode.
As a further improvement, the second subcircuit further includes: the input end of the inverter is connected with the CT signal end; one end of the second switch is connected with the cathode of the second diode, the other end of the second switch is connected with the anode of the second diode, and the control end of the second switch is connected with the output end of the inverter; the anode of the third diode is connected with the other end of the first switch, and the cathode of the third diode is connected with one end of the second switch; and one end of the third capacitor is connected to the cathode of the third diode, and the other end of the third capacitor is grounded.
As a further improvement, the second subcircuit further includes: a third capacitor connected in parallel with the second diode; the second resistor is connected in parallel with the third capacitor; and the anode of the third diode is connected with the cathode of the first diode, and the cathode of the third diode is connected with one end of the first switch.
The beneficial effects of the invention are as follows:
the NMOS through circuit and the structure applied to the BUCK converter provided by the invention adopt the BST voltage of the BUCK as the starting voltage required by the charge pump to maintain the NMOS through pipe, can drive the NMOS through power pipe, replace the common PMOS through power pipe and reduce the production cost of the through circuit.
Drawings
Fig. 1 is a circuit diagram provided in the background of the invention.
Fig. 2 is a schematic diagram of a pass-through circuit applied to a buck converter according to a first embodiment of the present invention.
Fig. 3 is a schematic diagram of node waveforms when ct_on is turned ON according to an embodiment of the present invention.
Fig. 4 is a schematic diagram of a pass-through circuit applied to a buck converter according to a second embodiment of the present invention.
Fig. 5 is a schematic diagram of a pass-through circuit applied to a buck converter according to a third embodiment of the present invention.
Fig. 6 is a schematic diagram of a pass-through circuit applied to a buck converter according to a fourth embodiment of the present invention.
Fig. 7 is a schematic diagram of a pass-through circuit applied to a buck converter according to a fifth embodiment of the present invention.
In the figure:
1. first sub-circuit 11, logic controller 12, first buffer
13. Second buffer QTN: first MOS pipe QBN: second MOS tube
D1: first diode Cbst: first capacitance Cout: second capacitor
L: inductance Rload: first resistor 2. Second subcircuit
21: Inverter S1: first switch S2: second switch
QN: third MOS transistor DZ: second diode D2: third diode
CH: third capacitance RG: second resistor
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments. All other embodiments, based on the embodiments of the invention, which are apparent to those of ordinary skill in the art without inventive faculty, are intended to be within the scope of the invention. Thus, the following detailed description of the embodiments of the invention, as presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, based on the embodiments of the invention, which are apparent to those of ordinary skill in the art without inventive faculty, are intended to be within the scope of the invention.
In the description of the present invention, the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present invention, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
Example 1
Referring to fig. 2, a pass-through circuit for a buck converter, comprising: a first sub-circuit 1; a second sub-circuit 2, said second sub-circuit 2 being connected to said first sub-circuit 1. The first sub-circuit 1 includes: a logic controller 11; a first buffer 12, wherein an input end of the first buffer 12 is connected to a first output end of the logic controller 11; a second buffer 13, an input terminal of the second buffer 13 is connected to a second output terminal of the logic controller 11. The NMOS through circuit and the structure applied to the BUCK converter provided by the invention adopt the BST voltage of the BUCK as the starting voltage required by the charge pump to maintain the NMOS through pipe, can drive the NMOS through power pipe, replace the common PMOS through power pipe and reduce the production cost of the through circuit.
The first sub-circuit 1 further includes: a first diode D1, wherein an anode of the first diode D1 is connected to the working voltage end, and a cathode of the first diode D1 is connected to the first end of the first buffer 12; a first MOS tube QTN, a drain electrode of the first MOS tube QTN is connected to an input voltage end, a gate electrode of the first MOS tube QTN is connected to an output end of the first buffer 12, and a source electrode of the first MOS tube QTN is connected to a second end of the first buffer 12; the drain electrode of the second MOS tube QBN is connected to the source electrode of the first MOS tube QTN, the gate electrode of the second MOS tube QBN is connected to the output end of the second buffer 13, the source electrode of the second MOS tube QBN is connected to the second end of the second buffer 13, and the first end of the second buffer 13 is connected to the working voltage end.
The first sub-circuit 1 further includes: one end of the first capacitor Cbst is connected to the cathode of the first diode D1, and the other end of the first capacitor Cbst is connected to the source of the first MOS transistor QTN; one end of the inductor L is connected to the source electrode of the first MOS tube QTN, and the other end of the inductor L is connected to the output voltage end; one end of the second capacitor Cout is connected to the other end of the inductor L, and the other end of the second capacitor Cout is connected to the source electrode of the second MOS tube QBN; and the first resistor Rload is connected in parallel with the second capacitor Cout.
The input end of the logic controller 11 is connected to the CT signal end.
The second subcircuit 2 includes: a first switch S1, wherein one end of the first switch S1 is connected to the cathode of the first diode D1, and the control end of the first switch S1 is connected to the CT signal end; a second diode DZ, wherein a cathode of the second diode DZ is connected to the other end of the first switch S1, and an anode of the second diode DZ is connected to the other end of the inductor L; the grid electrode of the third MOS tube QN is connected to the negative electrode of the second diode DZ, the source electrode of the third MOS tube QN is connected to the positive electrode of the second diode DZ, and the drain electrode of the third MOS tube QN is connected to the input voltage end.
The second subcircuit 2 further comprises: an inverter 21, wherein an input end of the inverter 21 is connected to the CT signal end; a second switch S2, wherein one end of the second switch S2 is connected to the negative electrode of the second diode DZ, the other end of the second switch S2 is connected to the positive electrode of the second diode DZ, and the control end of the second switch S2 is connected to the output end of the inverter 21; a third capacitor CH connected in parallel to the second diode DZ; and a third diode D2, wherein the anode of the third diode D2 is connected to the cathode of the first diode D1, and the cathode of the third diode D2 is connected to one end of the first switch S1.
The invention provides a direct-current circuit applied to a buck converter, which comprises the following principles:
When the BUCK is increased in duty ratio until the maximum duty ratio cannot meet the VOUT/VIN ratio, the CT_ON controls the through NMOS tube to be opened, and simultaneously controls the BUCK to keep a certain duty ratio and work at a certain frequency, and because the voltage of BST when QTN is opened is approximately equal to the voltage of VIN+VDD-VD1, energy supply can be provided for CH through D2, so that VG can always maintain a normal starting voltage, namely VIN+VDD-VD1-VD2;
the whole system uses the BST voltage of the BUCK itself as a charge pump to provide starting voltage for the NMOS direct-pass power tube, and the whole circuit has simple structure and lower cost;
In the CT_ON control QN POWER NMOS opening stage, BUCK can be operated at a maximum duty ratio with reduced frequency, so that the switching loss of BUCK operation is reduced and the overall system efficiency is improved;
Referring to FIG. 3, when CT_ON is enabled, the BST reduction frequency is operated at a maximum duty cycle, and simultaneously VG is gradually raised, NMOS transistor is gradually opened, and VOUT is raised to VIN voltage.
Example two
Referring to fig. 4, the present embodiment is different from the above embodiment in that the third capacitance DH is at a different position; the second subcircuit 2 further comprises: an inverter 21, wherein an input end of the inverter 21 is connected to the CT signal end; a second switch S2, wherein one end of the second switch S2 is connected to the negative electrode of the second diode DZ, the other end of the second switch S2 is connected to the positive electrode of the second diode DZ, and the control end of the second switch S2 is connected to the output end of the inverter 21; a third diode D2, wherein a positive electrode of the third diode D2 is connected to a negative electrode of the first diode D1, and a negative electrode of the third diode D2 is connected to one end of the first switch S1; and one end of the third capacitor CH is connected to the cathode of the third diode D2, and the other end of the third capacitor CH is grounded.
Example III
Referring to fig. 5, the present embodiment is different from the above embodiment in that the first switch S1 is in a different position; the second subcircuit 2 further comprises: an inverter 21, wherein an input end of the inverter 21 is connected to the CT signal end; a second switch S2, wherein one end of the second switch S2 is connected to the negative electrode of the second diode DZ, the other end of the second switch S2 is connected to the positive electrode of the second diode DZ, and the control end of the second switch S2 is connected to the output end of the inverter 21; a third diode D2, wherein a positive electrode of the third diode D2 is connected to the other end of the first switch S1, and a negative electrode of the third diode D2 is connected to one end of the second switch S2; and the third capacitor CH is connected in parallel with the second diode DZ.
Example IV
Referring to fig. 6, the present embodiment is different from the above embodiment in that the first switch S1 and the third capacitor CH are at different positions; the second subcircuit 2 further comprises: an inverter 21, wherein an input end of the inverter 21 is connected to the CT signal end; a second switch S2, wherein one end of the second switch S2 is connected to the negative electrode of the second diode DZ, the other end of the second switch S2 is connected to the positive electrode of the second diode DZ, and the control end of the second switch S2 is connected to the output end of the inverter 21; a third diode D2, wherein a positive electrode of the third diode D2 is connected to the other end of the first switch S1, and a negative electrode of the third diode D2 is connected to one end of the second switch S2; and one end of the third capacitor CH is connected to the cathode of the third diode D2, and the other end of the third capacitor CH is grounded.
Example five
Referring to fig. 7, the present embodiment is different from the above embodiment in that the second switch S2 is replaced with a second resistor RG; the second subcircuit 2 further comprises: a third capacitor CH connected in parallel to the second diode DZ; the second resistor RG is connected in parallel with the third capacitor CH; and a third diode D2, wherein the anode of the third diode D2 is connected to the cathode of the first diode D1, and the cathode of the third diode D2 is connected to one end of the first switch S1.
The working principle, working procedure and the like of the present embodiment can refer to the corresponding contents of the foregoing embodiment.
The above examples are only for illustrating the technical scheme of the present invention and are not limiting. It will be understood by those skilled in the art that any modifications and equivalents that do not depart from the spirit and scope of the invention are intended to be within the scope of the appended claims.

Claims (6)

1. A pass-through circuit for a buck converter, comprising:
A first sub-circuit, the first sub-circuit comprising:
the input end of the logic controller is connected with the CT signal end;
The input end of the first buffer is connected with the first output end of the logic controller;
the input end of the second buffer is connected with the second output end of the logic controller;
a second sub-circuit connected to the first sub-circuit;
the first sub-circuit further includes:
the positive electrode of the first diode is connected with the working voltage end, and the negative electrode of the first diode is connected with the first end of the first buffer;
The drain electrode of the first MOS tube is connected with the input voltage end, the grid electrode of the first MOS tube is connected with the output end of the first buffer, and the source electrode of the first MOS tube is connected with the second end of the first buffer;
The drain electrode of the second MOS tube is connected with the source electrode of the first MOS tube, the grid electrode of the second MOS tube is connected with the output end of the second buffer, the source electrode of the second MOS tube is connected with the second end of the second buffer, and the first end of the second buffer is connected with the working voltage end;
the first sub-circuit further includes:
One end of the first capacitor is connected with the cathode of the first diode, and the other end of the first capacitor is connected with the source electrode of the first MOS tube;
One end of the inductor is connected with the source electrode of the first MOS tube, and the other end of the inductor is connected with the output voltage end;
One end of the second capacitor is connected with the other end of the inductor, and the other end of the second capacitor is connected with the source electrode of the second MOS tube;
The first resistor is connected in parallel with the second capacitor;
the second subcircuit includes:
One end of the first switch is connected with the cathode of the first diode, and the control end of the first switch is connected with the CT signal end;
The negative electrode of the second diode is connected to the other end of the first switch, and the positive electrode of the second diode is connected to the other end of the inductor;
the grid electrode of the third MOS tube is connected to the negative electrode of the second diode, the source electrode of the third MOS tube is connected to the positive electrode of the second diode, and the drain electrode of the third MOS tube is connected to the input voltage end.
2. A pass-through circuit for a buck converter according to claim 1, wherein the second divide-by circuit further includes:
The input end of the inverter is connected with the CT signal end;
one end of the second switch is connected with the cathode of the second diode, the other end of the second switch is connected with the anode of the second diode, and the control end of the second switch is connected with the output end of the inverter;
A third capacitor connected in parallel with the second diode;
and the anode of the third diode is connected with the cathode of the first diode, and the cathode of the third diode is connected with one end of the first switch.
3. A pass-through circuit for a buck converter according to claim 1, wherein the second divide-by circuit further includes:
The input end of the inverter is connected with the CT signal end;
one end of the second switch is connected with the cathode of the second diode, the other end of the second switch is connected with the anode of the second diode, and the control end of the second switch is connected with the output end of the inverter;
The anode of the third diode is connected with the cathode of the first diode, and the cathode of the third diode is connected with one end of the first switch;
and one end of the third capacitor is connected to the cathode of the third diode, and the other end of the third capacitor is grounded.
4. A pass-through circuit for a buck converter according to claim 1, wherein the second divide-by circuit further includes:
The input end of the inverter is connected with the CT signal end;
one end of the second switch is connected with the cathode of the second diode, the other end of the second switch is connected with the anode of the second diode, and the control end of the second switch is connected with the output end of the inverter;
The anode of the third diode is connected with the other end of the first switch, and the cathode of the third diode is connected with one end of the second switch;
and the third capacitor is connected in parallel with the second diode.
5. A pass-through circuit for a buck converter according to claim 1, wherein the second divide-by circuit further includes:
The input end of the inverter is connected with the CT signal end;
one end of the second switch is connected with the cathode of the second diode, the other end of the second switch is connected with the anode of the second diode, and the control end of the second switch is connected with the output end of the inverter;
The anode of the third diode is connected with the other end of the first switch, and the cathode of the third diode is connected with one end of the second switch;
and one end of the third capacitor is connected to the cathode of the third diode, and the other end of the third capacitor is grounded.
6. A pass-through circuit for a buck converter according to claim 1, wherein the second divide-by circuit further includes:
A third capacitor connected in parallel with the second diode;
The second resistor is connected in parallel with the third capacitor;
and the anode of the third diode is connected with the cathode of the first diode, and the cathode of the third diode is connected with one end of the first switch.
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Publication number Priority date Publication date Assignee Title
FR2817677A1 (en) * 2000-12-01 2002-06-07 Cytale Battery charger for mobile electronic equipment, comprises first transistor regulating supply to rectifying diode and inductance and second transistor transferring load between supply and battery
CN102868311A (en) * 2012-09-19 2013-01-09 华为技术有限公司 Inverter input-stage circuit with wide voltage input range and inverter
CN105811757A (en) * 2014-12-30 2016-07-27 展讯通信（上海）有限公司 DC/DC converter for preventing mis-opening of bypass device
CN106787727A (en) * 2017-01-25 2017-05-31 北京鸿智电通科技有限公司 A kind of power path management circuit for being applied to charging quickly source
CN107659128A (en) * 2017-07-06 2018-02-02 深圳市华芯邦科技有限公司 DC/DC switch converters power output transistor integrated drive electronics
CN216751537U (en) * 2021-06-03 2022-06-14 拓尔微电子股份有限公司 Direct circuit applied to buck converter

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