CN113261114A - 薄膜晶体管及其制作方法、显示面板及显示装置 - Google Patents

薄膜晶体管及其制作方法、显示面板及显示装置 Download PDF

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Publication number
CN113261114A
CN113261114A CN201980073511.7A CN201980073511A CN113261114A CN 113261114 A CN113261114 A CN 113261114A CN 201980073511 A CN201980073511 A CN 201980073511A CN 113261114 A CN113261114 A CN 113261114A
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CN
China
Prior art keywords
layer
gate
thin film
film transistor
electrode
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Pending
Application number
CN201980073511.7A
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English (en)
Inventor
邹灿
蔡武卫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen Royole Technologies Co Ltd
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Shenzhen Royole Technologies Co Ltd
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Application filed by Shenzhen Royole Technologies Co Ltd filed Critical Shenzhen Royole Technologies Co Ltd
Publication of CN113261114A publication Critical patent/CN113261114A/zh
Pending legal-status Critical Current

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)

Abstract

本申请实施例公开薄膜晶体管及其制作方法、显示面板及显示装置，薄膜晶体管(10)包括依次层叠设置的第一栅极层(11)、第一绝缘层(12)、有源层(13)、第二绝缘层(14)、第二栅极层(15)、第三绝缘层(16)及漏源层(17)，以有源层(13)所在平面为投影面，第一栅极层(11)在投影面的正投影与第二栅极层(15)在投影面的正投影至少部分重合，由于第一栅极层(11)与有源层(13)之间以及第二栅极层(15)与有源层(13)之间都不构成产生寄生电容的条件，因此，其能够降低寄生电容。

Description

PCT国内申请，说明书已公开。

Claims (30)

  1. PCT国内申请，权利要求书已公开。
CN201980073511.7A 2019-01-30 2019-01-30 薄膜晶体管及其制作方法、显示面板及显示装置 Pending CN113261114A (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2019/074005 WO2020154983A1 (zh) 2019-01-30 2019-01-30 薄膜晶体管及其制作方法、显示面板及显示装置

Publications (1)

Publication Number Publication Date
CN113261114A true CN113261114A (zh) 2021-08-13

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CN201980073511.7A Pending CN113261114A (zh) 2019-01-30 2019-01-30 薄膜晶体管及其制作方法、显示面板及显示装置

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Country Link
CN (1) CN113261114A (zh)
WO (1) WO2020154983A1 (zh)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02197176A (ja) * 1989-01-26 1990-08-03 Casio Comput Co Ltd 薄膜メモリ素子
CN101013725A (zh) * 2006-07-10 2007-08-08 友达光电股份有限公司 双栅极晶体管及应用此双栅极晶体管的像素结构
US20110012125A1 (en) * 2008-04-29 2011-01-20 Gareth Nicholas Thin film transistor and active matrix display
CN108538921A (zh) * 2018-04-25 2018-09-14 京东方科技集团股份有限公司 一种薄膜晶体管及其制备方法、阵列基板
CN207925480U (zh) * 2017-08-21 2018-09-28 中国科学院物理研究所 薄膜晶体管和场效应二极管
CN108987480A (zh) * 2017-06-02 2018-12-11 上海和辉光电有限公司 双栅薄膜晶体管及其制备方法、显示面板及其制备方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004343018A (ja) * 2003-03-20 2004-12-02 Fujitsu Ltd 半導体装置及びその製造方法
JP2009277733A (ja) * 2008-05-12 2009-11-26 Toshiba Mobile Display Co Ltd 薄膜トランジスタ及び薄膜トランジスタの製造方法
CN102130009B (zh) * 2010-12-01 2012-12-05 北京大学深圳研究生院 一种晶体管的制造方法
EP3236503A1 (en) * 2016-04-18 2017-10-25 IMEC vzw Method for fabricating fully self-aligned dual-gate thin film transistors
CN207676912U (zh) * 2018-01-19 2018-07-31 云谷（固安）科技有限公司 双栅极薄膜晶体管、柔性显示面板及装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02197176A (ja) * 1989-01-26 1990-08-03 Casio Comput Co Ltd 薄膜メモリ素子
CN101013725A (zh) * 2006-07-10 2007-08-08 友达光电股份有限公司 双栅极晶体管及应用此双栅极晶体管的像素结构
US20110012125A1 (en) * 2008-04-29 2011-01-20 Gareth Nicholas Thin film transistor and active matrix display
CN108987480A (zh) * 2017-06-02 2018-12-11 上海和辉光电有限公司 双栅薄膜晶体管及其制备方法、显示面板及其制备方法
CN207925480U (zh) * 2017-08-21 2018-09-28 中国科学院物理研究所 薄膜晶体管和场效应二极管
CN108538921A (zh) * 2018-04-25 2018-09-14 京东方科技集团股份有限公司 一种薄膜晶体管及其制备方法、阵列基板

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Application publication date: 20210813