CN113067466A - Voltage source circuit and power management chip - Google Patents
Voltage source circuit and power management chip Download PDFInfo
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- CN113067466A CN113067466A CN202110545476.3A CN202110545476A CN113067466A CN 113067466 A CN113067466 A CN 113067466A CN 202110545476 A CN202110545476 A CN 202110545476A CN 113067466 A CN113067466 A CN 113067466A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
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Abstract
The embodiment of the invention discloses a voltage source circuit and a power management chip, wherein the voltage source circuit comprises: the first-stage low-noise voltage module, the second-stage boosting filtering module, the third-stage voltage-stabilizing filtering module and the fourth-stage filtering driving module; the first-stage low-noise voltage module comprises a first operational amplifier unit and a first transistor unit; the second-stage boosting filtering module comprises a second operational amplifier unit and a second transistor unit; the third-stage voltage-stabilizing filtering module comprises a first resistor and a third transistor unit, wherein the first end of the first resistor is used as the input end of the third-stage voltage-stabilizing filtering module; the fourth-stage voltage stabilizing and filtering module comprises a second resistor and a fourth transistor unit, and the output end of the fourth transistor unit is used as the output end of the voltage source circuit to output the ultra-low noise voltage. The embodiment of the invention discloses a voltage source circuit and a power management chip, which can achieve the purpose that the voltage source circuit outputs ultra-low noise voltage.
Description
Technical Field
The embodiment of the invention relates to a voltage source technology, in particular to a voltage source circuit and a power management chip.
Background
The high-frequency ultra-low noise crystal oscillator is applied to important military facilities such as military radars and the like very importantly, and the performance index of the radar is directly determined by the advantages of the phase noise index of the crystal oscillator. The domestic crystal oscillator is still different from foreign countries in the aspect of optimal noise indexes, and for a voltage source circuit for transmitting voltage to the high-frequency ultra-low noise crystal oscillator, the output voltage noise is required to be lower.
At present, the output voltage noise of the existing voltage source circuit is high, and when the voltage is transmitted to the high-frequency ultra-low noise crystal oscillator, the working performance of the crystal oscillator is influenced and the ultra-low noise voltage cannot be output due to the high voltage noise, namely the high voltage noise transmitted to the crystal oscillator.
Disclosure of Invention
The embodiment of the invention provides a voltage source circuit and a power management chip, which are used for achieving the purpose that the voltage source circuit outputs ultra-low noise voltage.
In a first aspect, an embodiment of the present invention provides a voltage source circuit, including: the first-stage low-noise voltage module, the second-stage boosting filtering module, the third-stage voltage-stabilizing filtering module and the fourth-stage filtering driving module;
the first-stage low-noise voltage module comprises a first operational amplifier unit and a first transistor unit, wherein a first input end and a second input end of the first operational amplifier unit and a first input end of the first transistor unit are connected with direct-current voltage, an output end of the first operational amplifier unit is electrically connected with a second input end of the first transistor unit, and an output end of the first transistor unit is electrically connected with an input end of the second-stage boosting filter module;
the second-stage boosting filtering module comprises a second operational amplifier unit and a second transistor unit, wherein the input end of the second operational amplifier unit is used as the input end of the second-stage boosting filtering module, the first output end of the second operational amplifier unit is electrically connected with the first input end of the second transistor unit, the second output end of the second operational amplifier unit is electrically connected with the output end of the second transistor unit, the second input end of the second transistor unit is connected with a direct-current power supply, and the output end of the second transistor unit is electrically connected with the input end of the third-stage voltage-stabilizing filtering module;
the third-stage voltage-stabilizing filtering module comprises a first resistor and a third transistor unit, wherein the first end of the first resistor is used as the input end of the third-stage voltage-stabilizing filtering module, the first end of the first resistor is electrically connected with the first end of the third transistor unit, the second end of the first resistor is electrically connected with the second end of the third transistor unit, and the second end of the first resistor is electrically connected with the input end of the fourth-stage voltage-stabilizing filtering module;
the fourth-stage voltage-stabilizing filtering module comprises a second resistor and a fourth transistor unit, a first input end of the fourth transistor unit is used as an input end of the fourth-stage voltage-stabilizing filtering module, a first input end of the fourth transistor unit is electrically connected with a second input end of the fourth transistor unit through the second resistor, and an output end of the fourth transistor unit is used as an output end of the voltage source circuit to output ultra-low noise voltage.
Optionally, the first operational amplifier unit includes a first operational amplifier, a third resistor, a first MOS transistor, a second MOS transistor, a first triode, a second triode, a third triode, and a fourth triode;
a first pole of the first MOS tube is used as a first input end of the first operational amplifier unit, a grid electrode of the first MOS tube is electrically connected with an output end of the first operational amplifier, a second pole of the first MOS tube is electrically connected with a first pole of the first triode, the first pole of the first triode is electrically connected with a base electrode of the first triode, the second pole of the first triode is electrically connected with a first pole of the second triode, the first pole of the second triode is electrically connected with a base electrode of the second triode, the second pole of the second triode is grounded, and the first pole of the second triode is electrically connected with a reverse input end of the first operational amplifier;
the first pole of the second MOS tube is used as the second input end of the first operational amplifier unit, the grid electrode of the second MOS tube is electrically connected with the output end of the first operational amplifier, the second pole of the second MOS tube is electrically connected with the first pole of the third triode, the first pole of the third triode is electrically connected with the base electrode of the third triode, the second pole of the third triode is electrically connected with the first pole of the fourth triode through a third resistor, the first pole of the fourth triode is electrically connected with the base electrode of the fourth triode, the second pole of the fourth triode is grounded, and the output end of the first operational amplifier is used as the output end of the first operational amplifier unit.
Optionally, the first transistor unit includes a third MOS transistor, a fifth triode, a sixth triode, and a fourth resistor; the first pole of the third MOS tube is used as the first input end of the first transistor unit, the grid electrode of the third MOS tube is used as the second input end of the first transistor unit, the second pole of the third MOS tube is electrically connected with the first pole of the fifth triode, the first pole of the fifth triode is electrically connected with the base electrode of the fifth triode, the second pole of the fifth triode is electrically connected with the first pole of the sixth triode through a fourth resistor, the first pole of the sixth triode is electrically connected with the base electrode of the sixth triode, the second pole of the sixth triode is grounded, and the second pole of the fifth triode is used as the output end of the first transistor unit.
Optionally, the second operational amplifier unit includes a second operational amplifier, a first capacitor, a fifth resistor, a sixth resistor, and a seventh resistor; the first end of the fifth resistor is used as the input end of the second operational amplifier unit, the second end of the fifth resistor is electrically connected with the forward input end of the second operational amplifier, the reverse input end of the second operational amplifier is grounded through a sixth resistor, the output end of the second operational amplifier is electrically connected with the reverse input end of the second operational amplifier through a first capacitor, the first end of the seventh resistor is electrically connected with the reverse input end of the second operational amplifier, the output end of the second operational amplifier is used as the first output end of the second operational amplifier unit, and the second end of the seventh resistor is used as the second output end of the second operational amplifier unit.
Optionally, the second transistor unit includes a seventh triode and a second capacitor, a base of the seventh triode is used as a first input end of the second transistor unit, a first pole of the seventh triode is used as a second input end of the second transistor unit, a second pole of the seventh triode is grounded through the second capacitor, and a second pole of the seventh triode is used as an output end of the second transistor unit.
Optionally, the third transistor unit includes an eighth triode, a third capacitor, a fourth capacitor, an eighth resistor, a ninth resistor, a tenth resistor, and an eleventh resistor; the first end of the third capacitor is used as the first end of the third transistor unit, the first end of the eighth resistor is used as the second end of the third transistor unit, the second end of the third capacitor is electrically connected with the base electrode of the eighth triode, the second end of the eighth resistor is electrically connected with the first electrode of the eighth triode, the first end of the eighth resistor is grounded through the fourth capacitor, the base electrode of the eighth triode is electrically connected with the first electrode of the eighth triode through the ninth resistor, the base electrode of the eighth triode is grounded through the tenth resistor, and the second electrode of the eighth triode is grounded through the eleventh resistor.
Optionally, the first resistor, the eighth resistor, the ninth resistor, and the tenth resistor are all adjustable resistors.
Optionally, the fourth transistor unit includes a ninth triode, a fifth capacitor and a sixth capacitor, a first pole of the ninth triode is used as the first input end of the fourth transistor unit, a base of the ninth triode is used as the second input end of the fourth transistor unit, the base of the ninth triode is grounded through the fifth capacitor, and a first pole of the ninth triode is grounded through the sixth capacitor.
Optionally, the first input terminal and the second input terminal of the first operational amplifier unit, the first input terminal of the first transistor unit, and the second input terminal of the second transistor unit are all used as input terminals of the voltage source circuit, and the same dc voltage is connected thereto.
In a second aspect, an embodiment of the present invention further provides a power management chip, which includes the voltage source circuit as described in the first aspect, and the voltage source circuit is integrated in the power management chip
The voltage source circuit and the power management chip provided by the embodiment of the invention comprise a first-stage low-noise voltage module, a second-stage boosting filtering module, a third-stage voltage-stabilizing filtering module and a fourth-stage filtering driving module; the first-stage low-noise voltage module comprises a first operational amplifier unit and a first transistor unit, the second-stage boosting filtering module comprises a second operational amplifier unit and a second transistor unit, the third-stage voltage-stabilizing filtering module comprises a first resistor and a third transistor unit, and the fourth-stage voltage-stabilizing filtering module comprises a second resistor and a fourth transistor unit. According to the voltage source circuit and the power management chip provided by the embodiment of the invention, the ultralow noise reference voltage is output through the first-stage low-noise voltage module, the input ultralow noise reference voltage is boosted and filtered through the second-stage boosting filtering module, and the direct-current voltage is further filtered through the third-stage voltage-stabilizing filtering module and the fourth-stage filtering driving module, so that the direct-current voltage input by the voltage source circuit can be subjected to noise reduction treatment to a greater extent through the fourth-stage module, the alternating-current noise in the direct-current voltage is greatly reduced, and the purpose of outputting the ultralow noise voltage by the voltage source circuit is realized.
Drawings
Fig. 1 is a schematic structural diagram of a voltage source circuit according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a first stage low noise voltage module according to an embodiment of the present invention;
fig. 3 is a schematic circuit diagram of a second stage boost filter module according to an embodiment of the present invention;
fig. 4 is a schematic circuit diagram of a third-stage voltage-stabilizing filtering module according to an embodiment of the present invention;
fig. 5 is a schematic circuit structure diagram of a fourth-stage filter driving module according to an embodiment of the present invention;
fig. 6 is a schematic circuit diagram of a voltage source circuit according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
Fig. 1 is a schematic structural diagram of a voltage source circuit according to an embodiment of the present invention, which is applicable to providing an ultra-low noise voltage source for a crystal oscillator, and the like, and the voltage source circuit includes: the device comprises a first-stage low-noise voltage module 10, a second-stage boosting filtering module 20, a third-stage voltage-stabilizing filtering module 30 and a fourth-stage filtering driving module 40.
The first-stage low-noise voltage module 10 includes a first operational amplifier unit 11 and a first transistor unit 12, a first input end and a second input end of the first operational amplifier unit 11 and a first input end of the first transistor unit 12 are both connected to a dc voltage Vdd, an output end of the first operational amplifier unit 11 is electrically connected to a second input end of the first transistor unit 12, and an output end of the first transistor unit 12 is electrically connected to an input end of the second-stage boost filter module 20. The second stage boost filtering module 20 includes a second operational amplifier unit 21 and a second transistor unit 22, an input terminal of the second operational amplifier unit 21 serves as an input terminal of the second stage boost filtering module 20, a first output terminal of the second operational amplifier unit 21 is electrically connected to a first input terminal of the second transistor unit 22, a second output terminal of the second operational amplifier unit 21 is electrically connected to an output terminal of the second transistor unit 22, a second input terminal of the second transistor unit 21 is connected to a dc power supply, and an output terminal of the second transistor unit 22 is electrically connected to an input terminal of the third stage voltage stabilization filtering module 30. The third stage voltage stabilizing and filtering module 30 includes a first resistor R1 and a third transistor unit 31, a first end of the first resistor R1 is used as an input terminal of the third stage voltage stabilizing and filtering module 30, a first end of the first resistor R1 is electrically connected to a first end of the third transistor unit 31, a second end of the first resistor R1 is electrically connected to a second end of the third transistor unit 31, and a second end of the first resistor R1 is electrically connected to an input terminal of the fourth stage voltage stabilizing and filtering module 40. The fourth-stage voltage-stabilizing filter module 40 includes a second resistor R2 and a fourth transistor unit 41, a first input terminal of the fourth transistor unit 41 serves as an input terminal of the fourth-stage voltage-stabilizing filter module 40, a first input terminal of the fourth transistor unit 41 is electrically connected to a second input terminal of the fourth transistor unit 41 through a second resistor R2, and an output terminal of the fourth transistor unit 41 serves as an output terminal Vout of the voltage source circuit to output the ultra-low noise voltage.
Specifically, when the first input terminal and the second input terminal of the first operational amplifier unit 11 and the first input terminal of the first transistor unit 12 are both connected to the dc voltage Vdd, the first-stage low-noise voltage module 10 starts to operate. The first stage low noise voltage block 10 may be an ultra low noise bandgap reference voltage block. The first operational amplifier unit 11 may include an operational amplifier and a plurality of transistors, the first operational amplifier unit 11 may perform noise reduction on the input voltage, transmit a low noise voltage to the first transistor unit 12, and output voltage of the first transistor unit 12 and parameters of the first operational amplifier unit, such as three of the first operational amplifier unit 11Emitter current of the diode, and parameters of first transistor unit 12 such as V of the transistor in first transistor unit 12BEAnd the thermal voltage, which is not described herein in detail, the conventional ultra-low noise bandgap reference voltage circuit can be referred to. The first transistor unit 12 may output an ultra-low noise reference voltage according to the voltage output by the first operational amplifier unit 11. The second operational amplifier unit 21 in the second stage boost filtering module 20 can boost and filter the input ultra-low noise reference voltage to suppress noise and prevent noise from being amplified, and the second transistor unit 22 performs noise reduction processing on the boosted and filtered voltage to further reduce noise in the dc voltage. When the voltage inputted to the input terminal of the third-stage voltage-stabilizing filtering module 30 is outputted through the first resistor R1, the parameter of the third transistor unit 31 is adjusted, so that the ac noise in the voltage outputted from the second terminal of the first resistor R1 can be greatly suppressed. The voltage input at the first input terminal of the fourth transistor unit 41 may still have noise, the noise may be blocked by the second resistor R2 and the fourth transistor unit 41, and the voltage output at the output terminal of the fourth transistor unit 41, i.e. the output terminal Vout of the voltage source circuit, is an ultra-low noise voltage, so that the purpose of outputting the ultra-low noise voltage by the voltage source circuit is achieved.
The voltage source circuit provided by the embodiment comprises a first-stage low-noise voltage module, a second-stage boosting filtering module, a third-stage voltage-stabilizing filtering module and a fourth-stage filtering driving module; the first-stage low-noise voltage module comprises a first operational amplifier unit and a first transistor unit, the second-stage boosting filtering module comprises a second operational amplifier unit and a second transistor unit, the third-stage voltage-stabilizing filtering module comprises a first resistor and a third transistor unit, and the fourth-stage voltage-stabilizing filtering module comprises a second resistor and a fourth transistor unit. The voltage source circuit that this embodiment provided, through the ultralow noise reference voltage of first order low noise voltage module output, and step up and filter the ultralow noise reference voltage of input through the second level filtering module that steps up, further filter the direct current voltage by third level steady voltage filtering module and fourth level filtering drive module, thereby can carry out the great degree ground noise reduction processing to the direct current voltage of voltage source circuit input through the fourth level module, alternating current noise among the greatly reduced direct current voltage, realize the purpose of voltage source circuit output ultralow noise voltage.
Fig. 2 is a schematic circuit structure diagram of a first-stage low-noise voltage module according to an embodiment of the present invention, referring to fig. 2, optionally, the first operational amplifier unit 11 includes a first operational amplifier a1, a third resistor R3, a first MOS transistor M1, a second MOS transistor M2, a first triode Q1, a second triode Q2, a third triode Q3, and a fourth triode Q4.
A first pole of the first MOS transistor M1 is used as a first input terminal of the first operational amplifier unit 11, a gate of the first MOS transistor M1 is electrically connected to an output terminal of the first operational amplifier a1, a second pole of the first MOS transistor M1 is electrically connected to a first pole of the first transistor Q1, a first pole of the first transistor Q1 is electrically connected to a base of the first transistor Q1, a second pole of the first transistor Q1 is electrically connected to a first pole of the second transistor Q2, a first pole of the second transistor Q2 is electrically connected to a base of the second transistor Q2, a second pole of the second transistor Q2 is grounded, and a first pole of the second transistor Q2 is electrically connected to an inverting input terminal of the first operational amplifier a 1. A first pole of the second MOS transistor M2 serves as a second input terminal of the first operational amplifier unit, a gate of the second MOS transistor M2 is electrically connected to an output terminal of the first operational amplifier a1, a second pole of the second MOS transistor M2 is electrically connected to a first pole of the third transistor Q3, a first pole of the third transistor Q3 is electrically connected to a base of the third transistor Q3, a second pole of the third transistor Q3 is electrically connected to a first pole of the fourth transistor Q4 through a third resistor R3, a first pole of the fourth transistor Q4 is electrically connected to a base of the fourth transistor Q4, a second pole of the fourth transistor Q4 is grounded, and an output terminal of the first operational amplifier a1 serves as an output terminal of the first operational amplifier unit 11.
Specifically, the dc voltage input to the first pole of the first MOS transistor M1 is transmitted to the first transistor Q1 through the first MOS transistor M1, and the dc voltage input to the first pole of the second MOS transistor M2 is transmitted to the third transistor Q3 through the second MOS transistor M2. The first operational amplifier a1 is connected to four transistors, the emitter of the first transistor Q1 and the emitter of the second transistor Q2 are both electrically connected to the inverting input terminal of the first operational amplifier a1, the emitter of the third transistor Q3 is electrically connected to the positive input terminal of the first operational amplifier a1, and the emitter of the fourth transistor Q4 is electrically connected to the positive input terminal of the first operational amplifier a1 through a third resistor R3, so that the low-order noise in the dc voltage can be eliminated, and the first transistor unit 12 can output the ultra-low noise reference voltage through the first operational amplifier a 1.
With continued reference to fig. 2, optionally, the first transistor unit 12 includes a third MOS transistor M3, a fifth transistor Q5, a sixth transistor Q6, and a fourth resistor R4; a first pole of the third MOS transistor M3 serves as a first input terminal of the first transistor unit 12, a gate of the third MOS transistor M3 serves as a second input terminal of the first transistor unit 12, a second pole of the third MOS transistor M3 is electrically connected to a first pole of the fifth transistor Q5, a first pole of the fifth transistor Q5 is electrically connected to a base of the fifth transistor Q5, a second pole of the fifth transistor Q5 is electrically connected to a first pole of the sixth transistor Q6 through the fourth resistor R4, a first pole of the sixth transistor Q6 is electrically connected to a base of the sixth transistor Q6, a second pole of the sixth transistor Q6 is grounded, and a second pole of the fifth transistor Q5 serves as an output terminal of the first transistor unit 12.
Specifically, a dc voltage is input to a first pole of the third MOS transistor M3, a voltage output by the first operational amplifier a1 is transmitted to a gate of the third MOS transistor M3, a ratio of the dc voltage output by an emitter of the fifth transistor Q5 to resistances of the third resistor R3 and the fourth resistor R4, and a voltage difference V between a base and an emitter of the sixth transistor Q6BEAnd the ratio of the emitter current of the third transistor Q3 to the emitter current of the second transistor Q2. Through the circuit of the first operational amplifier unit 11 shown in fig. 2, a voltage difference V is generated between the base and the emitter of the sixth transistor Q6BEThrough VBEThe negative temperature coefficient and the positive temperature coefficient of the thermal voltage are mutually offset to form a reference voltage source irrelevant to temperature, so that low-order noise can be eliminated, and the direct-current voltage output by the emitter of the fifth triode Q5, namely the voltage output by the first transistor unit 12 is the ultra-low noise reference voltage.
Fig. 3 is a schematic circuit structure diagram of a second stage boost filter module according to an embodiment of the present invention, referring to fig. 3, optionally, the second operational amplifier unit 21 includes a second operational amplifier a2, a first capacitor C1, a fifth resistor R5, a sixth resistor R6, and a seventh resistor R7.
A first end of the fifth resistor R5 is used as the input terminal Vin1 of the second operational amplifier unit 21, a second end of the fifth resistor R5 is electrically connected to the positive input terminal of the second operational amplifier a2, the negative input terminal of the second operational amplifier a2 is grounded through the sixth resistor R6, the output terminal of the second operational amplifier a2 is electrically connected to the negative input terminal of the second operational amplifier a2 through the first capacitor C1, a first end of the seventh resistor R7 is electrically connected to the negative input terminal of the second operational amplifier a2, the output terminal of the second operational amplifier a2 is used as the first output terminal of the second operational amplifier unit 21, and a second end of the seventh resistor R7 is used as the second output terminal of the second operational amplifier unit 21.
Specifically, the voltage outputted by the first stage low noise voltage module, i.e. the ultra-low noise reference voltage outputted by the first transistor unit 12, is transmitted to the input terminal Vin1 of the second operational amplifier unit 21, i.e. the first terminal of the fifth resistor R5, through the output terminal of the first transistor unit 12, and is transmitted to the positive input terminal of the second operational amplifier a2 through the second terminal of the fifth resistor R5. The second operational amplifier a2 may boost the input reference voltage to a desired voltage, that is, the voltage output by the output terminal of the second operational amplifier a2 is the boosted voltage of the reference voltage, and the voltage output by the output terminal of the second operational amplifier a2 is fed back to the inverting output terminal of the second operational amplifier a2 through the first capacitor C1. The first capacitor C1 can select a proper capacitance value according to actual needs, and the proper capacitance value performs deep negative feedback on a noise signal in a required frequency range, so that noise in voltage is suppressed, and the noise is prevented from being amplified.
With continued reference to fig. 3, optionally, the second transistor unit 22 includes a seventh transistor Q7 and a second capacitor C2, a base of the seventh transistor Q7 is used as a first input terminal of the second transistor unit 22, a first pole of the seventh transistor Q7 is used as a second input terminal of the second transistor unit 22, a second pole of the seventh transistor Q7 is grounded through the second capacitor C2, and a second pole of the seventh transistor Q7 is used as an output terminal Vout2 of the second transistor unit 22.
Specifically, the voltage output by the output terminal of the second operational amplifier a2 is transmitted to the base of the seventh transistor Q7 after noise suppression by the first capacitor C1. The first input terminal and the second input terminal of the first operational amplifier unit 11, the first input terminal of the first transistor unit 12, and the second input terminal of the second transistor unit 22 are all input terminals of a voltage source circuit, and are connected to the same dc voltage Vdd. Since the first pole of the seventh transistor Q7 is used as the second input terminal of the second transistor unit 22, the voltage input by the first pole of the seventh transistor Q7 is a dc voltage, and the seventh transistor Q7 is a controlled voltage source, so that the seventh transistor Q7 has the functions of increasing the driving current and reducing noise, thereby further reducing noise in the voltage output by the second pole of the seventh transistor Q7.
Fig. 4 is a schematic circuit structure diagram of a third-stage voltage stabilizing and filtering module according to an embodiment of the present invention, and referring to fig. 4, optionally, the third transistor unit 31 includes an eighth transistor Q8, a third capacitor C3, a fourth capacitor C4, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, and an eleventh resistor R11.
A first end of the third capacitor C3 is used as a first end of the third transistor unit 31, a first end of the eighth resistor R8 is used as a second end of the third transistor unit 31, a second end of the third capacitor C3 is electrically connected to a base of the eighth triode Q8, a second end of the eighth resistor R8 is electrically connected to a first end of the eighth triode Q8, a first end of the eighth resistor R8 is grounded through the fourth capacitor C4, a base of the eighth triode Q8 is electrically connected to a first end of the eighth triode Q8 through the ninth resistor R9, a base of the eighth triode Q8 is grounded through the tenth resistor R10, and a second end of the eighth triode Q8 is grounded through the eleventh resistor R11.
Specifically, the first resistor R1, the eighth resistor R8, the ninth resistor R9 and the tenth resistor R10 are all adjustable resistors. The first end of the first resistor R1 is used as the input terminal Vin2 of the third stage voltage-stabilizing filter module, and the second end of the first resistor R1 is used as the output terminal Vout3 of the third stage voltage-stabilizing filter module. In a practical circuit, the dc voltage input to the first end of the first resistor R1 inevitably has an ac noise component, the collector current of the eighth transistor Q8 can generate a 180 ° reverse potential change at the second end of the first resistor R1 relative to the first end of the first resistor R1 by adjusting the bias circuit of the eighth transistor Q8 amplification circuit, and the ac noise spectral line at the first end of the first resistor R1 can be suppressed by more than one hundred times by adjusting the adjustable resistor near the second end of the first resistor R1, so that the voltage in the voltage source circuit is further reduced in noise by the third stage voltage-stabilizing filter module.
Fig. 5 is a schematic circuit structure diagram of a fourth-stage filtering driving module according to an embodiment of the present invention, referring to fig. 5, optionally, the fourth transistor unit 41 includes a ninth transistor Q9, a fifth capacitor C5, and a sixth capacitor C6, a first pole of the ninth transistor Q9 is used as a first input terminal of the fourth transistor unit 41, a base of the ninth transistor Q9 is used as a second input terminal of the fourth transistor unit 41, a base of the ninth transistor Q9 is grounded through the fifth capacitor C5, and a first pole of the ninth transistor Q9 is grounded through the sixth capacitor C6.
Specifically, the dc voltage input to the first pole of the ninth transistor Q9 still contains unavoidable noise, the noise is isolated by the second resistor R2, the isolation degree is determined by the resistance value of the second resistor R2, the dc voltage input to the fourth transistor unit 41 can be further filtered by the fifth capacitor C5 and the sixth capacitor C6, the emitter of the ninth transistor Q9 can output ultra-low noise voltage, and the voltage output by the emitter of the ninth transistor Q9 is controlled voltage, so that the current driving capability is large.
Fig. 6 is a schematic circuit structure diagram of a voltage source circuit according to an embodiment of the present invention, where the voltage source circuit shown in fig. 6 is a voltage source circuit obtained by combining the circuits of the parts shown in fig. 2 to fig. 5, and the operation process of the voltage source circuit is specifically described in the circuits of the parts, which is not described herein again.
The embodiment of the invention also provides a power management chip, which comprises the voltage source circuit in any embodiment of the invention, and the voltage source circuit is integrated on the power management chip. The power management chip provided by the embodiment of the invention includes the voltage source circuit provided by any of the above embodiments of the invention, and thus has a corresponding structure and beneficial effects of the voltage source circuit, which are not described herein again.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious modifications, rearrangements, combinations and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (10)
1. A voltage source circuit, comprising: the first-stage low-noise voltage module, the second-stage boosting filtering module, the third-stage voltage-stabilizing filtering module and the fourth-stage filtering driving module;
the first-stage low-noise voltage module comprises a first operational amplifier unit and a first transistor unit, wherein a first input end and a second input end of the first operational amplifier unit and a first input end of the first transistor unit are connected with direct-current voltage, an output end of the first operational amplifier unit is electrically connected with a second input end of the first transistor unit, and an output end of the first transistor unit is electrically connected with an input end of the second-stage boosting filter module;
the second-stage boosting filtering module comprises a second operational amplifier unit and a second transistor unit, wherein the input end of the second operational amplifier unit is used as the input end of the second-stage boosting filtering module, the first output end of the second operational amplifier unit is electrically connected with the first input end of the second transistor unit, the second output end of the second operational amplifier unit is electrically connected with the output end of the second transistor unit, the second input end of the second transistor unit is connected with a direct-current power supply, and the output end of the second transistor unit is electrically connected with the input end of the third-stage voltage-stabilizing filtering module;
the third-stage voltage-stabilizing filtering module comprises a first resistor and a third transistor unit, wherein a first end of the first resistor is used as an input end of the third-stage voltage-stabilizing filtering module, a first end of the first resistor is electrically connected with a first end of the third transistor unit, a second end of the first resistor is electrically connected with a second end of the third transistor unit, and a second end of the first resistor is electrically connected with an input end of the fourth-stage voltage-stabilizing filtering module;
the fourth-stage voltage-stabilizing filtering module comprises a second resistor and a fourth transistor unit, a first input end of the fourth transistor unit is used as an input end of the fourth-stage voltage-stabilizing filtering module, a first input end of the fourth transistor unit is electrically connected with a second input end of the fourth transistor unit through the second resistor, and an output end of the fourth transistor unit is used as an output end of the voltage source circuit to output ultra-low noise voltage.
2. The voltage source circuit according to claim 1, wherein the first operational amplifier unit comprises a first operational amplifier, a third resistor, a first MOS transistor, a second MOS transistor, a first triode, a second triode, a third triode and a fourth triode;
a first pole of the first MOS transistor serves as a first input end of the first operational amplifier unit, a gate of the first MOS transistor is electrically connected with an output end of the first operational amplifier, a second pole of the first MOS transistor is electrically connected with a first pole of the first triode, the first pole of the first triode is electrically connected with a base electrode of the first triode, the second pole of the first triode is electrically connected with a first pole of the second triode, the first pole of the second triode is electrically connected with a base electrode of the second triode, the second pole of the second triode is grounded, and the first pole of the second triode is electrically connected with a reverse input end of the first operational amplifier;
the first pole of the second MOS tube is used as the second input end of the first operational amplifier unit, the grid electrode of the second MOS tube is electrically connected with the output end of the first operational amplifier, the second pole of the second MOS tube is electrically connected with the first pole of the third triode, the first pole of the third triode is electrically connected with the base electrode of the third triode, the second pole of the third triode is electrically connected with the first pole of the fourth triode through the third resistor, the first pole of the fourth triode is electrically connected with the base electrode of the fourth triode, the second pole of the fourth triode is grounded, and the output end of the first operational amplifier is used as the output end of the first operational amplifier unit.
3. The voltage source circuit according to claim 1, wherein the first transistor unit comprises a third MOS transistor, a fifth triode, a sixth triode and a fourth resistor; a first pole of the third MOS transistor serves as a first input end of the first transistor unit, a gate of the third MOS transistor serves as a second input end of the first transistor unit, a second pole of the third MOS transistor is electrically connected with a first pole of the fifth triode, the first pole of the fifth triode is electrically connected with a base of the fifth triode, the second pole of the fifth triode is electrically connected with the first pole of the sixth triode through the fourth resistor, the first pole of the sixth triode is electrically connected with the base of the sixth triode, the second pole of the sixth triode is grounded, and the second pole of the fifth triode serves as an output end of the first transistor unit.
4. The voltage source circuit of claim 1, wherein the second operational amplifier unit comprises a second operational amplifier, a first capacitor, a fifth resistor, a sixth resistor, and a seventh resistor; the first end of the fifth resistor is used as the input end of the second operational amplifier unit, the second end of the fifth resistor is electrically connected with the positive input end of the second operational amplifier, the negative input end of the second operational amplifier is grounded through the sixth resistor, the output end of the second operational amplifier is electrically connected with the negative input end of the second operational amplifier through the first capacitor, the first end of the seventh resistor is electrically connected with the negative input end of the second operational amplifier, the output end of the second operational amplifier is used as the first output end of the second operational amplifier unit, and the second end of the seventh resistor is used as the second output end of the second operational amplifier unit.
5. The voltage source circuit according to claim 1, wherein the second transistor unit comprises a seventh transistor and a second capacitor, a base of the seventh transistor is used as a first input terminal of the second transistor unit, a first pole of the seventh transistor is used as a second input terminal of the second transistor unit, a second pole of the seventh transistor is grounded through the second capacitor, and a second pole of the seventh transistor is used as an output terminal of the second transistor unit.
6. The voltage source circuit according to claim 1, wherein the third transistor unit comprises an eighth triode, a third capacitor, a fourth capacitor, an eighth resistor, a ninth resistor, a tenth resistor, and an eleventh resistor; a first end of the third capacitor is used as a first end of the third transistor unit, a first end of the eighth resistor is used as a second end of the third transistor unit, a second end of the third capacitor is electrically connected to a base of the eighth triode, a second end of the eighth resistor is electrically connected to a first electrode of the eighth triode, a first end of the eighth resistor is grounded through the fourth capacitor, a base of the eighth triode is electrically connected to a first electrode of the eighth triode through the ninth resistor, a base of the eighth triode is grounded through the tenth resistor, and a second electrode of the eighth triode is grounded through the eleventh resistor.
7. The voltage source circuit of claim 6, wherein the first resistor, the eighth resistor, the ninth resistor, and the tenth resistor are all adjustable resistors.
8. The voltage source circuit according to claim 1, wherein the fourth transistor unit comprises a ninth transistor, a fifth capacitor and a sixth capacitor, a first pole of the ninth transistor serves as the first input terminal of the fourth transistor unit, a base of the ninth transistor serves as the second input terminal of the fourth transistor unit, the base of the ninth transistor is grounded through the fifth capacitor, and a first pole of the ninth transistor is grounded through the sixth capacitor.
9. The voltage source circuit of claim 1, wherein the first input terminal and the second input terminal of the first operational amplifier unit, the first input terminal of the first transistor unit, and the second input terminal of the second transistor unit are used as input terminals of the voltage source circuit, and the same dc voltage is applied.
10. A power management chip comprising a voltage source circuit according to any one of claims 1 to 9, the voltage source circuit being integrated in the power management chip.
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| CN113067466B (en) | 2022-06-24 |
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