CN112882422A - MCU mode control circuit, control method and MCU - Google Patents
MCU mode control circuit, control method and MCU Download PDFInfo
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Abstract
The invention relates to the technical field of microelectronics, and discloses an MCU mode control circuit, a control method and an MCU, wherein the MCU mode control circuit comprises: mode detection module (100) comprising: a first mode selection signal terminal, a second mode selection signal terminal and a third mode selection signal terminal, which are respectively used for receiving a first mode selection signal, a second mode selection signal and a third mode selection signal; and the input end of the frequency detection module (200) is connected with the third mode selection signal end, and the output end of the frequency detection module (200) is connected with the mode detection module (100) and is used for detecting the frequency of the third mode selection signal. The invention has at least the following beneficial effects: the MCU can work in an expected mode more stably and adapt to different scene requirements.
Description
Technical Field
The invention relates to the technical field of microelectronics, in particular to an MCU mode control circuit, a control method and an MCU.
Background
Along with the rapid development of informatization, more and more intelligent electronic products are used in the life of people, electronic products such as an intelligent electric cooker, an electromagnetic oven, a hot water kettle and the like increasingly permeate the daily life of people, the popularization of the electronic products also drives the development of the MCU industry, and each intelligent household appliance product is internally provided with an MCU main control chip. In the process of technical development and competition promotion, the quality requirements of customers on products are more and more strict, and the requirements on MCU performance are more and more high, such as the safety performance, yield requirement, working stability and the like of chips.
In the prior art, when an MCU chip is designed, different start modes, such as a mass production test mode, an eflash erase/write mode, etc., are generally set based on various usage scenarios of the MCU. In the starting process, different starting modes can be selected according to needs, the common practice in the prior art is to apply different level combinations to the IO of the chip during starting so as to enter different modes, the IO level can be conveniently changed by the method so as to enter different modes, but the method also has obvious defects, namely the mode is easy to be mistakenly entered, and irreparable results are caused.
Disclosure of Invention
The present invention is directed to solving at least one of the problems of the prior art. Therefore, the invention provides an MCU mode control circuit, which can enable an MCU to work in an expected mode more stably and adapt to different scene requirements.
The invention also provides an MCU mode control method with the MCU mode control circuit.
The invention also provides an MCU with the MCU mode control circuit and an MCU comprising the MCU mode control method.
An MCU mode control circuit according to an embodiment of a first aspect of the present invention includes: a pattern detection module 100, the pattern detection module 100 comprising: a first mode selection signal terminal, a second mode selection signal terminal and a third mode selection signal terminal, which are respectively used for receiving a first mode selection signal, a second mode selection signal and a third mode selection signal; and a frequency detection module 200, wherein an input end of the frequency detection module 200 is connected to the third mode selection signal end, and an output end of the frequency detection module 200 is connected to the mode detection module 100, and is configured to detect a frequency of the third mode selection signal.
According to some embodiments of the invention, further comprising: an embedded flash control module 300, one end of the embedded flash control module 300 being bidirectionally connected to the mode detection module 100, and configured to generate control signals, where the control signals include a first control signal, a second control signal, and a third control signal; an embedded flash memory 400, one end of the embedded flash memory 400 being bidirectionally connected to the other end of the embedded flash memory control module 300; a clock management module 500, an input end of which is connected to the mode detection module 100; and the input end of the reset management module 600 is connected with the mode detection module 100.
According to some embodiments of the invention, the mode detection module 100 further comprises: a first mode selection unit 110, a first input end of the first mode selection unit 110 is connected to the second mode selection signal end, and a second input end is connected to the third mode selection signal end; a second mode selection unit 120, a first input terminal of the second mode selection unit 120 is connected to the first mode selection unit 110, and a second input terminal is connected to the first mode selection signal terminal; a third mode selecting unit 130, a first input end of the third mode selecting unit 130 is connected to the second mode selecting unit 120, a second input end is connected to the second control signal end of the embedded flash memory control module 300, and a third input end is connected to the third control signal end of the embedded flash memory control module 300; a data selecting unit 140, a first input terminal of the data selecting unit 140 is connected to the third mode selection signal terminal, a second input terminal is connected to the frequency detecting module 200, and a control terminal is connected to the first control signal terminal of the embedded flash memory control module 300.
According to some embodiments of the invention, the first mode selection unit 110 comprises: a first inverter 111, an input terminal of the first inverter 111 being connected to the second mode selection signal terminal; a second inverter 112, an input terminal of the second inverter 112 being connected to the third mode selection signal terminal; a third inverter 113, an input terminal of the third inverter 113 being connected to the second mode selection signal terminal; a fourth inverter 114, an input terminal of the fourth inverter 114 being connected to the third mode selection signal terminal; a first and gate 115, a first input terminal of the first and gate 115 is connected to the output terminal of the first inverter 111, and a second input terminal of the first and gate 115 is connected to the output terminal of the second inverter 112; a second and gate 116, a first input terminal of the second and gate 116 is connected to the output terminal of the third inverter 113, and a second input terminal is connected to the third mode selection signal terminal; a third and gate 117, a first input terminal of the third and gate 117 is connected to the output terminal of the fourth inverter 114, and a second input terminal is connected to the second mode selection signal terminal; a fourth and gate 118, a first input terminal of the fourth and gate 118 is connected to the output terminal of the data selection unit 140, and a second input terminal is connected to the second mode selection signal terminal.
According to some embodiments of the invention, the second mode selection unit 120 comprises: a fifth and gate 121, a first input end of the fifth and gate 121 is connected to the first mode selection signal end, and a second input end is connected to the output end of the first and gate 115; a sixth and gate 122, a first input end of the sixth and gate 122 is connected to the first mode selection signal end, and a second input end is connected to the output end of the second and gate 116; a seventh and gate 123, a first input end of the seventh and gate 123 is connected to the first mode selection signal end, and a second input end is connected to an output end of the third and gate 117; and an eighth and gate 124, a first input terminal of the eighth and gate 124 is connected to the first mode selection signal terminal, and a second input terminal of the eighth and gate 124 is connected to the output terminal of the fourth and gate 118.
According to some embodiments of the invention, the third mode selection unit 130 comprises: a ninth and gate 131, a first input end of the ninth and gate 131 is connected to the output end of the fifth and gate 121, and a second input end is connected to the second control signal end; a tenth and gate 132, wherein a first input end of the tenth and gate 132 is connected to an output end of the sixth and gate 122, and a second input end is connected to the second control signal end; a first input end of the eleventh and gate 133 is connected to the output end of the seventh and gate 123, and a second input end of the eleventh and gate 133 is connected to the second control signal end; a twelfth and gate 134, wherein a first input terminal of the twelfth and gate 134 is connected to the output terminal of the eighth and gate 124, and a second input terminal thereof is connected to the third control signal terminal.
The MCU starting mode control method according to the embodiment of the second aspect of the invention comprises the following steps: the mode detection module 100 receives at least 2 channels of mode selection signals and at least 1 channel of control signals; the mode detection module 100 outputs a mode control signal according to the level of the control signal and the level or frequency of the mode selection signal; and the MCU enters different starting modes according to the mode control signal.
According to some embodiments of the present invention, the mode detecting module 100 receiving at least 2-way mode selection signals and at least 1-way control signal comprises: the embedded flash memory control module 300 reads eflash NVR preset area data and sends the data to the mode detection module 100; the mode detection module 100 sends a corresponding command to the clock management module 500, the embedded flash memory control module 300, and the reset management module 600 according to the data and the mode selection signal.
According to some embodiments of the present invention, the mode detecting module 100 outputs the mode control signal according to a level of the control signal and a level or a frequency of the mode selection signal, including: if the first mode selection signal is a low level signal, outputting a control signal for controlling the MCU to enter a normal starting working mode; and if the first control signal is a high-level signal, judging whether the frequency of the input signal of the third mode selection signal is within a preset range, and if the frequency of the input signal of the third mode selection signal is within the preset range and the second mode selection signal and the third control signal are both high-level signals, outputting a control signal for controlling the MCU to enter a special erasing and writing working mode.
The MCU according to the third aspect of the embodiment of the invention comprises an MCU mode control circuit, and the MCU enters a corresponding starting mode according to an MCU starting mode control method when being started.
The MCU mode control circuit according to the embodiment of the invention at least has the following beneficial effects: the control circuit adopts a mode of judging the mode entering by level combination and combines the function of judging the mode entering by the square wave frequency range, thereby improving the safety of mode control; the technical scheme of the invention can ensure that the MCU can conveniently switch different working modes in the early testing stage, and can safely avoid mistakenly entering other modes in the application stage after the mass production testing is finished.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
The above and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
FIG. 1 is a block diagram of a mode control circuit according to a first embodiment of the present invention;
FIG. 2 is a block diagram of a mode control circuit according to a second embodiment of the present invention;
FIG. 3 is a block diagram of a mode control circuit according to a third embodiment of the present invention;
FIG. 4 is a diagram of a mode control circuit according to a fourth embodiment of the present invention;
FIG. 5 is a schematic flow chart of a method according to a first embodiment of the present invention;
FIG. 6 is a flowchart illustrating a method according to a second embodiment of the present invention.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention.
In the description of the present invention, the meaning of a plurality of means is one or more, the meaning of a plurality of means is two or more, and more than, less than, more than, etc. are understood as excluding the present number, and more than, less than, etc. are understood as including the present number. If the first and second are described for the purpose of distinguishing technical features, they are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.
Interpretation of terms:
MCU Microcontroller unit, a microcontrol unit
Important information storage area in flash inside MCU
Referring to fig. 1, fig. 1 is a block schematic diagram of a mode control circuit according to a first embodiment of the present invention, including:
mode detection module 100, mode detection module 100 includes: a first mode selection signal terminal, a second mode selection signal terminal and a third mode selection signal terminal, which are respectively used for receiving a first mode selection signal, a second mode selection signal and a third mode selection signal;
and an input end of the frequency detection module 200 is connected to the third mode selection signal end, and an output end of the frequency detection module 200 is connected to the mode detection module 100, and is configured to detect a frequency of the third mode selection signal.
It should be noted that, the mode detection module 100 receives and detects signal characteristics of the first mode selection signal, the second mode selection signal and the third mode selection signal, where the signal characteristics may refer to a level or a frequency, and the frequency detection module 200 detects a frequency range of the third mode selection signal, when the frequency range of the third mode selection signal is within a preset frequency range, the mode detection module is controlled to output a corresponding control signal according to the signal characteristics of the mode selection signal, and the MCU is controlled to enter different start modes by the control signal.
Fig. 2 is a block diagram schematically illustrating a mode control circuit according to a second embodiment of the present invention, including:
an embedded flash control module 300, one end of the embedded flash control module 300 being bidirectionally connected to the mode detection module 100 for generating control signals, the control signals including a first control signal, a second control signal and a third control signal, and the mode control signals output by the mode detection module being controllable by the control signals;
in a specific embodiment, the embedded flash control module 300 controls the read, write, and erase actions of the eflash inside the MCU, and when the MCU is powered on, the module automatically reads the content of the specified address of the eflash NVR area, and feeds back the read content to the mode detection module 100 to instruct the mode detection module 100 which mode to determine.
An embedded flash memory 400, one end of the embedded flash memory 400 being bidirectionally connected to the other end of the embedded flash memory control module 300;
a clock management module 500, the input end of which is connected with the mode detection module 100;
and the input end of the reset management module 600 is connected with the mode detection module 100.
As shown in fig. 2, specifically, the first mode selection signal, the second mode selection signal, and the third mode selection signal are signals for mode selection, and a user enters different start modes by applying different ground levels or square waves to the mode selection signal ports when powering on. The first mode selection signal is a master switch, and the internal default is pulled down, when the first mode selection signal is applied with high level from the outside, the level combination of the second mode selection signal and the third mode selection signal determines which starting mode is entered, wherein 4 combinations are totally included in a specific embodiment. It should be noted that, in the high-safety mode, the third mode selection signal no longer uses the level as the basis for determining the mode entry, but needs to input a square wave with a certain frequency threshold range to enter a specific mode.
Referring to fig. 3, fig. 3 is a block schematic diagram of a mode control circuit according to a third embodiment of the present invention, wherein the mode detection module 100 further includes:
a first mode selection unit 110, a first input terminal of the first mode selection unit 110 is connected to the second mode selection signal terminal, a second input terminal is connected to the third mode selection signal terminal, and the first mode selection unit 110 judges a combination of the first mode selection signal and the second mode selection signal and outputs four combination states;
a second mode selecting unit 120, a first input end of the second mode selecting unit 120 is connected to the first mode selecting unit 110, a second input end is connected to the first mode selecting signal end, the first mode selecting signal end can be regarded as a master switch of the second mode selecting unit 120, and when the first mode selecting signal is in a failure state, output signals of the second mode selecting unit are both failure signals;
a third mode selection unit 130, wherein a first input end of the third mode selection unit 130 is connected to the second mode selection unit 120, a second input end is connected to a second control signal end of the embedded flash control module 300, a third input end is connected to a third control signal end of the embedded flash control module 300, and the second control signal and the third control signal determine which start mode the MCU finally enters by controlling the signal output of the third mode selection unit 130;
in a specific embodiment, when the first control signal is at a high level, the data selecting unit selects the output signal of the frequency detection module as its own output signal, and when the first control signal is at a low level, the data selecting unit selects the third mode selection signal as its own output signal, it can be understood that the first control signal, the second control signal and the third control signal are output by the embedded flash control module 300.
Referring to fig. 4, fig. 4 is a schematic diagram of a mode control circuit according to a fourth embodiment of the present invention, wherein the first mode selecting unit 110 includes:
a first inverter 111, an input terminal of the first inverter 111 being connected to the second mode selection signal terminal;
a second inverter 112, an input terminal of the second inverter 112 being connected to the third mode selection signal terminal;
a third inverter 113, an input terminal of the third inverter 113 being connected to the second mode selection signal terminal;
a fourth inverter 114, an input terminal of the fourth inverter 114 being connected to the third mode selection signal terminal;
a first and gate 115, a first input terminal of the first and gate 115 being connected to the output terminal of the first inverter 111, and a second input terminal thereof being connected to the output terminal of the second inverter 112;
a second and gate 116, a first input terminal of the second and gate 116 is connected to the output terminal of the third inverter 113, and a second input terminal is connected to the third mode selection signal terminal;
a third and gate 117, a first input terminal of the third and gate 117 being connected to the output terminal of the fourth inverter 114, and a second input terminal thereof being connected to the second mode selection signal terminal;
and a fourth and gate 118, a first input terminal of the fourth and gate 118 being connected to the output terminal of the data selection unit 140, and a second input terminal thereof being connected to the second mode selection signal terminal.
The second mode selection unit 120 includes:
a fifth and gate 121, a first input terminal of the fifth and gate 121 being connected to the first mode selection signal terminal, and a second input terminal thereof being connected to the output terminal of the first and gate 115;
a sixth and gate 122, a first input terminal of the sixth and gate 122 is connected to the first mode selection signal terminal, and a second input terminal is connected to the output terminal of the second and gate 116;
a seventh and gate 123, a first input terminal of the seventh and gate 123 is connected to the first mode selection signal terminal, and a second input terminal is connected to an output terminal of the third and gate 117;
and an eighth and gate 124, a first input terminal of the eighth and gate 124 being connected to the first mode selection signal terminal, and a second input terminal thereof being connected to the output terminal of the fourth and gate 118.
The third mode selection unit 130 includes:
a ninth and gate 131, a first input terminal of the ninth and gate 131 is connected to the output terminal of the fifth and gate 121, and a second input terminal is connected to the second control signal terminal;
a tenth and gate 132, a first input end of the tenth and gate 132 is connected with the output end of the sixth and gate 122, and a second input end is connected with the second control signal end;
a first input end of the eleventh and gate 133 is connected with the output end of the seventh and gate 123, and a second input end is connected with the second control signal end;
and a twelfth and gate 134, wherein a first input terminal of the twelfth and gate 134 is connected to the output terminal of the eighth and gate 124, and a second input terminal thereof is connected to the third control signal terminal.
The mode control circuit state table of the present invention is shown in table 1, and the input states of the respective control signals and the respective mode selection signals when the MCU enters a specific operation mode can be clearly obtained through the mode control circuit state table.
TABLE 1 mode control circuit state table
In fig. 4, the level states of the first mode selection signal, the second mode selection signal and the third mode selection signal are determined by the voltage applied by the external IO, and it can be seen from the figure that the first mode selection signal is a total switch of all modes, and only if the first mode selection signal is 1, it is possible to enter various special start modes. The first control signal determines whether the fourth mode is effective by judging the level of the third mode selection signal or detecting the turnover frequency, and when the first control signal is 1, the third mode selection signal needs to be injected with a square wave within a preset frequency threshold range to enter the fourth mode, so that the difficulty of entering the mode is increased, namely the high-safety mode. The second control signal is a mode control switch of the first mode, the second mode and the third mode, and can be completely closed after the mass production test is finished, so that the possibility of entering the test mode by mistake is eliminated. The third control signal is a separate switch for the fourth mode, which is typically a special erase/write mode that may need to be retained after mass production, but is only allowed to enter when the customer does need to enter the mode, and thus has a separate switch. Even if the mode remains, the mode channel is not easily accessible when open, since the high security mode can be selected earlier.
The scheme simultaneously considers the convenience of entering different modes by changing the IO level combination in the test stage, can select to completely close the channel entering the test mode after the mass production test is finished, or does not close the channel, adopts the method of improving the difficulty of entering the mode, and ensures the safety of the specific start mode of the MCU. Therefore, a user can flexibly select the switch of the mode channel and enter the mode in the using process, and different requirements of chip testers and chip scheme developers are greatly met.
Fig. 5 is a schematic flow chart of a method according to a first embodiment of the present invention, which includes the following steps:
the mode detection module 100 receives at least 2 channels of mode selection signals and at least 1 channel of control signals;
the mode detection module 100 outputs a mode control signal according to the level of the control signal and the level or frequency of the mode selection signal;
and the MCU enters different starting modes according to the mode control signal.
It should be noted that, the mode detection module 100 receives and detects signal characteristics of at least 2 paths of mode selection signals and at least 1 path of control signals, where the signal characteristics may refer to a level or a frequency, outputs a mode control signal according to the level of the control signal and the level or the frequency of the mode selection signal, and controls the MCU to enter different start modes according to the mode control signal, so that the problems in the prior art that it is easy to make a mistake, it is determined that the MCU enters which working mode, and the safety is not high by detecting the signal level of the IO port can be solved.
Fig. 6 is a flowchart illustrating a method according to a second embodiment of the present invention, including:
the embedded flash control module 300 reads the eflash NVR preset area data and sends the data to the mode detection module 100;
the mode detection module 100 sends a corresponding command to the clock management module 500, the embedded flash memory control module 300 and the reset management module 600 according to the data and the mode selection signal.
Specifically, the embedded flash control module 300 is configured to control eflash read, write, and erase operations inside the MCU, and when the MCU is powered on, the module will automatically read contents of an address specified in an eflash NVR region, and feed back the read contents to the mode detection module 100, where the mode detection module 100 determines which start mode to enter according to a level state of a mode selection signal and a control signal, and outputs a corresponding mode flag signal to the clock management module 500, the embedded flash control module 300, and the reset management module 600 inside the chip.
In a specific embodiment of the present invention, if the first mode selection signal is a low level signal, a control signal for controlling the MCU to enter a normal start operation mode is output;
and if the first control signal is a high-level signal, judging whether the frequency of the input signal of the third mode selection signal is within a preset range, and if the frequency of the input signal of the third mode selection signal is within the preset range and the second mode selection signal and the third control signal are both high-level signals, outputting a control signal for controlling the MCU to enter a special erasing and writing working mode.
Other control signal output states may be referred to in table 1 of the present invention as the signal state table.
In an embodiment of the present invention, there is also an MCU, including an MCU mode control circuit, the MCU enters a corresponding start mode according to the MCU mode control method when starting, where the corresponding start mode includes, but is not limited to, a special erase/write mode, a mass production mode, and a flash memory test mode, where the flash memory test mode includes read, write, and erase tests on the flash memory.
The invention reserves the mode of judging the mode entering through the level combination, and simultaneously increases the function of judging the mode entering through the square wave frequency range, thereby improving the safety of mode control. The whole function does not bring too much resource overhead, but achieves the effect of well meeting different requirements of testers and scheme developers at the same time.
It should be further noted that if the option of detecting the square wave is not increased, the probability of the chip entering the wrong mode during the use process is greater. If the difficulty of entering the mode is specially increased, the testing efficiency of a tester is reduced, and different modes are expected to be flexibly switched in the testing process. Therefore, the invention realizes the mode judgment and the distinguishing treatment under different scenes with the minimum cost, and can well meet the requirements under different scenes.
Although specific embodiments have been described herein, those of ordinary skill in the art will recognize that many other modifications or alternative embodiments are equally within the scope of this disclosure. For example, any of the functions and/or processing capabilities described in connection with a particular device or component may be performed by any other device or component. In addition, while various illustrative implementations and architectures have been described in accordance with embodiments of the present disclosure, those of ordinary skill in the art will recognize that many other modifications of the illustrative implementations and architectures described herein are also within the scope of the present disclosure.
Certain aspects of the present disclosure are described above with reference to block diagrams and flowchart illustrations of systems, methods, systems, and/or computer program products according to example embodiments. It will be understood that one or more blocks of the block diagrams and flowchart illustrations, and combinations of blocks in the block diagrams and flowchart illustrations, respectively, can be implemented by executing computer-executable program instructions. Also, according to some embodiments, some blocks of the block diagrams and flow diagrams may not necessarily be performed in the order shown, or may not necessarily be performed in their entirety. In addition, additional components and/or operations beyond those shown in the block diagrams and flow diagrams may be present in certain embodiments.
The embodiments of the present invention have been described in detail with reference to the accompanying drawings, but the present invention is not limited to the above embodiments, and various changes can be made within the knowledge of those skilled in the art without departing from the gist of the present invention.
Claims (10)
1. An MCU mode control circuit, comprising:
a mode detection module (100), the mode detection module (100) comprising: a first mode selection signal terminal, a second mode selection signal terminal and a third mode selection signal terminal, which are respectively used for receiving a first mode selection signal, a second mode selection signal and a third mode selection signal;
and the input end of the frequency detection module (200) is connected with the third mode selection signal end, and the output end of the frequency detection module (200) is connected with the mode detection module (100) and is used for detecting the frequency of the third mode selection signal.
2. The MCU mode control circuit of claim 1, further comprising:
one end of the embedded flash memory control module (300) is bidirectionally connected with the mode detection module (100) and is used for generating control signals, and the control signals comprise a first control signal, a second control signal and a third control signal;
one end of the embedded flash memory (400) is bidirectionally connected with the other end of the embedded flash memory control module (300);
the input end of the clock management module (500) is connected with the mode detection module (100);
and the input end of the reset management module (600) is connected with the mode detection module (100).
3. An MCU mode control circuit according to claim 2, wherein the mode detection module (100) further comprises:
a first mode selection unit (110), a first input terminal of the first mode selection unit (110) being connected to the second mode selection signal terminal, a second input terminal being connected to the third mode selection signal terminal;
a second mode selection unit (120), a first input terminal of the second mode selection unit (120) being connected to the first mode selection unit (110), a second input terminal being connected to the first mode selection signal terminal;
a third mode selection unit (130), wherein a first input end of the third mode selection unit (130) is connected to the second mode selection unit (120), a second input end is connected to a second control signal end of the embedded flash memory control module (300), and a third input end is connected to a third control signal end of the embedded flash memory control module (300);
a first input end of the data selection unit (140) is connected with the third mode selection signal end, a second input end of the data selection unit (140) is connected with the frequency detection module (200), and a control end of the data selection unit is connected with a first control signal end of the embedded flash memory control module (300).
4. An MCU mode control circuit as defined in claim 3, wherein the first mode selection unit (110) comprises:
a first inverter (111), an input terminal of the first inverter (111) being connected to the second mode selection signal terminal;
a second inverter (112), an input terminal of the second inverter (112) being connected to the third mode selection signal terminal;
a third inverter (113), an input terminal of the third inverter (113) being connected to the second mode selection signal terminal;
a fourth inverter (114), an input terminal of the fourth inverter (114) being connected to the third mode selection signal terminal;
a first AND gate (115), wherein a first input end of the first AND gate (115) is connected with an output end of the first inverter (111), and a second input end of the first AND gate is connected with an output end of the second inverter (112);
a second and gate (116), a first input terminal of the second and gate (116) is connected with an output terminal of the third inverter (113), and a second input terminal is connected with the third mode selection signal terminal;
a third and gate (117), a first input terminal of the third and gate (117) is connected with an output terminal of the fourth inverter (114), and a second input terminal is connected with the second mode selection signal terminal;
and a fourth and gate (118), wherein a first input end of the fourth and gate (118) is connected with an output end of the data selection unit (140), and a second input end of the fourth and gate is connected with the second mode selection signal end.
5. An MCU mode control circuit according to claim 4, characterized in that the second mode selection unit (120) comprises:
a fifth and gate (121), a first input terminal of the fifth and gate (121) being connected to the first mode selection signal terminal, a second input terminal being connected to an output terminal of the first and gate (115);
a sixth and gate (122), a first input terminal of the sixth and gate (122) is connected to the first mode selection signal terminal, and a second input terminal is connected to an output terminal of the second and gate (116);
a seventh and gate (123), a first input end of the seventh and gate (123) is connected with the first mode selection signal end, and a second input end is connected with an output end of the third and gate (117);
and a first input end of the eighth AND gate (124) is connected with the first mode selection signal end, and a second input end of the eighth AND gate (124) is connected with the output end of the fourth AND gate (118).
6. An MCU mode control circuit according to claim 5, characterized in that the third mode selection unit (130) comprises:
a ninth AND gate (131), wherein a first input end of the ninth AND gate (131) is connected with an output end of the fifth AND gate (121), and a second input end of the ninth AND gate is connected with the second control signal end;
a tenth and gate (132), wherein a first input end of the tenth and gate (132) is connected with an output end of the sixth and gate (122), and a second input end is connected with the second control signal end;
an eleventh and gate (133), wherein a first input end of the eleventh and gate (133) is connected with an output end of the seventh and gate (123), and a second input end is connected with the second control signal end;
and a twelfth AND gate (134), wherein a first input end of the twelfth AND gate (134) is connected with an output end of the eighth AND gate (124), and a second input end of the twelfth AND gate is connected with the third control signal end.
7. An MCU starting mode control method is characterized by comprising the following steps:
the mode detection module (100) receives at least 2 paths of mode selection signals and at least 1 path of control signals;
the mode detection module (100) outputs a mode control signal according to the level of the control signal and the level or frequency of the mode selection signal;
and the MCU enters different starting modes according to the mode control signal.
8. The MCU startup mode control method according to claim 7, wherein the mode detection module (100) receiving at least 2-way mode selection signals and at least 1-way control signal comprises:
the embedded flash memory control module (300) reads eflash NVR preset area data and sends the data to the mode detection module (100);
the mode detection module (100) sends a corresponding instruction to the clock management module (500), the embedded flash memory control module (300) and the reset management module (600) according to the data and the mode selection signal.
9. The MCU startup mode control method according to claim 7, wherein the mode detection module (100) outputs a mode control signal according to the level of a control signal and the level or frequency of a mode selection signal, comprising:
if the first mode selection signal is a low level signal, outputting a control signal for controlling the MCU to enter a normal starting working mode;
and if the first control signal is a high-level signal, judging whether the frequency of the input signal of the third mode selection signal is within a preset range, and if the frequency of the input signal of the third mode selection signal is within the preset range and the second mode selection signal and the third control signal are both high-level signals, outputting a control signal for controlling the MCU to enter a special erasing and writing working mode.
10. An MCU comprising an MCU mode control circuit as defined in any one of claims 1 to 6, said MCU upon start-up entering a corresponding start-up mode according to the MCU start-up mode control method as defined in any one of claims 7 to 9.
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Citations (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2261693Y (en) * | 1996-09-05 | 1997-09-03 | 陈仪坤 | Code remote controlling transmitting/receiving apparatus for frequency modulation radio |
| CN1205788A (en) * | 1995-12-21 | 1999-01-20 | 艾利森电话股份有限公司 | Method for setting operating mode of an integrated circuit and integrated circuit |
| CN102323538A (en) * | 2011-07-08 | 2012-01-18 | 哈尔滨工业大学 | Design method of scanning unit based on partial scanning of improved test vector set |
| TW201212496A (en) * | 2010-09-01 | 2012-03-16 | Monolithic Power Systems Inc | Switching mode power supply with burst mode operation |
| CN103955157A (en) * | 2014-05-19 | 2014-07-30 | 江苏万邦微电子有限公司 | T/R module debugging instrument combination pulse generation method and control method |
| CN204488693U (en) * | 2015-03-18 | 2015-07-22 | 深圳市比利科技有限公司 | A kind of car emergency with distress signal lamp and color lamp starts power supply |
| US20160086920A1 (en) * | 2014-09-22 | 2016-03-24 | SK Hynix Inc. | Semiconductor devices and semiconductor systems including the same |
| CN107271879A (en) * | 2017-05-31 | 2017-10-20 | 上海华力微电子有限公司 | Semiconductor chip ageing tester and method |
| CN108132903A (en) * | 2018-01-19 | 2018-06-08 | 杭州士兰微电子股份有限公司 | Universal input/output interface circuit and its control method |
| CN207491274U (en) * | 2017-12-12 | 2018-06-12 | 深圳市创芯微微电子有限公司 | A kind of solar energy outdoor LED lamp power management chip |
| CN108255097A (en) * | 2017-12-08 | 2018-07-06 | 浙江大学 | Pulse triggers lock/unlock virtual protection circuit and implementation method |
| CN109696246A (en) * | 2018-12-05 | 2019-04-30 | 中国美术学院 | Digitize color management system |
| CN112198865A (en) * | 2020-09-29 | 2021-01-08 | 中电海康无锡科技有限公司 | Testing method, device and system for MCU low-power mode switching |
| CN214335506U (en) * | 2021-01-26 | 2021-10-01 | 广州巨晟微电子股份有限公司 | MCU mode control circuit and MCU |
-
2021
- 2021-01-26 CN CN202110101672.1A patent/CN112882422B/en active Active
Patent Citations (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1205788A (en) * | 1995-12-21 | 1999-01-20 | 艾利森电话股份有限公司 | Method for setting operating mode of an integrated circuit and integrated circuit |
| CN2261693Y (en) * | 1996-09-05 | 1997-09-03 | 陈仪坤 | Code remote controlling transmitting/receiving apparatus for frequency modulation radio |
| TW201212496A (en) * | 2010-09-01 | 2012-03-16 | Monolithic Power Systems Inc | Switching mode power supply with burst mode operation |
| CN102323538A (en) * | 2011-07-08 | 2012-01-18 | 哈尔滨工业大学 | Design method of scanning unit based on partial scanning of improved test vector set |
| CN103955157A (en) * | 2014-05-19 | 2014-07-30 | 江苏万邦微电子有限公司 | T/R module debugging instrument combination pulse generation method and control method |
| US20160086920A1 (en) * | 2014-09-22 | 2016-03-24 | SK Hynix Inc. | Semiconductor devices and semiconductor systems including the same |
| CN204488693U (en) * | 2015-03-18 | 2015-07-22 | 深圳市比利科技有限公司 | A kind of car emergency with distress signal lamp and color lamp starts power supply |
| CN107271879A (en) * | 2017-05-31 | 2017-10-20 | 上海华力微电子有限公司 | Semiconductor chip ageing tester and method |
| CN108255097A (en) * | 2017-12-08 | 2018-07-06 | 浙江大学 | Pulse triggers lock/unlock virtual protection circuit and implementation method |
| CN207491274U (en) * | 2017-12-12 | 2018-06-12 | 深圳市创芯微微电子有限公司 | A kind of solar energy outdoor LED lamp power management chip |
| CN108132903A (en) * | 2018-01-19 | 2018-06-08 | 杭州士兰微电子股份有限公司 | Universal input/output interface circuit and its control method |
| CN109696246A (en) * | 2018-12-05 | 2019-04-30 | 中国美术学院 | Digitize color management system |
| CN112198865A (en) * | 2020-09-29 | 2021-01-08 | 中电海康无锡科技有限公司 | Testing method, device and system for MCU low-power mode switching |
| CN214335506U (en) * | 2021-01-26 | 2021-10-01 | 广州巨晟微电子股份有限公司 | MCU mode control circuit and MCU |
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|---|---|
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