CN103955157A - T/R module debugging instrument combination pulse generation method and control method - Google Patents
T/R module debugging instrument combination pulse generation method and control method Download PDFInfo
- Publication number
- CN103955157A CN103955157A CN201410210198.6A CN201410210198A CN103955157A CN 103955157 A CN103955157 A CN 103955157A CN 201410210198 A CN201410210198 A CN 201410210198A CN 103955157 A CN103955157 A CN 103955157A
- Authority
- CN
- China
- Prior art keywords
- signal
- module
- low
- voltage differential
- assembly
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Tests Of Electronic Circuits (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
The invention discloses a T/R module debugging instrument combination pulse generation method and a control method. According to the T/R module debugging instrument combination pulse generation method and control method, a sequential control module and a man-machine interaction module are arranged; combination pulses needed for T/R module tests can be generated, parameters required by generation of the combination pulses needed for the T/R module tests can be input through a panel of the man-machine interaction module, the combination pulses needed for the different T/R module tests can be obtained; besides, corresponding enhancement/attenuation processing is conducted on a T_R signal, a T signal and an R signal of the combination pulses according to required signal statuses in a transmitting and receiving state when the T/R module tests are conducted, and therefore requirements of the T/R module tests can be met; meanwhile, an LVDS differential circuit is arranged, smoothing can be conducted on a sequence signal under a high frequency through conversion of the LVDS differential circuit, and therefore the performance of a T/R module under the high frequency can be tested.
Description
Technical field
The invention belongs to wireless communication technology field, be specifically related to a kind of TR assembly debugging instrument assembled pulse method for generation and control method.
Background technology
Microwave regime, will have circuit that sending and receiving microwave signal enlarging function and some circuit functions correspondingly combine referred to as T/R assembly.
Typical phased-array radar is that its each aerial radiation array element is the Active Phased Array composition with a receiver and emission function amplifier with the transmitting and receiving of phase shifter control antenna wave beam.
Elder generation that the front of Active Phased Array Radar consists of a large amount of T/R assemblies, antenna element and passive feeder system, general forms submatrix by several T/R assemblies, by submatrix, by beam forming network, form received beam again, by receiver, carry out frequency transformation again, be treated to digital signal, finally by signal, process the object that reaches measurement target with data processing.
T/R assembly is being born the main power amplification transmitting, the preposition amplification of low noise that receives feeble signal, wave beam formation and is being scanned the required functions such as width phase control, and its performance direct mark the level of whole radar.A radar has hundreds of or thousands of T/R assemblies conventionally, form a complete active phased array antenna battle array, it accounts for 60% left and right of whole radar cost, becomes the determinative of Active Phased Array Radar, and the development to Active Phased Array Radar is exerted far reaching influence.
T/R assembly is miniaturization and the modular high-power assembly of abiding by the law based on microblogging monolithic integrated optical circuit (MMIC) technology and micro-packaging technology, and not only the electric circuit constitute, manufacturing process are complicated, and functional part is more.
From the electric circuit constitute and the function thereof of T/R assembly, the parameter that T/R assembly need to be measured mainly comprises: transmitting output power, transmitting standing wave, transmitting phase shifting accuracy, transmitter, phase noise, transmitting harmonic wave, transmit scattering, receiving gain, reception phase shifting accuracy, receiving attenuation precision, receive amplitude-phase consistency, receive noise figure, receive third order intermodulation, receive harmonic wave, receive spuious, switching time etc.
T/R assembly is the most key parts of active phased array array antenna, whichever frequency band, the phased-array radar of which kind of purposes, after antenna radiation unit, be all connected to a solid-state T/R assembly, T/R assembly is equivalent to the radio-frequency front-end of phased array radar system, to comprise microwave, low frequency, large-signal, small-signal, the Complex Electronic Systems Based that digital and analog circuit is integrated.An advanced phased-array radar is more to the technical requirement of T/R assembly, needs the use test system technical feature parameter of accurate test T/R assembly comprehensively.
The testing meter and instrument that T/R module testing need to be used has Pulse vector network analyzer, microwave signal source, spectrum analyzer, oscillograph, pulse power meter, noise factor meter, programmable power supply, measured piece control circuit etc., these existing T/R module testing instruments cannot will be realized sequencing, the robotization of testing process, the collection of test data and analysis automated, also the overshoot that cannot produce at T/R assembly in enormous quantities, realizes T/R assembly automatic test fast and accurately.
The examination of T/R assembly timing needs timing control signal and assembled pulse, existing adjusting instrument can only be exported fixing timing control signal and assembled pulse T_R signal, T signal and R signal, and can only debug for the fixing T/R assembly of model, because T_R signal, the frequency of T signal and these three signals of R signal and cycle are determined, so if the model of T/R assembly is inconsistent, cannot on same debugging instrument, test, there is the situation that test difficulty maybe cannot be tested, the assembled pulse T_R signal that existing T/R assembly adjusting instrument is exported simultaneously, T signal and R signal, cannot debug needed state according to T/R assembly changes, existing T/R assembly debugging instrument can not be tested T/R assembly under high-frequency simultaneously, can only in low frequency ranges, test, this just cannot guarantee that whether T/R assembly performance under high frequency when application is stable, this is that current T/R module testing field urgently needs the problem solving.
Summary of the invention
Technical matters to be solved by this invention is: for the defect of prior art, a kind of TR assembly debugging instrument assembled pulse method for generation and control method are provided, be provided with time-sequence control module and human-computer interaction module, not only can produce T/R assembly and debug needed pulse combined signal, and can generate desired parameter by the needed pulse combined signal of panel input T/R module testing of human-computer interaction module, just can obtain the needed pulse combined signal of different T/R module testings, in the time of can also be according to T/R module testing, transmit and receive needed signal condition paired pulses composite signal T_R signal under state, T signal and R signal carry out corresponding setting high and set low processing, to meet the needs of T/R module testing, be provided with LVDS difference channel simultaneously, can pass through the conversion of LVDS difference channel, clock signal under high frequency is carried out to smoothing processing, make T/R assembly can test the performance under high frequency.
The present invention is for solving the problems of the technologies described above by the following technical solutions:
A kind of TR assembly debugging instrument assembled pulse method for generation and control method, TR assembly debugging instrument comprises main control module, time-sequence control module and human-computer interaction module, main control module is connected with human-computer interaction module with time-sequence control module respectively, main control module comprises single-chip microcomputer, time-sequence control module comprises FPGA and crystal oscillator, human-computer interaction module comprises instrument front plate and interactive interface, and instrument front plate is provided with functional select switch, and functional select switch is connected with single-chip microcomputer;
Assembled pulse method for generation:
Crystal oscillator produces the periodic signal of fixed frequency, the low and high level counting of FPGA to period frequency signal, by human-computer interaction module, input and calculate the needed frequency of pulse signal, dutycycle and t1, t2, the value of t3 and t4, main control module receives the needed frequency of calculating pulse signal of input, dutycycle and t1, t2, the value of t3 and t4, and will calculate the needed frequency of pulse signal, dutycycle and t1, t2, the value of t3 and t4 sends to FPGA, FPGA calculates T_R signal according to the frequency and the dutycycle that obtain, FGPA according to gained T_R signal rising edge and negative edge, and according to t1, t2, the value of t3 and t4 calculates T signal and R signal,
The rising edge of T signal is than the time of the rise edge delay t2 of T_R signal, the negative edge of T signal is along shifting to an earlier date the time of t3 than the negative edge of T_R signal, the negative edge of R signal shifts to an earlier date the time of t1 than the rising edge of T_R signal, and the rising edge of R signal postpones the time of t4 than the negative edge of T_R signal;
Assembled pulse control method:
By functional select switch, select the operational module of T/R assembly: emission mode or receiver module, when functional select switch is selected emission mode, after the enabling signal of single-chip microcomputer receiving function selector switch, and send assembled pulse enabling signal to FPGA, FPGA receives after the assembled pulse enabling signal of single-chip microcomputer transmission, output T/R assembled pulse, the frequency of the T/R assembled pulse of output and the cycle frequency by the dutycycle of inputting and setting determines, during functional select switch selective reception pattern, after the signal of single-chip microcomputer receiving function selector switch, and to FPGA transmitted signal, FPGA receives after the signal of single-chip microcomputer transmission, T_R signal and T signal are set low, the output of R signal logic, R signal sets high, set low two states.
As further prioritization scheme of the present invention, the FPGA of described time-sequence control module also produces timing control signal, and timing control signal comprises CLK signal, DATA signal, SEL signal, DARY signal, IR signal.
As further prioritization scheme of the present invention, described timing control signal is when carrying out high-frequency test, and timing control signal is inputted T/R assembly after Low Voltage Differential Signal processing circuit processes.
As further prioritization scheme of the present invention, described Low Voltage Differential Signal treatment circuit comprises LVDS screen line, the first low-voltage differential signal transmission chip and the second low-voltage differential signal transmission chip, LVDS screen line one end is connected with the clock signal output port of T/R assembly debugging instrument, the other end of LVDS screen line is connected with the signal input part of the first low-voltage differential signal transmission chip, and the signal output part of described the first low-voltage differential signal transmission chip is connected with the signal input part of the second low-voltage differential signal transmission chip.
As further prioritization scheme of the present invention, the first low-voltage differential signal transmission chip that described Low Voltage Differential Signal treatment circuit adopts and the model of the second low-voltage differential signal transmission chip are respectively as SN65LVDS389 and SN65LVDS388A.
The present invention adopts above technical scheme compared with prior art, has following technique effect:
The first, be provided with time-sequence control module and human-computer interaction module, not only can produce T/R assembly and debug needed pulse combined signal, and can generate desired parameter by the needed pulse combined signal of panel input T/R module testing of human-computer interaction module, just can obtain the needed pulse combined signal of different T/R module testings;
During the second, according to T/R module testing, transmit and receive needed signal condition paired pulses composite signal T_R signal, T signal and R signal under state and carry out corresponding setting high and set low processing, to meet the needs of T/R module testing;
Three, be provided with LVDS difference channel, can pass through the conversion of LVDS difference channel, the clock signal under high frequency is carried out to smoothing processing, make T/R assembly can test the performance under high frequency.
Accompanying drawing explanation
Fig. 1, pulse waveform schematic diagram of the present invention.
Embodiment
Below in conjunction with accompanying drawing, technical scheme of the present invention is described in further detail:
The present invention discloses a kind of TR assembly debugging instrument assembled pulse method for generation and control method, TR assembly debugging instrument comprises main control module, time-sequence control module and human-computer interaction module, main control module is connected with human-computer interaction module with time-sequence control module respectively, main control module comprises single-chip microcomputer, time-sequence control module comprises FPGA and crystal oscillator, human-computer interaction module comprises instrument front plate and interactive interface, and instrument front plate is provided with functional select switch, and functional select switch is connected with single-chip microcomputer.
Single-chip microcomputer is connected with the functional select switch in instrument front plate with FPGA respectively, the instruction of single-chip microcomputer by receiving function selector switch judges and makes corresponding action, the parameter of the generation assembled pulse that the user of single-chip microcomputer reception simultaneously inputs by interactive interface, and the parameter of gained is sent to FPGA, by controlling FPGA, produce the needed assembled pulse of user, in addition, FPGA also can produce timing control signal CLK signal, DATA signal, SEL signal, DARY signal, IR signal.
Assembled pulse method for generation:
Crystal oscillator produces the periodic signal of fixed frequency, the low and high level counting of FPGA to period frequency signal, the needed frequency of calculating pulse signal of inputting by human-computer interaction module, dutycycle and t1, t2, the value of t3 and t4, main control module receives the needed frequency of calculating pulse signal of input, dutycycle and t1, t2, the value of t3 and t4, and will calculate the needed frequency of pulse signal, dutycycle and t1, t2, the value of t3 and t4 sends to FPGA, FPGA is according to the frequency and dutycycle and the counting to crystal oscillator signal low and high level that obtain, draw the waveform of T_R signal, FGPA according to gained T_R signal waveform rising edge and negative edge, and according to t1, t2, the value of t3 and t4 calculates T signal and R signal,
Concrete computing method as shown in Figure 1, the rising edge of T signal is than the time of the rise edge delay t2 of T_R signal, the negative edge of T signal is along shifting to an earlier date the time of t3 than the negative edge of T_R signal, the negative edge of R signal shifts to an earlier date the time of t1 than the rising edge of T_R signal, and the rising edge of R signal postpones the time of t4 than the negative edge of T_R signal;
Assembled pulse control method:
By functional select switch, select the operational module of T/R assembly: emission mode or receiver module, when functional select switch is selected emission mode, after the enabling signal of single-chip microcomputer receiving function selector switch, single-chip microcomputer sends assembled pulse enabling signal to FPGA, FPGA receives after the assembled pulse enabling signal of single-chip microcomputer transmission, output T/R assembled pulse, the frequency of the T/R assembled pulse of output and the cycle frequency by the dutycycle of inputting and setting determines, during functional select switch selective reception pattern, after the signal of single-chip microcomputer receiving function selector switch, and to FPGA transmitted signal, FPGA receives after the signal of single-chip microcomputer transmission, T_R signal and T signal are set low, the output of R signal logic, R signal sets high, set low two states.
When user need to debug by T/R assembly debugging instrument the T/R assembly of different model, can debug needed assembled pulse characteristic according to the T/R assembly of this model, by interactive interface input, draw the value of frequency, dutycycle and t1, t2, t3 and t4 that the T/R assembly with this model adapts.The assembled pulse method for generation of this T/R assembly debugging instrument makes T/R assembly debugging instrument applicable to the debugging of multiple different T/R assembly, do not need artificial calculating and change, only need input to calculate the parameter needing and can show that T/R assembly to be tested debugs assembled pulse waveform used, the method for generation of this assembled pulse makes the scope of application of T/R assembly debugging instrument more extensive, having broken away from T/R assembly debugging instrument in the past, only for the simple function that fixedly the T/R assembly of model is debugged, can be different T/R assemblies debug function is more easily provided.
Crystal oscillator produces pulse signal, and the low and high level counting of FPGA to crystal oscillator signal, calculates pulse number and pulse number corresponding to high level in the cycle according to frequency and the dutycycle of user's input.
As further prioritization scheme of the present invention, the FPGA of described time-sequence control module also produces timing control signal, and timing control signal comprises CLK signal, DATA signal, SEL signal, DARY signal, IR signal.
As further prioritization scheme of the present invention, described timing control signal is when carrying out high-frequency test, and timing control signal is inputted T/R assembly after Low Voltage Differential Signal processing circuit processes.
Existing T/R assembly debugging instrument all can only be debugged T/R assembly under low frequency, because when test frequency is too high, easily there is the situation of distortion in timing control signal, can not test accurately the performance of T/R assembly, in this T/R assembly debugging instrument, added Low Voltage Differential Signal treatment circuit, timing control signal is carried out to Low Voltage Differential Signal processing, timing control signal after processing, low-voltage differential is drawn to comparatively level and smooth timing control signal, the method is not only for T/R assembly provides the debug function under high-frequency, also guaranteed the stable of the lower timing control signal of high-frequency debugging, make the debugging of T/R assembly more accurate, the performance of each working frequency range can be detected, while having guaranteed that T/R component application is on radar antenna, performance is more stable, more reliable.
As further prioritization scheme of the present invention, described Low Voltage Differential Signal treatment circuit comprises LVDS screen line, the first low-voltage differential signal transmission chip and the second low-voltage differential signal transmission chip, LVDS screen line one end is connected with the clock signal output port of T/R assembly debugging instrument, the other end of LVDS screen line is connected with the signal input part of the first low-voltage differential signal transmission chip, and the signal output part of described the first low-voltage differential signal transmission chip is connected with the signal input part of the second low-voltage differential signal transmission chip.
Timing control signal CLK signal, DATA signal, SEL signal, DARY signal, IR signal, when entering the first low-voltage differential signal transmission chip, each signal is become two-way by difference, then the two paths of signals being divided into is again by the synthetic road of the second low-voltage differential signal transmission chip, and processing procedure is as follows:
Timing control signal is after the first low-voltage differential signal transmission chip, and signal changes through following, and IN represents any one in the clock signal CLK signal, DATA signal, SEL signal, DARY signal, IR signal of input:
IN=IN+?-?IN-
Circuit transmission is disturbed and is present on differential pair simultaneously, supposes to disturb for q, and the signal of being exported by the first low-voltage differential signal transmission chip enters the second low-voltage differential signal transmission chip and processes through following:
(IN+?+?q)-(IN-?+?q)=IN+?-?IN-=OUT
So:
OUT=IN
Noise is restrained to fall.
Timing control signal is after low-voltage differential is processed, noise in timing control signal is suppressed to be fallen, and makes the debugging of T/R assembly more accurate, processes through low-voltage differential simultaneously, not only can reduce the noise in timing control signal, and reduce the power consumption of signal transmission.
As further prioritization scheme of the present invention, the first low-voltage differential signal transmission chip that described Low Voltage Differential Signal treatment circuit adopts and the model of the second low-voltage differential signal transmission chip are respectively as SN65LVDS389 and SN65LVDS388A.Low-voltage differential signal transmission chip SN65LVDS389 and SN65LVDS388A have excellent signal handling property, in the process of processing at signal, can not introduce other noise, in the time of simultaneously by squelch in signal, effectively reduce the power consumption of signal transmission, Low Voltage Differential Signal treatment circuit is introduced to the test frequency that T/R assembly debugging instrument can effectively improve T/R assembly debugging instrument, increased outside the function of T/R assembly debugging instrument, also the debugging for T/R assembly provides wider debugging frequency range, the performance of T/R assembly is debugged more fully, function and the performance of T/R assembly have been guaranteed.
The present invention is provided with time-sequence control module and human-computer interaction module, not only can produce T/R assembly and debug needed pulse combined signal, and can generate desired parameter by the needed pulse combined signal of panel input T/R module testing of human-computer interaction module, just can obtain the needed pulse combined signal of different T/R module testings, in the time of can also be according to T/R module testing, transmit and receive needed signal condition paired pulses composite signal T_R signal under state, T signal and R signal carry out corresponding setting high and set low processing, to meet the needs of T/R module testing, be provided with LVDS difference channel simultaneously, can pass through the conversion of LVDS difference channel, clock signal under high frequency is carried out to smoothing processing, make T/R assembly can test the performance under high frequency.
By reference to the accompanying drawings embodiments of the present invention are explained in detail above, but the present invention is not limited to above-mentioned embodiment, in the ken possessing those of ordinary skills, can also under the prerequisite that does not depart from aim of the present invention, makes a variety of changes.
Above embodiment only, for explanation technological thought of the present invention, can not limit protection scope of the present invention with this.Every technological thought proposing according to the present invention, and any change of doing on technical scheme basis, within all falling into protection domain of the present invention.
Claims (5)
1. a TR assembly debugging instrument assembled pulse method for generation and control method, it is characterized in that: TR assembly debugging instrument comprises main control module, time-sequence control module and human-computer interaction module, main control module is connected with human-computer interaction module with time-sequence control module respectively, main control module comprises single-chip microcomputer, time-sequence control module comprises FPGA and crystal oscillator, human-computer interaction module comprises instrument front plate and interactive interface, and instrument front plate is provided with functional select switch, and functional select switch is connected with single-chip microcomputer;
Assembled pulse method for generation:
Crystal oscillator produces the periodic signal of fixed frequency, the low and high level counting of FPGA to period frequency signal, by human-computer interaction module, input and calculate the needed frequency of pulse signal, dutycycle and t1, t2, the value of t3 and t4, main control module receives the needed frequency of calculating pulse signal of input, dutycycle and t1, t2, the value of t3 and t4, and will calculate the needed frequency of pulse signal, dutycycle and t1, t2, the value of t3 and t4 sends to FPGA, FPGA calculates T_R signal according to the frequency and the dutycycle that obtain, FGPA according to gained T_R signal rising edge and negative edge, and according to t1, t2, the value of t3 and t4 calculates T signal and R signal,
The rising edge of T signal is than the time of the rise edge delay t2 of T_R signal, the negative edge of T signal is along shifting to an earlier date the time of t3 than the negative edge of T_R signal, the negative edge of R signal shifts to an earlier date the time of t1 than the rising edge of T_R signal, and the rising edge of R signal postpones the time of t4 than the negative edge of T_R signal;
Assembled pulse signal control method:
By functional select switch, select the operational module of T/R assembly: emission mode or receiver module, when functional select switch is selected emission mode, after the enabling signal of single-chip microcomputer receiving function selector switch, and send the order of assembled pulse signal enabling to FPGA, FPGA receives after the assembled pulse signal enabling order of single-chip microcomputer transmission, output T/R assembled pulse signal, the frequency of the T/R assembled pulse signal of output and the cycle frequency by the dutycycle of inputting and setting determines, during functional select switch selective reception pattern, after the signal of single-chip microcomputer receiving function selector switch, and to FPGA transmitted signal, FPGA receives after the signal of single-chip microcomputer transmission, T_R signal and T signal are set low, the output of R signal logic, R signal sets high, set low two states.
2. a kind of TR assembly debugging instrument assembled pulse signal generating method as claimed in claim 1 and control method, it is characterized in that: the FPGA of described time-sequence control module also produces timing control signal, timing control signal comprises CLK signal, DATA signal, SEL signal, DARY signal, IR signal.
3. a kind of TR assembly debugging instrument assembled pulse signal generating method as claimed in claim 2 and control method, it is characterized in that: described timing control signal is when carrying out high-frequency test, and timing control signal is inputted T/R assembly after Low Voltage Differential Signal processing circuit processes.
4. a kind of TR assembly debugging instrument assembled pulse signal generating method as claimed in claim 3 and control method, it is characterized in that: described Low Voltage Differential Signal treatment circuit comprises LVDS screen line, the first low-voltage differential signal transmission chip and the second low-voltage differential signal transmission chip, LVDS screen line one end is connected with the clock signal output port of T/R assembly debugging instrument, the other end of LVDS screen line is connected with the signal input part of the first low-voltage differential signal transmission chip, the signal output part of described the first low-voltage differential signal transmission chip is connected with the signal input part of the second low-voltage differential signal transmission chip.
5. a kind of TR assembly debugging instrument assembled pulse signal generating method as claimed in claim 1 and control method, is characterized in that: the first low-voltage differential signal transmission chip that described Low Voltage Differential Signal treatment circuit adopts and the model of the second low-voltage differential signal transmission chip are respectively as SN65LVDS389 and SN65LVDS388A.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410210198.6A CN103955157B (en) | 2014-05-19 | 2014-05-19 | A kind of TR assembly debugging instrument assembled pulse method for generation and control method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410210198.6A CN103955157B (en) | 2014-05-19 | 2014-05-19 | A kind of TR assembly debugging instrument assembled pulse method for generation and control method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103955157A true CN103955157A (en) | 2014-07-30 |
| CN103955157B CN103955157B (en) | 2016-10-05 |
Family
ID=51332442
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410210198.6A Active CN103955157B (en) | 2014-05-19 | 2014-05-19 | A kind of TR assembly debugging instrument assembled pulse method for generation and control method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN103955157B (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105429714A (en) * | 2015-11-03 | 2016-03-23 | 中国电子科技集团公司第四十一研究所 | T/R assembly tester and security verification method thereof |
| CN105553431A (en) * | 2016-02-03 | 2016-05-04 | 中国电子科技集团公司第三十八研究所 | Control circuit and control method for delayed amplification component |
| CN106020018A (en) * | 2016-05-17 | 2016-10-12 | 中国电子科技集团公司第四十研究所 | USB-based TR assembly programmable state controller and working method thereof |
| CN106405270A (en) * | 2016-08-22 | 2017-02-15 | 中国电子科技集团公司第四十研究所 | Transmitting/receiving switching control signal generation and device supporting multi-T/R assembly test |
| CN112882422A (en) * | 2021-01-26 | 2021-06-01 | 广州巨晟微电子股份有限公司 | MCU mode control circuit, control method and MCU |
| CN115267685A (en) * | 2022-09-23 | 2022-11-01 | 江苏万邦微电子有限公司 | Built-in microwave signal state data readback TR component wave control module |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02221879A (en) * | 1989-02-23 | 1990-09-04 | Nec Corp | Circuit for detecting deterioration of light source |
| JPH03163613A (en) * | 1989-11-21 | 1991-07-15 | Seiko Epson Corp | Generating method for constant-current pulse |
| JP2011196704A (en) * | 2010-03-17 | 2011-10-06 | Fujitsu Semiconductor Ltd | Semiconductor device |
| CN102282781A (en) * | 2009-01-14 | 2011-12-14 | Lg电子株式会社 | Signal transmission method using mbsfn subframe in radio communication system |
| CN202282781U (en) * | 2011-11-01 | 2012-06-20 | 南京鑫轩电子系统工程有限公司 | TR assembly automatic test system |
| CN202523847U (en) * | 2011-11-17 | 2012-11-07 | 南京鑫轩电子系统工程有限公司 | TR assembly detection and control system |
| CN203241534U (en) * | 2013-03-01 | 2013-10-16 | 北京经纬恒润科技有限公司 | A TR assembly automatic testing system |
-
2014
- 2014-05-19 CN CN201410210198.6A patent/CN103955157B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02221879A (en) * | 1989-02-23 | 1990-09-04 | Nec Corp | Circuit for detecting deterioration of light source |
| JPH03163613A (en) * | 1989-11-21 | 1991-07-15 | Seiko Epson Corp | Generating method for constant-current pulse |
| CN102282781A (en) * | 2009-01-14 | 2011-12-14 | Lg电子株式会社 | Signal transmission method using mbsfn subframe in radio communication system |
| JP2011196704A (en) * | 2010-03-17 | 2011-10-06 | Fujitsu Semiconductor Ltd | Semiconductor device |
| CN202282781U (en) * | 2011-11-01 | 2012-06-20 | 南京鑫轩电子系统工程有限公司 | TR assembly automatic test system |
| CN202523847U (en) * | 2011-11-17 | 2012-11-07 | 南京鑫轩电子系统工程有限公司 | TR assembly detection and control system |
| CN203241534U (en) * | 2013-03-01 | 2013-10-16 | 北京经纬恒润科技有限公司 | A TR assembly automatic testing system |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105429714A (en) * | 2015-11-03 | 2016-03-23 | 中国电子科技集团公司第四十一研究所 | T/R assembly tester and security verification method thereof |
| CN105553431A (en) * | 2016-02-03 | 2016-05-04 | 中国电子科技集团公司第三十八研究所 | Control circuit and control method for delayed amplification component |
| CN105553431B (en) * | 2016-02-03 | 2018-07-31 | 中国电子科技集团公司第三十八研究所 | A kind of delay amplifier module control circuit and control method |
| CN106020018A (en) * | 2016-05-17 | 2016-10-12 | 中国电子科技集团公司第四十研究所 | USB-based TR assembly programmable state controller and working method thereof |
| CN106020018B (en) * | 2016-05-17 | 2019-01-04 | 中国电子科技集团公司第四十一研究所 | TR component programmable state controller and working method based on USB |
| CN106405270A (en) * | 2016-08-22 | 2017-02-15 | 中国电子科技集团公司第四十研究所 | Transmitting/receiving switching control signal generation and device supporting multi-T/R assembly test |
| CN106405270B (en) * | 2016-08-22 | 2018-10-19 | 中国电子科技集团公司第四十一研究所 | Support the transceiving switch-over control signal production method and device of more T/R module testings |
| CN112882422A (en) * | 2021-01-26 | 2021-06-01 | 广州巨晟微电子股份有限公司 | MCU mode control circuit, control method and MCU |
| CN112882422B (en) * | 2021-01-26 | 2024-05-28 | 广州巨晟微电子股份有限公司 | MCU mode control circuit, control method and MCU |
| CN115267685A (en) * | 2022-09-23 | 2022-11-01 | 江苏万邦微电子有限公司 | Built-in microwave signal state data readback TR component wave control module |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103955157B (en) | 2016-10-05 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103955157A (en) | T/R module debugging instrument combination pulse generation method and control method | |
| CN108872955B (en) | Radar echo signal simulation method and system | |
| CN105548978B (en) | A kind of phased array antenna active refelction coefficient test system and method | |
| CN109164447B (en) | Electromagnetic spectrum reconnaissance device of L-band low-altitude monitoring radar | |
| CN105259544B (en) | Connectors for Active Phased Array Radar T/R component width phase test systems | |
| CN111183741B (en) | Broadband radar target simulation method and system | |
| CN109709474B (en) | Radio frequency mixed signal integrated circuit test system and test method | |
| CN102565768B (en) | Radio altitude signal simulator assembly based on surface acoustic wave delay lines | |
| CN104993887B (en) | Integrated pulse condition noise coefficient method of testing and tester | |
| CN109975772B (en) | Multi-system radar interference performance detection system | |
| CN103116170B (en) | Indoor testing system of antenna array based interference rejection module of global navigation satellite system (GNSS) | |
| CN103592637A (en) | Method and device for testing digital array module transmitting channel phase congruency | |
| CN105190324A (en) | Vector network power meter | |
| CN109343014B (en) | Apparatus and method for testing T/R component of phased array radar | |
| CN113009438A (en) | Emission type radio frequency injection type broadband multi-target simulator | |
| CN109406888A (en) | A kind of active phase array antenna transmitting pattern test method and system | |
| CN108983173A (en) | Digital tr component receives board synchronous test system | |
| CN104901753B (en) | The amplitude-phase ratio method of testing and device of the homologous radiofrequency signal of two-way | |
| CN203775191U (en) | Ultrahigh-frequency broadband correction signal source | |
| CN109782237B (en) | Radar simulated echo and interference signal measuring device | |
| CN115793508A (en) | Full-flow 16-bit interference simulation method based on FPGA | |
| CN203012130U (en) | Superspeed sampling rate acquisition apparatus | |
| CN107918070B (en) | Digital T/R assembly test system and transmitting and receiving state test method thereof | |
| CN107561431B (en) | Efficient test method for debugging circuit of modularized oscilloscope simulation channel | |
| CN117169825B (en) | Interference signal generation method, device and system and storage medium |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |