TW201212496A - Switching mode power supply with burst mode operation - Google Patents

Switching mode power supply with burst mode operation Download PDF

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TW201212496A
TW201212496A TW99129547A TW99129547A TW201212496A TW 201212496 A TW201212496 A TW 201212496A TW 99129547 A TW99129547 A TW 99129547A TW 99129547 A TW99129547 A TW 99129547A TW 201212496 A TW201212496 A TW 201212496A
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signal
power supply
switching power
frequency
control
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TW99129547A
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Chinese (zh)
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TWI413350B (en
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Yang Shi
Jun-Ming Zhang
Yuang-Cheng Ren
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Monolithic Power Systems Inc
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Abstract

This invention discloses a control method and device of switch mode power supply (SMPS). When SMPS works on light load, a high frequency pulse signal is modulated by a low frequency modulation signal and switch driver signal is generated, thus, during signal modulation cycle, the switch is driven by a series of high frequency pulses or maintain off status to realize close loop regulation of SMPS output.

Description

201212496 六、發明說明: 【發明所屬之技術領域】 [0001] 本發明涉及一種在輕載狀態下能進入biir<5+ J , n ~ rst~m〇de (間歇 模式)的開關電源,尤其涉及該開關電源的間歇模式押 制電路。 [0002]201212496 VI. Description of the Invention: [Technical Field] [0001] The present invention relates to a switching power supply capable of entering biir<5+J, n~rst~m〇de (intermittent mode) under light load conditions, and more particularly The intermittent mode of the switching power supply is erected. [0002]

D 〇 099129547 【先前技術】 今天’越來越多的電子產品利用開關電源供電,這源於 開關電源本身所具有的良好特性。開關電― -般在幾十千赫兹以上,利用半導體器件的導通、關閉 來傳遞能量,因此具有體積小、重量輕、轉換效率高: 優點。 為了實現能量轉換,開關電源可以採用多種抬撲結構 以應用廣泛的flyback (反激式)拓撲钍 構為例,對開關 電源原理做一描述。總體上,其可以八炎 .θ 刀馬以下功能模組 •"里輸入單元、能量福合單元、能量輪出單元、回饋 I疋及關控制單心交流電壓鄉能量I單元,經 整流濾波作用得到板為平滑的直,流電 ^ 至開關控制單元 根據回饋單元的回饋信號控制開關的導通、, 直流電壓轉換為高頻信號,再經變 止將該 -穩定的直流電壓輸出。 Μ合’最终得到 =正常Μ情況’電子產品還會卫作在輕載顿機狀 “統稱為輕載狀態)。在輕載 並 , ^負栽需要電源提 刀年後小’如果控制單元仍 原頻率驅動開關管, 、頻率很向,相應的開關管開關損耗變得顯著起來, 效^ 了轉換效率。為此’可轉料躺方式。單純從 表里说^度出發’輕載狀態要求開關頻率低於20KHZ,頻率 表單編號八_ ^ 3 1/* 27 ! 0993444896-0 201212496 落入曰頻乾圍’這又會引起雜訊問題。 針對4問題’更為f遍的做法是採用間歇模式。所謂間 歇板式’即控制開關在一段時間内(設時長為M〇n)被高 頻脈衝信號驅動,在相鄰的另_段時間(設時長為 )内保持為截止狀態’這兩種狀態迴圈交替。這樣,等 效開關頻率降低’可以有效地改善效率。但現有技術中 ,所述時長M〇n和Moff根據負載的功率需求情況自動調節 ,這就造成了 Mon和M〇ff的不衫(即對高頻脈衝信號進 订調製的調製信號頻率不嫁定),這種不確定性同樣會 引入雜訊問題。 . . . . . 【發明内容】 [0003] 本發明所要解決的技術問題是開關電源在輕載或待機& 慼下,現有技術中間歇模式存在的因調製信號的頻率根 據負載的功率需求情況自動調節導致調製信號頻率不確 定’進而可能引起雜訊的問題。 為了解決所述技術問題,本發明採用如下技術方案。 依據本發明思想提出的開關電源及其控制電路,當開關 電源進入輕載狀態,控制電感―射1間關電源工作於間歇 模式。所述開關電源工作於間歇模式期間,控制所述開 關導通與截止的高頻脈衝信號、調製高頻脈衝信號的低 頻調製信號兩者的頻率被調節為設定值,通過調節低頻 調製信號的占空比實現對開關電源輸出的閉環控制。 099129547 當開關電源工作於非輕載狀態,控制電路工作於pWM控制 方式、准諧振控制方式、off-time控制方式中的任一種 。對應off-time控制方式,當開關電源工作於非輕載狀 態’開關頻率隨著負載的變輕而降低;當開關電源從非 表單編號A0101 第4頁/共27頁 0993444896-0 201212496 輕載狀態進入輕載狀態,開關頻率連續不突變。 本發明的開關電源包括控制電路,該控制電路包括: 反饋回路,該反饋回路根據負載狀態輸出回饋信號給控 制電路,控制電路比較回饋信號與設定的反映輕載的閾 值信號;根據上述比較結果,控制電路切換開關電源工 作於間歇模式或非輕載狀態下的正常工作模式; 高頻脈衝信號發生器,接收所述回饋信號和電流檢測信 號,輸出高頻脈衝信號; 間歇模式發生器,接收所述回饋信號,輸出控制信號給 高頻脈衝信號發生器,控制其輸出脈衝信號的頻率;間 歇模式發生器還輸出低頻調製信號; 開關電流檢測模組,檢測流過所述開關的電流,輸出電 流檢測信號; 調製電路,接收所述高頻脈衝信號和低頻調製信號,輸 出開關控制信號,以控制所述開關電源的開關。 所述低頻調製信號頻率小於需要排除的頻率範圍的下限 ,所述高頻脈衝信號頻率大於需要排除的頻率範圍的上 限。該需要排除的頻率範圍包括音頻範圍。 本發明進一步提出了一種開關電源的控制方法,當開關 電源的負載為輕載狀態時,所述開關電源工作於間歇模 式。當開關電源工作于間歇模式時,其控制方法還包括 以下步驟: 設定控制所述開關電源中開關導通與截止的高頻脈衝信 號頻率; 設定調制所述高頻脈衝信號的低頻調製信號頻率; 通過調節低頻調製信號的占空比實現對所述開關電源輸 099129547 表單編號A0101 第5頁/共27頁 0993444896-0 201212496 出的閉環控制。 判斷負載為輕載狀態的方法是,比較來自於開關電源輸 出的回饋信號和設定的反映輕載的閾值信號,根據比較 結果,判定負載為所述輕載狀態。 通過採用根據本發明思想所提出的技術方案,在開關電 源在其負载處於輕載狀態時而工作於間歇模式的情況下 ,可以使高頻脈衝信號頻率、低頻調製信號頻率保持在 設定的範圍,從而避開音頻範圍,減少雜訊,較好地解 決所述技術問題。另外,本發明還具有電路結構簡單, 成本低的優點。 【實施方式】 [0004] 第1圖為根據本發明思想的一個具體實施例,該實施例基 於反激拓撲。該發明同樣可以應用於其他開關電源拓撲 ,本實施例以反激拓撲作為說明,只是為了闡述的方便 〇 在該實施例中,電壓輸入信號Vin經過調整,對負載提供 能量。如第1圖所示,首先,電壓輸入信號Vin被耦接到 能量傳輸單元變壓器T1,開關S1在控制信號101作用下, 週期性地導通和關閉,使變壓器T1原邊的能量被耦合到 副邊,再經過二極體D1的整流和電容C1的濾波,最終得 到一恒值信號ϋο,該恒值信號可以為電壓信號Vo,也可 以為電流信號1〇。在本發明的一個具體實施例中,該信 號為一電壓信號Vo。控制電路105的輸入信號一路來自開 關電流檢測信號102,有多種電流檢測手段可以應用,如 通過檢測電流I ,在一電阻上的壓降;另一路來自待調節 信號Uo採樣後並經回饋網路103處理後的回饋信號104, 099129547 表單編號 A0101 第 6 頁/共 27 頁 0993444896-0 控制電路105回應於所述回饋信號104,控制開關S1的導 通和關閉,實現對待調節量Uo的閉環調節。控制電路105 可以為積體電路,也可以由分立器件構成,或者是兩者 的組合。回饋信號104可以是反應負載狀態的任何電信號 ,如可以為電壓信號,也可以為電流信號,或是電壓信 號和電流信號的組合(如功率信號)。在本發明的一個 具體實施例中,開關S1為M0SFET,待調節量Uo為電壓信 號V 〇,回饋信號104為電壓:信號。 開關電源的控制方式,包含定頻方式和變頻方式,前者 如普通PWM控制方式,後者如off-time控制方式和准諸 振控制方式。在普通PWM控制方式中,通過控制開關導通 時長對輸出進行調節;在off-tin】e控制方式中,通過控 制開關關閉時長對輸出進行調節;在准諧振控制方式中 ,通過控制開關導通時長對輸出進行調節,當開關管兩 端壓降達到最小值時,開關導通。 第2圖為根據本發明思想的方法流程圖,模組202檢測開 關電源的輸出功率,模組203根據檢測到的輸出功率確定 一回饋信號。在控制電路105採用普通PWM控制方式或准 諧振控制方式的具體實施方式中,該回饋信號的大小與 開關導通時長相關;在控制電路10 5採用〇f f -1 i me控制 方式的具體實施方式中,該回饋信號的大小與開關頻率 大小相關。模組204將模組203確定的回饋信號與一輕載 閾值信號進行比較。相對應地,在控制電路105採用普通 PWM控制方式或准諧振控制方式的具體實施方式中,該輕 載閾值信號的大小與開關導通時長相關。在該發明的一 個具體實施例中,該輕載閾值信號被設置為對應於滿載 表單編號A0101 第7頁/共27頁 201212496 開關導通時長的25% ;在控制電路105採用〇ff_time控制 方式的具體實施方式中,該輕載閾值信號的大小與開關 頻率大小相關。在該發明的一個具體實施例中,該輕載 閾值信號被設置為對應於滿載開關頻率的2〇%。當回饋信 號代表的輸出功率大於輕載閾值信號代表的輕載閾值功 率,開關電源為非輕載狀態,進入模組2 〇 5,控制電路工 作于正常工作模式,如所述普通pWM方式、准諧振控制方 式、of f-1 ime控制方式;反之,開關電源為輕載狀態’ 進入模組206,控制電路工作於間歇模式。D 〇 099129547 [Prior Art] Today, more and more electronic products are powered by switching power supplies, which stems from the good characteristics of the switching power supply itself. The switching power is generally above several tens of kilohertz, and the semiconductor device is turned on and off to transfer energy. Therefore, it has a small size, light weight, and high conversion efficiency: advantages. In order to achieve energy conversion, the switching power supply can adopt various lifting structures to describe the principle of switching power supply by using a wide range of flyback topology structures as an example. In general, it can be used in the following functional modules: " input unit, energy blending unit, energy wheeling unit, feedback I疋 and off control single core AC voltage energy unit I, rectified and filtered The action plate is smooth and straight, and the switching control unit controls the conduction of the switch according to the feedback signal of the feedback unit, and the DC voltage is converted into a high frequency signal, and then the stabilized DC voltage is outputted by the change. The combination of 'final get = normal Μ situation' electronic products will also be servant in light-loaded machine-like "collectively referred to as light-load state". In light load and ^, the load requires a power supply knife after the year is small 'if the control unit is still The original frequency drives the switching tube, the frequency is very high, and the corresponding switching tube switching loss becomes remarkable, and the conversion efficiency is improved. For this reason, the 'returnable lie method. Simply starting from the table> the light load status requirement The switching frequency is lower than 20KHZ, the frequency form number is _ ^ 3 1/* 27 ! 0993444896-0 201212496 falls into the 曰 frequency dry perimeter 'this will cause noise problems again. For the 4 problem 'more f pass is to use intermittent Mode. The so-called intermittent plate type, that is, the control switch is driven by the high-frequency pulse signal for a period of time (set time length M〇n), and remains in the off state during the adjacent other time period (the duration is set) The two state loops alternate. Thus, the equivalent switching frequency is reduced, which can effectively improve the efficiency. However, in the prior art, the durations M〇n and Moff are automatically adjusted according to the power demand of the load, which causes Mon and M〇ff's shirt (that is, right The frequency of the modulated signal of the high-frequency pulse signal is not modulated. This uncertainty also introduces a noise problem. [0003] The technical problem to be solved by the present invention is a switching power supply. In the light load or standby & amp, the prior art intermittent mode exists because the frequency of the modulated signal is automatically adjusted according to the power demand of the load, resulting in uncertainty of the frequency of the modulated signal, which may cause noise problems. The invention adopts the following technical solutions. According to the invention, the switching power supply and the control circuit thereof are provided, and when the switching power supply enters the light load state, the control inductor-shooting 1 power supply operates in the intermittent mode. The switching power supply operates in the intermittent mode. During the mode, the frequency of both the high-frequency pulse signal that controls the switch to be turned on and off, and the low-frequency modulation signal that modulates the high-frequency pulse signal are adjusted to a set value, and the output of the switching power supply is realized by adjusting the duty ratio of the low-frequency modulated signal. Closed loop control 099129547 When the switching power supply operates in a non-light load state, the control circuit operates at p Any one of WM control mode, quasi-resonant control mode, and off-time control mode. Corresponding to off-time control mode, when the switching power supply operates in a non-light load state, the switching frequency decreases as the load becomes lighter; From the non-form number A0101, page 4/27 pages, 0993444896-0 201212496, the light load state enters the light load state, and the switching frequency is continuously unchanged. The switching power supply of the present invention includes a control circuit, and the control circuit includes: a feedback loop, the feedback loop Outputting a feedback signal to the control circuit according to the load state, the control circuit compares the feedback signal with the set threshold signal reflecting the light load; and according to the comparison result, the control circuit switches the switching power supply to operate in the normal mode in the intermittent mode or the non-light load state; a high frequency pulse signal generator, receiving the feedback signal and the current detection signal, and outputting a high frequency pulse signal; an intermittent mode generator receiving the feedback signal, outputting a control signal to the high frequency pulse signal generator, and controlling the output pulse signal thereof Frequency; the intermittent mode generator also outputs a low frequency modulated signal; The current detecting module detects a current flowing through the switch and outputs a current detecting signal. The modulating circuit receives the high frequency pulse signal and the low frequency modulation signal, and outputs a switch control signal to control the switch of the switching power supply. The low frequency modulated signal frequency is less than a lower limit of a frequency range to be excluded, the high frequency pulse signal frequency being greater than an upper limit of a frequency range to be excluded. The range of frequencies that need to be excluded includes the audio range. The present invention further provides a control method for a switching power supply that operates in a batch mode when the load of the switching power supply is in a light load state. When the switching power supply operates in the intermittent mode, the control method further includes the following steps: setting a frequency of the high frequency pulse signal for controlling the switch to be turned on and off in the switching power supply; setting a frequency of the low frequency modulation signal for modulating the high frequency pulse signal; Adjusting the duty cycle of the low frequency modulated signal enables closed loop control of the switching power supply 099129547 Form No. A0101 Page 5 / Total 27 Page 0993444896-0 201212496. The method of judging that the load is in the light load state is to compare the feedback signal from the output of the switching power supply with the set threshold signal reflecting the light load, and based on the comparison result, determine that the load is in the light load state. By adopting the technical solution proposed according to the inventive concept, when the switching power supply operates in the intermittent mode when its load is in the light load state, the frequency of the high frequency pulse signal and the frequency of the low frequency modulation signal can be kept within the set range. Thereby avoiding the audio range, reducing noise, and better solving the technical problem. In addition, the invention also has the advantages of simple circuit structure and low cost. [Embodiment] FIG. 1 is a specific embodiment according to the inventive concept, which is based on a flyback topology. The invention is equally applicable to other switching power supply topologies. This embodiment uses a flyback topology as an illustration, but for ease of explanation. In this embodiment, the voltage input signal Vin is adjusted to provide energy to the load. As shown in Fig. 1, first, the voltage input signal Vin is coupled to the energy transfer unit transformer T1, and the switch S1 is periodically turned on and off under the action of the control signal 101, so that the energy of the primary side of the transformer T1 is coupled to the pair. Then, through the rectification of the diode D1 and the filtering of the capacitor C1, a constant value signal ϋο is finally obtained, and the constant value signal may be the voltage signal Vo or the current signal 1〇. In a specific embodiment of the invention, the signal is a voltage signal Vo. The input signal of the control circuit 105 is all from the switch current detection signal 102, and various current detecting means can be applied, such as detecting the current I, the voltage drop across a resistor; the other is from the signal U to be sampled and fed back through the network. 103 processed feedback signal 104, 099129547 Form No. A0101 Page 6 of 27 0993444896-0 In response to the feedback signal 104, the control circuit 105 controls the conduction and closing of the switch S1 to achieve closed-loop adjustment of the amount to be adjusted Uo. The control circuit 105 may be an integrated circuit, a discrete device, or a combination of both. The feedback signal 104 can be any electrical signal that reacts to the load state, such as a voltage signal, a current signal, or a combination of a voltage signal and a current signal (e.g., a power signal). In a specific embodiment of the invention, the switch S1 is a MOSFET, the amount to be adjusted Uo is a voltage signal V 〇, and the feedback signal 104 is a voltage: signal. The control mode of the switching power supply includes a fixed frequency mode and a frequency conversion mode. The former is like an ordinary PWM control mode, and the latter is an off-time control mode and a quasi-vibration control mode. In the ordinary PWM control mode, the output is adjusted by controlling the on-time of the switch; in the off-tin] e control mode, the output is adjusted by controlling the switch off time; in the quasi-resonant control mode, the control switch is turned on. The duration adjusts the output. When the voltage drop across the switch reaches a minimum, the switch turns on. 2 is a flow chart of a method in accordance with the inventive concept. Module 202 detects the output power of the switching power supply, and module 203 determines a feedback signal based on the detected output power. In a specific implementation manner in which the control circuit 105 adopts a common PWM control mode or a quasi-resonant control mode, the magnitude of the feedback signal is related to the switch conduction time; and the control circuit 105 adopts the 〇ff-1I me control mode. The size of the feedback signal is related to the size of the switching frequency. Module 204 compares the feedback signal determined by module 203 with a light load threshold signal. Correspondingly, in a specific implementation manner in which the control circuit 105 adopts a normal PWM control mode or a quasi-resonant control mode, the size of the light load threshold signal is related to the switch conduction time. In a specific embodiment of the invention, the light load threshold signal is set to correspond to 25% of the switch on time of the full load form number A0101 page 7 / total 27 pages 201212496; the control circuit 105 adopts the 〇ff_time control mode In a specific implementation, the size of the light load threshold signal is related to the size of the switching frequency. In a specific embodiment of the invention, the light load threshold signal is set to correspond to 2% of the full load switching frequency. When the output power represented by the feedback signal is greater than the light load threshold power represented by the light load threshold signal, the switching power supply is in a non-light load state, enters the module 2 〇 5, and the control circuit operates in a normal working mode, such as the ordinary pWM mode and the standard Resonant control mode, of f-1 ime control mode; conversely, the switching power supply is in light load state 'Enter module 206, and the control circuit works in intermittent mode.

第3圖為根據第2圖所示方法流程圓的一個具體實施例的 結構框圖,該實施例基於flyback (反激)拓撲,off-time控制 方式。 對應第2圖中的模_2〇5 , 即非輕載狀態 ,間歇模式發生器302不起作用,高頻脈衝信號發生器 3 0 3在回饋彳g號1 〇 4和開關電流檢測模組3 〇 1輸出電流檢 測信號102的作用下控制開關S1 ’開關電源工作於〇ff_ time方式。對應第2圖中的模組2〇6,即輕載狀態,間歇 模式發生器302起作用’其一方面輸出信號305對高頻脈 衝信號發生器303的輸出信號307的頻率進行控制,另一 方面低頻調製信號306通過及閘308對高頻脈衝信號發生 器303的輸出信號307進行調製,調製後的信號經驅動電 路309作用後產生信號310控制開關si。在本發明的一個 具體實施例中,通過檢測電阻R1上的電壓實現對電流J sl 的檢測。 第4圖是第3圖所示結構框圖的具體示意圖。高頻脈衝信 號發生器303包含高頻脈衝信號頻率控制電路4〇1,電路 選擇模組402,第三比較器403,RS觸發器404。高頻脈 099129547 表單編號A0101 第8頁/共27頁 0993444896-0 201212496 衝信號頻率控制電路401用於設定高頻脈衝信號發生器Figure 3 is a block diagram showing a block diagram of a specific embodiment of the flow circle according to the method of Figure 2, which is based on a flyback topology and an off-time control mode. Corresponding to the mode_2〇5 in Fig. 2, that is, in the non-light load state, the intermittent mode generator 302 does not function, and the high frequency pulse signal generator 3 0 3 is in the feedback 彳g No. 1 〇4 and the switch current detecting module. 3 〇1 output current detection signal 102 under the control switch S1 'switching power supply works in 〇 ff_ time mode. Corresponding to the module 2〇6 in Fig. 2, that is, in the light load state, the intermittent mode generator 302 functions 'on the one hand, the output signal 305 controls the frequency of the output signal 307 of the high frequency pulse signal generator 303, and the other The low frequency modulation signal 306 is modulated by the AND gate 308 to the output signal 307 of the high frequency pulse signal generator 303. The modulated signal is applied to the drive circuit 309 to generate a signal 310 to control the switch si. In a specific embodiment of the invention, the detection of current J sl is achieved by detecting the voltage across resistor R1. Figure 4 is a detailed schematic diagram of the block diagram shown in Figure 3. The high frequency pulse signal generator 303 includes a high frequency pulse signal frequency control circuit 401, a circuit selection module 402, a third comparator 403, and an RS flip flop 404. High frequency pulse 099129547 Form number A0101 Page 8 of 27 0993444896-0 201212496 The signal frequency control circuit 401 is used to set the high frequency pulse signal generator

303輸出信號307的頻率,頻率設定可以通過調整電容C2 電容值和/或電流源12來實現。電路選擇模組402比較輸 入信號的大小’選擇其中大的信號或小的信號作為被選 擇的輸出信號。對應非輕載狀態,電路選擇模組402選擇 回饋網路103輸出的回饋信號1〇4為第三比較器403反相 端的輸入;對應輕載狀態,電路選擇模組402選擇間歇模 式發生器302輸出信號305作為第三比較器403反相端的 輸入。RS觸發器404的S端接第三比較器403的輸出,R端 接開關電流檢測模組301的輸出電流檢測信號1〇2,輸出 信號307送入及閘308,經間歇模式發生器302的輸出信 號306調製後,控制開關S1。RS觸發器404的輸出信號 307同時送入Tpulsel模組,產生控制電容C2放電的脈衝 信號。The frequency of the output signal 307, 303, can be achieved by adjusting the capacitance of the capacitor C2 and/or the current source 12. The circuit selection module 402 compares the size of the input signal' to select either a large signal or a small signal as the selected output signal. Corresponding to the non-light load state, the circuit selection module 402 selects the feedback signal 1〇4 output by the feedback network 103 as the input of the inverting terminal of the third comparator 403; and corresponding to the light load state, the circuit selection module 402 selects the intermittent mode generator 302. The output signal 305 serves as an input to the inverting terminal of the third comparator 403. The S terminal of the RS flip-flop 404 is connected to the output of the third comparator 403, the R terminal is connected to the output current detection signal 1〇2 of the switch current detecting module 301, and the output signal 307 is sent to the gate 308 via the intermittent mode generator 302. After the output signal 306 is modulated, the switch S1 is controlled. The output signal 307 of the RS flip-flop 404 is simultaneously supplied to the Tpulsel module to generate a pulse signal that controls the discharge of the capacitor C2.

間歇模式發生器302包含低頻調製信號頻率控制模組410 ,輕載閾值設定模組411,第一減法器412,第二減法器 413,第一比較器414和第二比較器415。低頻調製信號 頻率控制模組410用^設定間歇模式發生器302輸出低頻 調製信號306的頻率,頻率改變可以通過調整電壓源V3電 壓值、電容C3電容值、電阻R3阻值中的一個或多個來實 現。輕載閾值設定模組411用於設定開關電源何時進入輕 載狀態’其輸出與比較器415反相端相連並作為減法器 413的輸入◊在該發明的一個具體實施例中,輕載閾值對 應負載滿載功率的20%。第一減法器412對回饋信號1〇4 進行邏輯處理後輸入第一比較器414的同相端,設回饋信 號104大小為vfb,Vref為一預設信號,邏輯功能為 099129547 表單編號A0101 第9頁/共27頁 0993444896-0 201212496The intermittent mode generator 302 includes a low frequency modulated signal frequency control module 410, a light load threshold setting module 411, a first subtractor 412, a second subtractor 413, a first comparator 414 and a second comparator 415. The low frequency modulation signal frequency control module 410 outputs the frequency of the low frequency modulation signal 306 by setting the intermittent mode generator 302. The frequency change can be adjusted by adjusting one or more of the voltage source V3 voltage value, the capacitance C3 capacitance value, and the resistance R3 resistance value. to realise. The light load threshold setting module 411 is configured to set when the switching power supply enters the light load state. The output thereof is connected to the inverting terminal of the comparator 415 and serves as an input of the subtractor 413. In a specific embodiment of the invention, the light load threshold corresponds to Load 20% of full load power. The first subtractor 412 performs logic processing on the feedback signal 1〇4 and inputs the same phase of the first comparator 414. The feedback signal 104 has a size of vfb, Vref is a preset signal, and the logic function is 099129547. Form No. A0101 Page 9 / Total 27 pages 0993444896-0 201212496

Vsubl=Vref-Vfb,Vsubl為第一減法器412輸出信號 421的大小。第二減法器41 3對負載閾值設定模組411輸 出進行邏輯處理後輸出給電路選擇模组4〇2,邏輯功能為 Vsub2 = Vref-Vth,Vth為負載閾值設定模組411輸出信 號422的值,第二減法器413輸出信號305的大小為“吡? 。第一比較器414的同相端接第一減法器412的輸出,反 相端接低頻調製信號頻率控制模組41〇的輸出,輸出低頻 凋製仏號306送入及閘308,對高頻脈衝信號發生器3〇3 的輸出信號307進行調製。第二比較器415的同相端接低 頻調製仏號頻率控制模組41 o輪出,反袓端與負載閾值 没定模組411杻連,輸出信1420送入Tpuise2模組,產 生控制電容C3放電的脈衝信號。在比較器415同相端得到 一鋸齒波信號,該鋸齒波信號頻率與低頻調製信號3〇6的 頻率相同。 下面結合波形第5圖,對第4圖所示實施例的具體工作原 理進行說明。第5A圖對應非輕載裏作情说,第5B圖對應 輕載工作情況。 在本發明的一個具體實施例中,回镇信號1〇4的值Vfb隨 著負載的變輕而變大,當Vfb小於第二減法器413輪出信 號305的值Vsub2,開關電源工作於非輕載狀態,電路選 擇模組402選擇回饋信號1〇4作為第三比較器4〇3反相端 的輸入。在第5A圖中,VC2為電容C2兩端的電壓波形, VR1為電阻R1兩端的電壓波形,^為觸發器4〇4 s端的信 號,VR為所述觸發器R端的信號,、為高頻脈衝信號發生 器303輸出信號307的波形^在非輕載狀態,開關驅動信 號310的波形與Vn波形相同。以—個高頻脈衝信號週期( 0993444896-0 099129547 表單編號A0101 第10頁/共27頁 201212496Vsubl = Vref - Vfb, Vsubl is the size of the output signal 421 of the first subtractor 412. The second subtractor 41 3 performs logic processing on the output of the load threshold setting module 411 and outputs the result to the circuit selection module 4〇2, the logic function is Vsub2 = Vref-Vth, and Vth is the value of the output threshold value of the load threshold setting module 411. The second subtractor 413 outputs a signal 305 having a size of "pi?". The in-phase terminal of the first comparator 414 is connected to the output of the first subtractor 412, and the inverting terminal is connected to the output of the low-frequency modulation signal frequency control module 41? The low frequency withering code 306 is sent to the gate 308, and the output signal 307 of the high frequency pulse signal generator 3〇3 is modulated. The inverting terminal of the second comparator 415 is connected to the low frequency modulation signal frequency control module 41 o. The anti-袓 terminal is connected to the load threshold undetermined module 411, and the output signal 1420 is sent to the Tpuise2 module to generate a pulse signal for discharging the control capacitor C3. A sawtooth signal is obtained at the non-phase of the comparator 415, and the sawtooth signal frequency is obtained. The frequency is the same as the frequency of the low-frequency modulation signal 3〇6. The specific working principle of the embodiment shown in Fig. 4 will be described below with reference to the waveform diagram 5. The 5A diagram corresponds to the non-light load, and the 5B diagram corresponds to the light load. Work situation In a specific embodiment of the present invention, the value Vfb of the return signal 1〇4 becomes larger as the load becomes lighter. When Vfb is smaller than the value Vsub2 of the second subtractor 413 rounding signal 305, the switching power supply operates. In the non-light load state, the circuit selection module 402 selects the feedback signal 1〇4 as the input of the inverting terminal of the third comparator 4〇3. In FIG. 5A, VC2 is the voltage waveform across the capacitor C2, and VR1 is the end of the resistor R1. The voltage waveform, ^ is the signal of the 4th s terminal of the flip-flop, VR is the signal of the R terminal of the flip-flop, and the waveform of the output signal 307 of the high-frequency pulse signal generator 303 is in the non-light load state, and the switch driving signal 310 is The waveform is the same as the Vn waveform. With a high frequency pulse signal period (0993444896-0 099129547 Form No. A0101 Page 10 / Total 27 Page 201212496

TsO到Ts2)為例進行說明。在Ts〇時刻,電容C2兩端電 壓上升到Vfb,第三比較器4〇3輸出高電平,其一方面使 觸發器404置位,輸出高電平,開關S1導通,開關電流 isi逐漸增大,電壓vri相應上升。另一方面觸aTpulseiTsO to Ts2) will be described as an example. At Ts〇, the voltage across capacitor C2 rises to Vfb, and the third comparator 4〇3 outputs a high level, which on the one hand sets flip-flop 404, outputs a high level, switch S1 turns on, and switch current isi increases. Large, the voltage vri rises accordingly. On the other hand touch aTpulsei

)。在TsO到Tsl時間段,電壓持續升高,當達到 Vsense之預設電壓值Vimax,比敕器416輸出高電平,觸 發器404被復位,輪出低電平,開關幻關閉,電壓v R1 1千 為0,一直保持到下一個週期開始。在Ts2時刻,電容C2 電壓VC2再次上升到Vfb。之後,各個物理量重複Ts〇到 Ts2之間的波形。). During the period from TsO to Tsl, the voltage continues to rise. When the preset voltage value Vimax of Vsense is reached, the comparator 416 outputs a high level, the flip-flop 404 is reset, the low level is turned on, the switch is turned off, and the voltage is v R1. One thousand is 0, and it will remain until the next cycle begins. At time Ts2, capacitor C2 voltage VC2 rises again to Vfb. Thereafter, each physical quantity repeats the waveform between Ts and Ts2.

模組產生一寬度為Tpl的脈衝信號,該脈衝信號使得電容 C2上的電壓在脈衝時間内被完全放電。在Tp丨時長後,電 容C2再次被電流源12充電直到下一個週期開始(Ts2時刻 VC2波形週期為Ts,亦即Vn週期為Ts,其包含兩部分時 間,Tpl和Tchrs-n。在本實施例中,Tpl為一固定時長 ’ Tchrs-n由電容Μ、電流源u、回饋信kl〇4的大小決 定。設電容C2的電容值為Cs,電流源12的電流大小為 s,其運算式為 'hrs—n. Ϊ;, 回饋信號104大小的變化,或通過調整電容C2的電容值、 電流源12的電流值中的一個或全部即可調節Tchrs_n的 大小,進而改變週期Ts,亦即調節開關驅動信號31〇的頻 率。另一方面,在整個非輕載情況下,隨著負载變輕, 回饋信號104變大’ Tchrs-n變大,TS變大,開關驅動 信號頻率相應降低。 099129547 表單編號A0101 第11頁/共27頁 0993444896-0 201212496 當Vfb小於Vsub2,即Vfb〈 Vref — Vth,等效於Vref— Vfb&gt; Vth,即第一比較器414輸出恒為高電平。在非輕 載狀態,間歇模式發生器302不對高頻脈衝信號發生器 303的輸出信號307起調製作用。 當Vfb大於Vsub2,開關電源工作於輕載狀態,電路選擇 模組402選擇Vsub2作為第三比較器403反相端的輸入。 在第5B圖中,V”為電容C3的電壓波形。以TmO到Tm2 — 個調製週期為例,在ΤιηΟ時刻,Ve3上升到Vth,第二比 較器415輸出高電平,經Tpulse2產生一寬度為Tp2的脈 衝信號,該脈衝信號使電容C3兩端電壓被放電。脈衝信 號作用後,電容C3兩端電壓又被充電直到Τm2時刻。Vb 為第一比較器414的輸出,亦即間歇模式發生器302的輸 出信號306的波形。在Tm2時刻之後,各個物理量重複T m 0到T m 2之間的波形。The module produces a pulse signal having a width Tpl that causes the voltage across capacitor C2 to be fully discharged during the pulse time. After the Tp丨 period, the capacitor C2 is again charged by the current source 12 until the next cycle begins (the VC2 waveform period is Ts at the time Ts2, that is, the Vn period is Ts, which includes two parts of time, Tpl and Tchrs-n. In this implementation In the example, Tpl is a fixed duration 'Tchrs-n is determined by the size of the capacitor Μ, the current source u, and the feedback signal kl 〇 4. The capacitance of the capacitor C2 is Cs, and the current of the current source 12 is s. The formula is 'hrs-n. Ϊ;, the change of the size of the feedback signal 104, or by adjusting one or both of the capacitance value of the capacitor C2 and the current value of the current source 12, the size of the Tchrs_n can be adjusted, thereby changing the period Ts. That is, the frequency of the switch drive signal 31〇 is adjusted. On the other hand, under the condition of non-light load, as the load becomes lighter, the feedback signal 104 becomes larger 'Tchrs-n becomes larger, TS becomes larger, and the frequency of the switch drive signal decreases accordingly. 099129547 Form No. A0101 Page 11 / Total 27 Page 0993444896-0 201212496 When Vfb is less than Vsub2, that is, Vfb < Vref - Vth, equivalent to Vref - Vfb &gt; Vth, that is, the output of the first comparator 414 is always at a high level. In the non-light load state, intermittent mode The generator 302 does not modulate the output signal 307 of the high frequency pulse signal generator 303. When Vfb is greater than Vsub2, the switching power supply operates in a light load state, and the circuit selection module 402 selects Vsub2 as the input of the inverting terminal of the third comparator 403. In Fig. 5B, V" is the voltage waveform of the capacitor C3. Taking TmO to Tm2 as the modulation period as an example, at the time of ΤιηΟ, Ve3 rises to Vth, the second comparator 415 outputs a high level, and a width is generated by Tpulse2. Is the pulse signal of Tp2, the pulse signal causes the voltage across the capacitor C3 to be discharged. After the pulse signal is applied, the voltage across the capacitor C3 is charged again until Τm2. Vb is the output of the first comparator 414, that is, the intermittent mode occurs. The waveform of the output signal 306 of the device 302. After the time Tm2, the respective physical quantities repeat the waveform between Tm0 and Tm2.

Vu波形週期為Tm,亦即低頻調製信號306的週期為Tm ,該週期包含兩部分時間,Τρ2和Tchrnl·。在本實施例中 ,Τρ2為一固定時長,Tchrm由電壓源V3、電容C3、電阻 R3、輕載閾值設定模組輸出信號422的大小決定。設電壓 源V3的電壓值為Vm,電容C3的電容值為Cm,電阻R3的阻 值為Rm,其運算式為: 通過調整Vth、電壓源V3的電壓、電容C3的電容值、電阻 R3的電阻值中的一個或多個即可調節Tchrm,進而改變低 頻調製信號306的頻率。 099129547 表單編號A0101 第12頁/共27頁 0993444896-0 201212496 在整個輕載工作期間’電路選擇模組402均選擇信號3〇5 作為比較器反相端的輸入,高頻脈衝信號發生器303輸出 信號307的頻率不受負载變化的影響。輕載期間,一個高 頻脈衝信號週期也包含兩部分時間,Tpl和Tchrs-b,The Vu waveform period is Tm, that is, the period of the low frequency modulation signal 306 is Tm, and the period includes two parts of time, Τρ2 and Tchrnl·. In the present embodiment, Τρ2 is a fixed duration, and Tchrm is determined by the magnitudes of voltage source V3, capacitor C3, resistor R3, and light load threshold setting module output signal 422. The voltage value of the voltage source V3 is Vm, the capacitance value of the capacitor C3 is Cm, and the resistance of the resistor R3 is Rm. The calculation formula is: by adjusting the voltage of Vth, the voltage source V3, the capacitance of the capacitor C3, and the resistance R3. One or more of the resistance values can adjust Tchrm, which in turn changes the frequency of the low frequency modulated signal 306. 099129547 Form No. A0101 Page 12/Total 27 Page 0993444896-0 201212496 During the entire light load operation, the circuit selection module 402 selects the signal 3〇5 as the input of the inverting terminal of the comparator, and the high frequency pulse signal generator 303 outputs the signal. The frequency of 307 is not affected by load changes. During light load, a high frequency pulse signal period also contains two parts of time, Tpl and Tchrs-b,

Tchrs-b為輕載期間一個週期内電容C2的充電時長,其 運算式為 chrs-bTchrs-b is the charging duration of capacitor C2 in one cycle during light load, and its expression is chrs-b.

Cs(Kef ~Vth) Ο 通過調整信號305的大小、電容C2的電容值、電流源12的 電流值中的一個或多個即可調節Tchrs-b的大小’進而改 變高頻脈衝信號週期。 :, 對應非輕載狀態,Vfb&lt; Vref-Vth,對應輕載狀態, Vfb&gt;Vref —Vth,故存在一個兩個狀態切換的臨界點, 滿足Vfb=Vref — Vth。在該臨界點,滿足Tchrs-n=Tchrs-b,即兩個狀態切換時,高頻脈衝信號發生器 303輸出信號307的頻率不會發生突變。Cs (Kef ~ Vth) Ο The size of the Tchrs-b can be adjusted by adjusting the size of the signal 305, the capacitance of the capacitor C2, and the current value of the current source 12 to change the period of the high-frequency pulse signal. :, corresponding to the non-light load state, Vfb &lt; Vref-Vth, corresponding to the light load state, Vfb &gt; Vref - Vth, so there is a critical point of two state switching, satisfying Vfb = Vref - Vth. At this critical point, when Tchrs-n = Tchrs-b is satisfied, that is, when two states are switched, the frequency of the output signal 307 of the high-frequency pulse signal generator 303 does not abruptly change.

第6圖為輕載期間開關驅動信號的示意圖。Vn為高頻脈衝 信號發生器303輸出信號307的波形,週期為Ts。Vb為間 歇模式發生器302輸出低頻調製信號3〇6的波形,週期為 Tm。Vg為Vn經Vb調製後生成的開關驅動信號310的波形 。一方面,在一個調製週期Tm内,Vg比Vn包含的週期為 Ts的脈衝個數少,可以有效地減小輕載時的開關損耗; 另一方面,通過合理地選擇相關參數,可以將輕載時的 Ts和Tm設定在特定範圍内,以滿足降噪的要求。 進入輕載狀態後,如果負載進一步降低,則回饋信號104 的值Vfb將變大,第一減法器412輸出信號421的值Vsubl 099129547 表單煸號A0101 第13頁/共27頁 0993444896-0 201212496 變小。由第5B圖及第6圖可知,Vsubl變小引起低頻調製 信號306的占空比降低,在一個調製週期以内,開關驅動 、號310包含的高頻脈衝個數減少,以降低對負栽的能量 供給,實現對輸出的閉環調節。 第7圖為根據第2圖所示方法流程圖的另—個具體實施例 的結構框圖。該實施例基於剛控制方式或准譜振控制方 式。對應PWM控制方式,觸發器置位元電路7〇1為時鐘信 號發生益,對應准譜振控制方式,觸發器置位元電路Μ】 為穀底檢測模組。觸發器置位元電路7_出信號702到 觸發器404的置位兀端,電路選擇模組權從回饋产號 104和間歇模式發生器3Q2輸出信細5中選擇—/號' 作為比較器416反相端的輪入信號704’比較器41°罐出 電流檢測信號703到觸發恶4n ^ 』頌發器404的復位端。開關S1的導通 時長由比較器416反相端的传咕 D垅大小決定。開關S1關閉後 ,對於PWM控制方式,所述 &lt;^讀仏旒發生益母隔—個時鐘 099129547 週期使觸發麵置位;對於准諧振控制方式,當毅底檢 測杈組檢測到開關管幻漏源電壓為一最小值時,使觸發 器4 0 4置纟料時鐘信號發生器和穀底檢測模組對於本 領域内的技術人員來說是公知常識,在此不再做具體的 、’、田節描述對應第2圖中的模組2〇5,即非輕載狀態,間 歇模式發生H302不起作用’電路選擇模組4〇2輸出回饋 信號104,開關電流檢測模組3〇ι根據回饋信號1〇4的大 小調即開關S1的導通時長’開關電源工作於刚方式或准 諧振方式I基於本發明思想的—個具體實施例中回 饋佗號104的大小隨著負載的變輕而減小。對應第2圖中 的模組206’即輕載狀態,間歇模式發生㈣淡作用, 表單編號屬1 第U W 27胃 099344, 201212496 [0005] Ο ❹ 其一方面使電路選擇模組402輸出信號305,控制開關導 通時長為一對應的確定值,另一方面輸出信號306通過及 閘308對觸發器404的輸出信號307進行調製,調製後的 信號經驅動電路309作用後產生信號310控制開關S1。 【圖式簡單說明】 第1圖為根據本發明思想的一個基於反激拓撲的具體實施 例。 第2圖為根據本發明思想的一種開關電源的控制方法流程 圖。 第3圖為根據第2圖所示方法流程圖的一個具體實施例的 結構框圖。 第4圖為對應第3圖所示結構框圖的具體示意圖。 第5圖為對應第4圖所示實施例的各個物理量的工作波形 圖。其中第5Α圖對應非輕載工作情況,第5Β圖對應輕載 工作情況。 第6圖為對應第4圖所示實施例開關電源輕載期間開關驅 動信號的示意圖。 第7圖為根據第2圖所示方法流程圖的另一個具體實施例 的結構框圖。 [0006] 【主要元件符號說明】 101 控制信號 102 電流檢測信號 103 回饋網路 104 回饋信號 105 控制電路 表單編號Α0101 099129547 第15頁/共27頁 0993444896-0 201212496 202 ' 203、204、205、206 模組 099129547 301 開關電流檢測权組 302 間歇模式發生器 303 高頻脈衝信號發生器 305、 306、307、421、422、702 306 低頻調製信號 308 閘 309 調製後的信號經驅動電路 310 開關驅動信號 401 高頻脈衝信號頻率控制電路 402 電路選擇模組 403 第三比較器 404 RS觸發器 410 低頻調製信號頻率控制模組 411 輕載閾值設定模組 412 第一減法器 413 第二減法器 414 第一比較器 415 第二比較器 416 比較器 701 觸發器置位元電路 703 輸出電流檢測信號 704 輸入信號 C1、 C2、C3 電容 D1 二極體 12 電流源 表單編號A0101 第16頁/共27頁 輸出信號 0993444896-0 201212496 Ιο 電流信號 I ,電流 R1、R3 電阻 SI 開關 T1 變壓器Figure 6 is a schematic diagram of the switch drive signal during light load. Vn is a waveform of the output signal 307 of the high-frequency pulse signal generator 303, and the period is Ts. Vb is a waveform of the low-frequency modulation signal 3〇6 outputted by the intermittent mode generator 302, and the period is Tm. Vg is the waveform of the switch drive signal 310 generated after Vb is modulated by Vb. On the one hand, in a modulation period Tm, Vg has a smaller number of pulses of period Ts than Vn, which can effectively reduce switching loss at light load; on the other hand, by reasonably selecting relevant parameters, it can be light The Ts and Tm at the time of loading are set within a specific range to meet the requirements of noise reduction. After entering the light load state, if the load is further lowered, the value Vfb of the feedback signal 104 will become larger, and the value of the first subtractor 412 output signal 421 is Vsub1 099129547. Form number A0101 Page 13 / Total 27 pages 0993444896-0 201212496 small. It can be seen from FIG. 5B and FIG. 6 that the decrease of Vsub1 causes the duty ratio of the low-frequency modulation signal 306 to decrease, and within one modulation period, the number of high-frequency pulses included in the switch drive and the number 310 is reduced to reduce the load on the load. Energy supply for closed loop regulation of the output. Fig. 7 is a block diagram showing the construction of another embodiment of the flow chart according to the method shown in Fig. 2. This embodiment is based on a just-controlled mode or a quasi-spectral control mode. Corresponding to the PWM control mode, the trigger set bit circuit 7〇1 is the clock signal benefit, corresponding to the quasi-spectral control mode, and the trigger set bit circuit Μ is the valley bottom detection module. The flip-flop sets the bit circuit 7_out signal 702 to the set terminal of the flip-flop 404, and the circuit selection module right selects the -/# as the comparator from the feedback generator 104 and the intermittent mode generator 3Q2 output signal 5. The in-phase signal 704' of the inverting terminal of the 416 is compared with the reset terminal of the triggering current detecting signal 703 to the triggering device 404. The on-time of the switch S1 is determined by the size of the dimming of the comparator 416. After the switch S1 is turned off, for the PWM control mode, the &lt;^ reading 仏旒 occurs, and the clock is set to 099129547 cycles to set the trigger surface; for the quasi-resonant control mode, when the bottom detecting 杈 group detects the switch tube phantom When the drain-source voltage is at a minimum value, it is common knowledge for those skilled in the art to place the flip-flop 4 0 4 in the buffer clock signal generator and the valley-detecting module, and no specific one is made here. The description of the field section corresponds to the module 2〇5 in Fig. 2, that is, the non-light load state, and the intermittent mode occurs that H302 does not function. The circuit selection module 4〇2 outputs the feedback signal 104, and the switch current detection module 3〇 According to the size of the feedback signal 1〇4, that is, the conduction time of the switch S1, the switching power supply operates in the rigid mode or the quasi-resonant mode I. Based on the idea of the present invention, the size of the feedback nickname 104 varies with the load. Light and reduce. Corresponding to the module 206' in FIG. 2, that is, the light load state, the intermittent mode occurs (4), and the form number belongs to 1 UW 27 stomach 099344, 201212496 [0005] ❹ ❹ On the one hand, the circuit selection module 402 outputs a signal 305. The control switch is turned on for a corresponding determined value. On the other hand, the output signal 306 modulates the output signal 307 of the flip-flop 404 through the AND gate 308. The modulated signal is applied to the drive circuit 309 to generate a signal 310 to control the switch S1. . BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a specific embodiment based on a flyback topology in accordance with the teachings of the present invention. Fig. 2 is a flow chart showing a control method of a switching power supply according to the inventive concept. Figure 3 is a block diagram showing the structure of a specific embodiment of the flow chart according to the method of Figure 2. Fig. 4 is a detailed diagram corresponding to the block diagram of the structure shown in Fig. 3. Fig. 5 is a view showing the operation waveforms of the respective physical quantities corresponding to the embodiment shown in Fig. 4. The fifth map corresponds to the non-light load operation, and the fifth map corresponds to the light load operation. Fig. 6 is a view corresponding to the switch driving signal during the light load of the switching power supply of the embodiment shown in Fig. 4. Fig. 7 is a block diagram showing the construction of another embodiment of the flow chart according to the method shown in Fig. 2. [Major component symbol description] 101 control signal 102 current detection signal 103 feedback network 104 feedback signal 105 control circuit form number Α 0101 099129547 page 15 / total 27 page 0993444896-0 201212496 202 ' 203, 204, 205, 206 Module 099129547 301 Switch Current Detection Right Group 302 Intermittent Mode Generator 303 High Frequency Pulse Signal Generator 305, 306, 307, 421, 422, 702 306 Low Frequency Modulation Signal 308 Gate 309 Modulated Signal Via Drive Circuit 310 Switch Drive Signal 401 high frequency pulse signal frequency control circuit 402 circuit selection module 403 third comparator 404 RS flip flop 410 low frequency modulation signal frequency control module 411 light load threshold setting module 412 first subtractor 413 second subtractor 414 first Comparator 415 Second Comparator 416 Comparator 701 Trigger Set Bit Circuit 703 Output Current Detect Signal 704 Input Signal C1, C2, C3 Capacitor D1 Diode 12 Current Source Form No. A0101 Page 16 / Total 27 Page Output Signal 0993444896-0 201212496 Ιο Current signal I, current R1, R3 resistance SI switch T 1 transformer

Tchrs-η、Tchrm、Tpl、Τρ2 時長Tchrs-η, Tchrm, Tpl, Τρ2 duration

Tm、Ts 週期Tm, Ts cycle

TsO、Tsl、Ts2 時刻 V3 電壓源TsO, Tsl, Ts2 time V3 voltage source

Vb、Vg、V 波形 nVb, Vg, V waveform n

VC2 ' vC3 電壓波形 Vfb 值 Vi max 預設電壓值 Vin 電壓輸入信號 Vo 電壓信號 V γ 作號 VR1 電壓波形、電壓 . ί’Ά ? | | .v一' Vsubl 大小 Vth 值 Uo 恒值信號、調節信號、調節量 [0007] 099129547 表單編號A0101 第17頁/共27頁 0993444896-0VC2 ' vC3 voltage waveform Vfb value Vi max preset voltage value Vin voltage input signal Vo voltage signal V γ number VR1 voltage waveform, voltage. ί'Ά ? | | .v a ' Vsubl size Vth value Uo constant value signal, adjustment Signal, adjustment amount [0007] 099129547 Form No. A0101 Page 17 / Total 27 Page 0993444896-0

Claims (1)

201212496 七、申請專利範圍: 1 .開關電源,包含控制該電源中開關的控制電路,其特徵在 ^所述控制電路包括反饋回路,該反饋回路根據負載狀 態輪出回饋信號給控制電路,控制電路比較回饋信號盘設 定的反映輕載的閾值信號;根據上述比較結果,控制電路 切換開關電源工作於間歇模式或非輕載狀態下的正常工作 模式。 l如申請專利範圍第i項所述的開關電源,其特徵在於,所 述開關電源工作於間歇模式期間,控制所述開關導通與截 止的尚頻脈衝信號、調製高頻脈衝信號的低頻調製信號兩 者的頻率被調節為設定值,通過調節低頻調製信號的占空 比實現對開關電源輸出的閉環控制。 3 .如申請專利範圍第2項所述的開關電源,1特徵在於,所 述控制電路還包括 高頻脈衝信號發生器,接收所述回饋信號和電流檢測信號 ’輸出高頻脈衝信號; 間歇模式發生器,接收所述回饋信號,輪出控制信號給高 頻脈衝信號發生器,控制其輪出脈衝信號的頻率;間歇模 式發生器還輸出低頻調製信號; 開關電流檢測模組,檢測流過所述開關的電流,輪出電流 檢測信號; 調製電路,接收所述高頻脈衝信號和低頻調製信號,輸出 開關控制信號,以控制所述開關電源的開關。 4 .如申咕專利粑圍第2項所述的開關電源’其特徵在於,所 述正常工作模式為PWM控制方式。 099129547 表單編號A0101 第18頁/共27頁 0993444896-0 201212496 5. ”請專利範圍第2項所述的開關電源,其特徵在於,所 述正常工作模式為准諧振控制方式。 6 .如申請專利範圍第2項所述的開關電源,其特徵在於,所 述正*工作模式為of f-time控制方式。 7.如申請專利範圍第6項所述的開關電源,其特徵在於 當開關電源工作於非輕載狀態’開關頻率隨著負載的變輕 而降低; 當開關電源從非輕載狀態進入輕載狀態,開關頻率連續不 〇 &amp;變。 8 .如申睛專利範圍第2項所述的開關電源’其特徵在於,所 述低頻調製信號,其頻率小於需要排除的頻率範圍的下限 - 9.如申請專利範圍第2項所述的開關電淥,s其特徵在於,所 • 述尚頻脈衝信號,其頻率大於需要排除的頻率範圍的上限 〇 10 .如申請專利範圍第8項所述的開關電淼,其特徵在於,所 Q 述需要排除的頻率範圍下限小於或等於音頻的下限。 11 .如申請專利範圍第9項所述的開關電源,其特徵在於,所 述需要排除的頻率範圍上限大於或等於音頻的上限。 12 .如申凊專利範圍第3項所述的開關電源,其特徵在於,所 述間歇、模式發生器包括以下模組: 低頻調製6號頻率控制模組,其輸出與第一比較器反相端 及第二比較器同相端相連接; 負載輕載閾值設定模組,其輸出與第二減法器輸入端及第 二比較器反相端相耗合; 第一減法器,輸入接回饋信號,輸出與第一比較器同相端 099129547 表單編號 A0101 第 19 頁/共 27 頁 0993444896-0 201212496 ^二減法器’輪人接負載輕載聞值設找組輪出 述控制«魅财路的高頻脈衝錢發生器__ 第-:較器’同相端接第一減法器輸出,反相端接所述低 頻凋製仏號頻率控制模組輪出,輸出調製信號,· 第二比較器,反相端接所述負載輕載閾值設定模組輪出, 同相端接所述低頻調製信號頻率控制模組輪出 合低頻調製信號頻率控制模組。 而輛 13 . 14 . 15 如_請專利範圍第3項所述的開闕電源,其特徵在於,所 ^控制電路㈣接㈣_㈣與設定軌映輕載的間值 心號的比較結果,認為負麟輕餅,間歇模式發生器輸 出控制信號和難錢㈣高頻脈衝信號發生器和調製電 路’從而控制所述開關;認為負載為非輕_,間歇模式 發生器不起作用’高頻脈衝信號發生器在回饋信號和電流 檢測信號的作用下控制所述開關。 如申請專㈣圍第12萌述的關魏,㈣徵在於所 述高頻脈衝信號發生器包括 高頻脈衝信號頻率控制電路; 第一比較器,同相端接收所述高頻脈衝信號頻率控制電路 的輸出信號,輸出置位元信號; 電路選擇模組’接收所述回饋信號和來自於間歇模式發生 器的控制信號,輸出選擇信號給第三比較器的反相端; 觸發器,置位元端接收所述置位元信號,重定端接收所述 電流檢測信號,輸出端輸出高頻脈衝信號。 如申請專利範圍第12項所述的開關電源,其特徵在於,所 述高頻脈衝信號發生器包括 099129547 表單編號A0101 第20頁/共27頁 0993444896-0 201212496 觸發器置位元電路,輸出置位元信號; 觸發二置位元端接收所述置位元信號,重定端接收所述 電流檢測信號,輸出端輸出高頻脈衝信號; 電路選擇模組,接收回饋信號和來自於間歇模式發生器的 控制彳s號,輸出信號給開關電流檢測模組。 16 . 17 . G 18 . ❹ 19 . 20 . 如申凊專利範圍第15項所述的開關電源,其特徵在於,對 應于正㊉工作模式為1&gt;^^控制方式的控制電路其觸發器 置位元電路為時鐘信號發生器。 如申凊專利範圍第15項所述的開關電源,其特徵在於,對 應于正常工作模式為准諧振控制方式的控制電路,其觸發 器置位元電路為穀底檢測模組。 如申請專利範圍第1 5項所述的開關電源,其特徵在於,所 述控制電路根據接收的回饋信號與設定的反映輕載的閾值 信號的比較結果,認為負載為輕載時,間歇模式發生器輪 出的控制信號通過電路選擇模組作為所述選擇信號,以控 制所述開關的導通時長為對應;的確定值;認為負載為非輕 載時’間歇模式發生器不起作用,電路選擇模組傳遞輸出 回饋信號給開補電流檢測模'紐開..關電流檢測模組根據回 饋信號和反映開關電流的信號控制開關。 一種開關電源的控制方法,其特徵在於當開關電源的負載 為輕載狀態時,所述開關電源工作於間歇模式。 如申請專利範圍第19項所述的開關電源的控制方法,其特 徵在於當開關電源工作于間歇模式時,該方法還包括以下 步驟: 設定控制所述開關電源中開關導通與截土的高頻脈衝信號 頻率; 099129547 表單編號A0101 第21頁/共27頁 0993444896-0 201212496 設定調制所述高頻脈衝信號的低頻調製信號頻率; 通過調節低頻調製信號的占空比實現對所述開關電源輸出 的閉環控制。 21 ·如申請專利範圍第2〇項所述的開關電源的控制方法,其特 徵在於,比較來自於開關電源輸出的回饋信號和設定的反 映輕載的閾值信號,根據比較結果,判定負載為所述輕載 狀態。 22 .如申請專利範圍第20項所述的開關電源的控制方法,其特 徵在於,當開關電源的負載為非輕载狀態時,所述開關電 源工作於PWM控制方式v . . 23 .如申請專利範圍第2〇項所述的開關電源的控制方法其特 徵在於,當開關電源的負載為非輕栽狀;態時,所述開關電 源工作於准諧振控制方式。 24 ·如申請專利範圍第20項所述的開關電源的控制方法,其特 徵在於,當開關電源的負載為非輕載狀態時,所述開 源工作於off-time控制方武。 25 .如申請專利範圍第20項輕的開腳電為控制方法,宜特 徵在於,所述高頻脈衝信_¥大於需要排除的頻率範圍 的上限。 26 .如申請專利範圍第20項所述的開關電源的控制方法,其特 徵在於,所述低頻調製信號頻率小於需要排除的頻率範圍 的下限。 099129547 27 . 28 . 如申請專利範圍第25或26項所述的開關電源的控制方法 ,其特徵在於,所述需要排除的頻率範圍包括音頻範圍。 如申請專職圍第21項所述的_電_控财法,其特 徵表Γ,根據所述閾值信號,控制所述低賴製信號的頻 表單編號Α010] 第22頁/共27頁 0993444896-0 201212496 率,根據所述回饋信號,控制所述低頻調製信號的占空比 ;根據所述閾值信號或回饋信號,控制高頻脈衝信號的頻 率。 29 .如申請專利範圍第28項所述的開關電源的控制方法,其特 徵在於,所述對低頻調製信號的頻率和占空比的控制通過 如下方法實現: 設置低頻調製信號頻率控制模組,通過將所述低頻調製信 號頻率控制模組的輸出與閾值信號比較得到一鋸齒波信號 9 所述鋸齒波信號通過第一比較器與基於回饋信號的信號進 行比較,該比較器輸出端輸出頻率和占空比受到控制的低 頻調製信號。 30 .如申請專利範圍第28項所述的開關電源的控制方法,其特 徵在於,所述控制高頻脈衝信號的頻率通過如下方法實現 設置包含電容充放電電路的高頻脈衝信號頻率控制電路, / 所述高頻脈衝信號頻率控制電路輸出的信號通過第三比較 ❼ 器與基於閾值信號或回饋信號的信號進行比較,該比較器 的輸出信號耦接入RS觸發器的置位端,RS觸發器的輸出 端控制所述電容的充放電,從而控制RS觸發器的輸出端輸 出的高頻脈衝信號的頻率。 099129547 表單編號A0101 第23頁/共27頁 0993444896-0201212496 VII. Patent application scope: 1. A switching power supply, comprising a control circuit for controlling a switch in the power supply, wherein the control circuit comprises a feedback loop, and the feedback loop rotates a feedback signal to the control circuit according to the load state, and the control circuit Comparing the threshold signal reflected by the feedback signal disc to reflect the light load; according to the above comparison result, the control circuit switches the switching power supply to operate in the normal mode in the intermittent mode or the non-light load state. l The switching power supply according to claim i, wherein the switching power supply operates during the intermittent mode, and controls a frequency-frequency pulse signal that is turned on and off by the switch, and a low-frequency modulation signal that modulates a high-frequency pulse signal. The frequency of both is adjusted to the set value, and the closed-loop control of the output of the switching power supply is realized by adjusting the duty ratio of the low-frequency modulation signal. 3. The switching power supply according to claim 2, characterized in that the control circuit further comprises a high frequency pulse signal generator, receiving the feedback signal and the current detection signal 'outputting a high frequency pulse signal; intermittent mode The generator receives the feedback signal, and rotates the control signal to the high frequency pulse signal generator to control the frequency of the pulse signal; the intermittent mode generator also outputs a low frequency modulation signal; the switch current detection module detects the flow through The current of the switch, the current detection signal is rotated; the modulation circuit receives the high frequency pulse signal and the low frequency modulation signal, and outputs a switch control signal to control the switch of the switching power supply. 4. The switching power supply of claim 2, wherein the normal operating mode is a PWM control mode. 099129547 Form No. A0101 Page 18 of 27 0993444896-0 201212496 5. The switching power supply of claim 2, wherein the normal operating mode is a quasi-resonant control mode. The switching power supply of the second aspect, wherein the positive* working mode is the f-time control mode. 7. The switching power supply of claim 6, wherein the switching power supply operates. In the non-light load state, the switching frequency decreases as the load becomes lighter. When the switching power supply enters the light load state from the non-light load state, the switching frequency continues to change. 8. As in the second paragraph of the scope of the patent application The switching power supply is characterized in that the low frequency modulated signal has a frequency lower than a lower limit of a frequency range to be excluded - 9. The switching power according to the second aspect of the patent application, characterized in that The frequency-frequency pulse signal whose frequency is greater than the upper limit of the frequency range to be excluded 〇10. The switching power device according to claim 8 is characterized in that the frequency to be excluded is described in Q. The lower limit of the range is less than or equal to the lower limit of the audio. 11. The switching power supply of claim 9, wherein the upper limit of the frequency range to be excluded is greater than or equal to the upper limit of the audio. The switching power supply of the third aspect, wherein the intermittent mode generator comprises the following modules: a low frequency modulation frequency control module No. 6, the output of which is opposite to the first comparator and the second comparator The same phase is connected; the load light load threshold setting module has an output that is in phase with the second subtractor input end and the second comparator inverting end; the first subtractor, the input is connected to the feedback signal, and the output is coupled to the first comparator. Phase 099129547 Form No. A0101 Page 19 of 27 0993444896-0 201212496 ^Two Subtractor's Wheel Loader Light Loaded Value Set to find the group wheel to take control «Magic Road's high frequency pulse money generator __ The first: the comparator is connected in phase with the first subtractor output, the inverting terminal is connected to the low frequency withering frequency control module, and the output is modulated, and the second comparator is inverting the load. The threshold setting module is rotated, and the low frequency modulation signal frequency control module is connected to the low frequency modulation signal frequency control module in the same phase. The vehicle 13 . 14 . 15 is opened as described in item 3 of the patent scope. The power supply is characterized in that the control circuit (4) is connected to (4) _ (4) and the comparison result of the set value of the light-loaded value is considered to be negative, and the negative mode light cake, the intermittent mode generator output control signal and the difficult money (four) high-frequency pulse signal occur. And the modulation circuit' thereby controlling the switch; the load is considered to be non-light_, and the intermittent mode generator is inactive. The high frequency pulse signal generator controls the switch under the action of the feedback signal and the current detection signal. For example, applying for the special (4) surrounding the 12th Meng Wei, (4) is characterized in that the high frequency pulse signal generator includes a high frequency pulse signal frequency control circuit; the first comparator receives the high frequency pulse signal frequency control circuit at the same phase end The output signal outputs a set bit signal; the circuit selection module 'receives the feedback signal and the control signal from the intermittent mode generator, and outputs a selection signal to the inverting terminal of the third comparator; the flip-flop, the set bit The terminal receives the set bit signal, the reset terminal receives the current detection signal, and the output terminal outputs a high frequency pulse signal. The switching power supply of claim 12, wherein the high frequency pulse signal generator comprises 099129547 Form No. A0101 Page 20 / Total 27 Page 0993444896-0 201212496 Trigger Set Bit Circuit, Output a bit signal; triggering the second bit terminal to receive the set bit signal, the resetting end receiving the current detecting signal, the output end outputting a high frequency pulse signal; the circuit selecting module, receiving the feedback signal and coming from the intermittent mode generator The control 彳s number, the output signal to the switch current detection module. </ RTI> </ RTI> </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; The bit circuit is a clock signal generator. The switching power supply according to claim 15 is characterized in that, in the control circuit corresponding to the normal operation mode being the quasi-resonant control mode, the trigger setting bit circuit is a valley detecting module. The switching power supply of claim 15, wherein the control circuit determines that the intermittent mode occurs when the load is a light load according to a comparison result between the received feedback signal and the set threshold signal reflecting the light load. The control signal that is rotated by the device is used as the selection signal by the circuit selection module to control the determined duration of the switch; the intermittent value generator does not function when the load is considered to be non-light load, the circuit The selection module transmits the output feedback signal to the open current detection mode 'Newly opened. The off current detection module controls the switch according to the feedback signal and the signal reflecting the switch current. A method of controlling a switching power supply, characterized in that when the load of the switching power supply is in a light load state, the switching power supply operates in an intermittent mode. The method for controlling a switching power supply according to claim 19, wherein when the switching power supply operates in the intermittent mode, the method further comprises the steps of: setting a high frequency for controlling the conduction and interception of the switch in the switching power supply; Pulse signal frequency; 099129547 Form number A0101 Page 21 of 27 0993444896-0 201212496 Set the frequency of the low frequency modulation signal modulating the high frequency pulse signal; realize the output of the switching power supply by adjusting the duty ratio of the low frequency modulation signal Closed-loop control. The control method of the switching power supply according to the second aspect of the invention is characterized in that the feedback signal from the output of the switching power supply and the set threshold signal reflecting the light load are compared, and the load is determined according to the comparison result. The light load state. The control method of the switching power supply according to claim 20, wherein when the load of the switching power supply is in a non-light load state, the switching power supply operates in a PWM control mode v . . . The control method of the switching power supply according to the second aspect of the invention is characterized in that, when the load of the switching power supply is not lightly loaded, the switching power supply operates in a quasi-resonant control mode. The control method of the switching power supply according to claim 20, wherein when the load of the switching power supply is in a non-light load state, the open source operates in an off-time control mode. 25. If the light foot switch is the control method of claim 20, it is preferable that the high frequency pulse signal _¥ is larger than the upper limit of the frequency range to be excluded. The control method of a switching power supply according to claim 20, wherein the low frequency modulation signal frequency is smaller than a lower limit of a frequency range to be excluded. The method of controlling a switching power supply according to claim 25 or 26, wherein the frequency range to be excluded includes an audio range. For example, the _ electric_control method described in Item 21 of the full-time application, the characteristic table 控制, according to the threshold signal, controls the frequency form number of the low-lying signal Α 010] page 22 / 27 pages 0993444896 - 0 201212496 rate, according to the feedback signal, controlling the duty ratio of the low frequency modulation signal; controlling the frequency of the high frequency pulse signal according to the threshold signal or the feedback signal. The control method of the switching power supply according to claim 28, wherein the controlling the frequency and the duty ratio of the low frequency modulation signal is implemented by: setting a frequency control module for the low frequency modulation signal, Comparing an output of the low frequency modulation signal frequency control module with a threshold signal to obtain a sawtooth wave signal 9, the sawtooth wave signal is compared with a signal based on a feedback signal by a first comparator, and the output frequency of the comparator output is A low frequency modulated signal with a controlled duty cycle. The control method of the switching power supply of claim 28, wherein the controlling the frequency of the high-frequency pulse signal is implemented by the following method: setting a frequency control circuit for the high-frequency pulse signal including the capacitor charging and discharging circuit, The signal outputted by the high frequency pulse signal frequency control circuit is compared with a signal based on a threshold signal or a feedback signal through a third comparator, and the output signal of the comparator is coupled to the set end of the RS flip-flop, and the RS triggers The output of the device controls the charging and discharging of the capacitor, thereby controlling the frequency of the high frequency pulse signal outputted from the output of the RS flip-flop. 099129547 Form No. A0101 Page 23 of 27 0993444896-0
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