CN112736159A - Preparation method of selective polycrystalline silicon thickness and doping concentration battery structure - Google Patents

Preparation method of selective polycrystalline silicon thickness and doping concentration battery structure Download PDF

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CN112736159A
CN112736159A CN202011630200.7A CN202011630200A CN112736159A CN 112736159 A CN112736159 A CN 112736159A CN 202011630200 A CN202011630200 A CN 202011630200A CN 112736159 A CN112736159 A CN 112736159A
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吕俊
王建波
刘松民
赵俊霞
任丽丽
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Sanjiang University
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    • H01L31/182Special manufacturing methods for polycrystalline Si, e.g. Si ribbon, poly Si ingots, thin films of polycrystalline Si
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Abstract

The application discloses a preparation method of a selective polycrystalline silicon thickness and doping concentration battery structure, wherein a tunneling oxide layer with the thickness of less than 2nm is formed by a nitric acid oxidation method, an ozone water oxidation method or a thermal oxidation method; depositing a layer of lightly doped amorphous silicon film on the tunneling oxide layer by adopting PECVD (plasma enhanced chemical vapor deposition), covering the lightly doped amorphous silicon film by adopting a mask plate, continuously depositing a layer of heavily doped amorphous silicon film on the hollow-out area of the cell by adopting a PECVD (plasma enhanced chemical vapor deposition) mode, and annealing the silicon wafer by using an annealing furnace to crystallize the silicon wafer into a non-metal contact area lightly doped polycrystalline silicon film and a metal contact area heavily doped polycrystalline silicon film; depositing a passivation layer on the surfaces of the lightly doped polycrystalline silicon thin film in the non-metal contact area and the heavily doped polycrystalline silicon thin film in the metal contact area by adopting a PECVD or ALD mode; and printing a metal electrode at the position of the metal contact area by adopting a screen printing mode and sintering.

Description

Preparation method of selective polycrystalline silicon thickness and doping concentration battery structure
Technical Field
The application relates to the technical field of solar cells, in particular to a preparation method of a cell structure with selective polycrystalline silicon thickness and doping concentration.
Background
Recently, a passivation contact technology is gradually applied to a crystalline silicon solar cell, and a basic method of the passivation contact technology adopts an ultrathin oxidation tunneling layer and a polycrystalline silicon film as a passivation layer and a metal contact layer on the back of the solar cell, and a metal electrode and a heavily doped polycrystalline silicon film form ohmic contact, so that metal composite current is reduced, and the performance of the cell is improved. However, large-scale industrial production uses screen printing of silver paste or aluminum paste followed by high-temperature sintering to achieve metal-silicon contact. In the high-temperature sintering process, the metal slurry can penetrate through the polycrystalline silicon film to reach the crystalline silicon substrate, and certain influence is caused on the tunneling passivation effect of the crystalline silicon substrate. The main mode of increasing the thickness of the polycrystalline silicon film and widening the sintering window of the metal slurry is adopted, however, doped polycrystalline silicon has the problem of parasitic absorption of near infrared spectrum, and the thicker the thickness of the polycrystalline silicon is, the larger the parasitic absorption current loss is caused. Increasing the thickness of the polysilicon film, while protecting the passivation effect of the polysilicon, sacrifices some of the short circuit current.
In order to solve the problems of polysilicon burning-through and parasitic absorption at the same time, the prior patent proposes the structure and preparation method of a selective polysilicon film, for example, patent No. CN 106449800a, the yoho tenuay limited company of the Changzhou discloses a passivation contact structure of a selective polysilicon film and a preparation method thereof, and proposes the use of a chemical etching method to prepare polysilicon films with two thicknesses, wherein thicker polysilicon is reserved at the bottom of a metal contact, and thinner polysilicon is etched at the bottom of a non-metal contact. The existing preparation method has the following two problems to be improved: doped polysilicon is prepared by the same step, and the doping concentration of the polysilicon in the metal contact area and the doping concentration of the non-metal contact area cannot be selectively prepared. In fact, the doping concentration requirements of the polysilicon silicon are different between the metal contact area and the nonmetal contact area. Through our research, it is found that the doping concentration of the polysilicon is proportional to the parasitic absorption of light in the near infrared band, i.e., the doping concentration is about low, the parasitic absorption of light is less, and therefore the polysilicon with low doping concentration is required for the non-metal contact region. The doping concentration of the polysilicon in the metal contact region is inversely proportional to the ohmic contact resistance, i.e., the higher the doping concentration, the lower the ohmic contact resistance, so the polysilicon with high doping concentration is required for the metal contact region. We need to perform a selective preparation method of polysilicon with different doping concentrations; the chemical etching method has great damage to the polycrystalline silicon film, and the surface of the film is enriched with dangling bonds left by chemical etching, so that a high-quality passivation layer is needed to passivate surface defects subsequently.
Content of application
The technical problem to be solved is as follows:
the technical problems to be solved by the application are that certain influence is caused by a tunneling passivation effect, parasitic absorption is caused to a near infrared spectrum, and the like, and the preparation method of the selective polycrystalline silicon thickness and doping concentration battery structure is provided.
The technical scheme is as follows:
a method for preparing a cell structure with selective polysilicon thickness and doping concentration comprises the following steps:
firstly, cleaning a silicon wafer: cleaning a crystalline silicon substrate;
secondly, preparing a tunneling oxide layer: forming a tunneling oxide layer with the thickness of less than 2nm by adopting a nitric acid oxidation method, an ozone water oxidation method or a thermal oxidation method;
step three, preparing the polysilicon film with selective doping concentration step by step through PECVD: firstly depositing a layer of lightly doped amorphous silicon film on the tunneling oxide layer by adopting PECVD (plasma enhanced chemical vapor deposition), wherein the thickness of the amorphous silicon is controlled to be 30-100nm, and the doping concentration is controlled to be 1E 19-1E 20/cm3
The fourth step: covering the lightly doped amorphous silicon film with a mask plate made of carbon fiber or aluminum alloy, wherein the black area is a shielding area, the white area is a hollow area, the line width of the hollow area is 40-120 μm, the pattern of the hollow area of the mask plate coincides with the pattern of the back metal electrode, and continuously depositing in the hollow area of the battery by adopting a PECVD (plasma enhanced chemical vapor deposition) modeA heavily doped amorphous silicon film, the thickness of the amorphous silicon film is controlled to be 100-500nm, the doping concentration is controlled to be 1E 20-5E 20/cm3
The fifth step: annealing the silicon wafer by using an annealing furnace to crystallize the silicon wafer into a non-metal contact area light-doped polycrystalline silicon film and a metal contact area heavy-doped polycrystalline silicon film;
and a sixth step: depositing a passivation layer on the surfaces of the lightly doped polycrystalline silicon thin film in the non-metal contact area and the heavily doped polycrystalline silicon thin film in the metal contact area by adopting a PECVD or ALD mode;
the seventh step: and printing a metal electrode at the position of the metal contact area by adopting a screen printing mode and sintering.
As a preferred technical scheme of the application: and in the second step, a tunneling oxide layer with the thickness of less than 2nm is formed on the surface of the silicon wafer in an ozone water mode.
As a preferred technical scheme of the application: depositing the doped amorphous silicon film by adopting a PECVD (plasma enhanced chemical vapor deposition) mode in the third step, wherein the temperature in the deposition step is set to be 250 ℃, the radio frequency power is 400W, the silane flow is 400sccm, the flow of phosphine or borane mixed hydrogen gas is 1000sccm, the pressure is 0.4Torr, and the process time is controlled to be 15 s; the thickness of the amorphous silicon film is controlled to be 30-40nm, and the doping concentration is controlled to be 3E19atom/cm3
As a preferred technical scheme of the application: in the fourth step, a mask is covered on the surface of the lightly doped amorphous silicon film, the doped amorphous silicon film is still deposited in a PECVD mode, the temperature of the deposition step is set to be 250 ℃, the radio frequency power is 400W, the silane flow is 400sccm, the flow of phosphine or borane mixed hydrogen gas is 2500sccm, the pressure is 0.4Torr, the process time is controlled to be 70s, the thickness of the amorphous silicon film is controlled to be 120-150nm, and the doping concentration is controlled to be 2E20atom/cm3
As a preferred technical scheme of the application: and in the fifth step, annealing the silicon wafer for 30 minutes at the annealing temperature of 850 ℃.
As a preferred technical scheme of the application: and depositing a silicon nitride film passivation layer in a PECVD (plasma enhanced chemical vapor deposition) mode in the sixth step, wherein the thickness is controlled to be 70 nm.
Has the advantages that:
compared with the prior art, the preparation method of the selective polycrystalline silicon thickness and doping concentration battery structure has the following technical effects by adopting the technical scheme:
1. the polycrystalline silicon films with different thicknesses are prepared by a PECVD step deposition scheme, so that the problem of damage to the polycrystalline silicon films by a chemical etching scheme is solved;
2. the PECVD step deposition mode can selectively deposit a polycrystalline silicon film with high doping concentration in the metal contact area and deposit a polycrystalline silicon film with low doping concentration in the nonmetal contact area, so that the parasitic absorption of the polycrystalline silicon film in the nonmetal contact area to the near-infrared band spectrum is further reduced, and the short-circuit current of the battery is increased by 10%.
Drawings
FIG. 1 is a schematic view of a back side structure of a battery according to the present application;
FIG. 2 is a diagram of a mechanical mask of a PECVD apparatus of the present application;
fig. 3 is a flow chart of a method of manufacturing a battery according to the present application.
Description of reference numerals:
in fig. 1, 1-a crystalline silicon substrate, 2-a tunneling oxide layer, 3-a lightly doped polysilicon film in a non-metal contact region, 4-a heavily doped polysilicon film in a metal contact region, 5-a passivation layer, and 6-a metal electrode.
Detailed Description
The technical scheme of the invention is further explained in detail by combining the attached drawings:
it will be understood by those skilled in the art that, unless otherwise defined, all terms (including technical and scientific terms) prepared herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the prior art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
Example 1:
as shown in fig. 1, a method for preparing a cell structure with selective polysilicon thickness and doping concentration comprises the following steps: firstly, cleaning a silicon wafer: cleaning the crystalline silicon substrate 1;
secondly, preparing a tunneling oxide layer 2: forming a tunneling oxide layer 2 with the thickness of less than 2nm by adopting a nitric acid oxidation method, an ozone water oxidation method or a thermal oxidation method;
step three, preparing the polysilicon film with selective doping concentration step by step through PECVD: firstly depositing a layer of lightly doped amorphous silicon film on the tunneling oxide layer by adopting PECVD (plasma enhanced chemical vapor deposition), wherein the thickness of the amorphous silicon is controlled to be 30-100nm, and the doping concentration is controlled to be 1E 19-1E 20/cm3
The fourth step: the method comprises the following steps of covering a lightly doped amorphous silicon film with a mask plate, wherein the pattern of the mask plate is as shown in figure 2, the mask plate is made of carbon fiber materials or aluminum alloy materials, a black area is a shielding area, a white area is a hollow area, the line width of the hollow area is 40-120 mu m, and the pattern of the hollow area of the mask plate is coincident with the pattern of a back metal electrode. Continuously depositing a layer of heavily doped amorphous silicon film in the hollow area of the cell by adopting a PECVD (plasma enhanced chemical vapor deposition) mode, wherein the thickness of the amorphous silicon is controlled to be 100-500nm, and the doping concentration is controlled to be 1E 20-5E 20/cm3
The fifth step: annealing the silicon wafer by using an annealing furnace to crystallize the silicon wafer into a non-metal contact region lightly doped polycrystalline silicon film 3 and a metal contact region heavily doped polycrystalline silicon film 4;
and a sixth step: depositing a passivation layer 5 on the surfaces of the lightly doped polycrystalline silicon thin film 3 in the non-metal contact area and the heavily doped polycrystalline silicon thin film 4 in the metal contact area by adopting a PECVD or ALD mode;
the seventh step: and printing the metal electrode 6 at the position of the metal contact area by adopting a screen printing mode and sintering.
And in the second step, a tunneling oxide layer 2 with the thickness less than 2nm is formed on the surface of the crystalline silicon substrate 1 in an ozone water mode.
In the third step, a PECVD mode is adopted to deposit the doped amorphous silicon film, the temperature in the deposition step is set to be 250 ℃, the radio frequency power is 400W, the silane flow is 400sccm, and phosphane or borane is adoptedThe flow rate of the mixed hydrogen gas is 1000sccm, the pressure is 0.4Torr, and the process time is controlled to be 15 s; the thickness of the amorphous silicon film is controlled to be 30-40nm, and the doping concentration is controlled to be 3E19atom/cm3
In the fourth step, a mask is covered on the surface of the lightly doped amorphous silicon film, the doped amorphous silicon film is still deposited in a PECVD mode, the temperature of the deposition step is set to be 250 ℃, the radio frequency power is 400W, the silane flow is 400sccm, the flow of phosphine or borane mixed hydrogen gas is 2500sccm, the pressure is 0.4Torr, the process time is controlled to be 70s, the thickness of the amorphous silicon film is controlled to be 120-150nm, and the doping concentration is controlled to be 2E20atom/cm3
And in the fifth step, annealing the silicon wafer for 30 minutes at the annealing temperature of 850 ℃.
And depositing a silicon nitride film passivation layer in a PECVD (plasma enhanced chemical vapor deposition) mode in the sixth step, wherein the thickness is controlled to be 70 nm.
The deposition step of preparing amorphous silicon by PECVD has the following process parameters:
Figure BDA0002878348740000051
Figure BDA0002878348740000052
the cell structure is shown in the attached figure 1 of the specification, a tunneling oxide layer with the thickness less than 2nm is prepared on the surface of crystalline silicon, a doped polycrystalline silicon film is prepared on the surface of the tunneling layer, the doped polycrystalline silicon film has thinner thickness in a non-metal contact area and adopts low doping concentration, thicker thickness in a metal contact area and adopts high doping concentration, a passivation layer is prepared on the surface of the polycrystalline silicon film, and a metal electrode is prepared in the metal contact area.
The foregoing is only a partial embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.

Claims (6)

1. A preparation method of a selective polycrystalline silicon thickness and doping concentration battery structure is characterized by comprising the following steps:
firstly, cleaning a crystalline silicon substrate (1): cleaning a crystalline silicon substrate (1);
secondly, preparing a tunneling oxide layer (2): forming a tunneling oxide layer (2) with the thickness of less than 2nm by adopting a nitric acid oxidation method, an ozone water oxidation method or a thermal oxidation method;
step three, preparing the polysilicon film with selective doping concentration step by step through PECVD: firstly, preparing and depositing a layer of lightly doped amorphous silicon film on the tunneling oxide layer by adopting PECVD (plasma enhanced chemical vapor deposition), wherein the thickness of the amorphous silicon is controlled to be 30-100nm, and the doping concentration is controlled to be 1E 19-1E 20/cm3
The fourth step: covering the lightly doped amorphous silicon film by using a mask plate, wherein the mask plate is made of a carbon fiber material or an aluminum alloy material, the black area is a shielding area, the white area is a hollow area, the line width of the hollow area is 40-120 mu m, the graph of the hollow area of the mask plate is superposed with the graph of the back metal electrode, continuously depositing a layer of heavily doped amorphous silicon film in the hollow area of the battery by adopting a PECVD (plasma enhanced chemical vapor deposition) mode, the thickness of the amorphous silicon is controlled to be 100-500nm, and the doping concentration is controlled to be 1E 20-5E 20/cm3
The fifth step: annealing the silicon wafer by using an annealing furnace to crystallize the silicon wafer into a non-metal contact area light doped polycrystalline silicon film (3) and a metal contact area heavy doped polycrystalline silicon film (4);
and a sixth step: depositing a passivation layer (5) on the surfaces of the light doped polysilicon film (3) in the non-metal contact area and the heavy doped polysilicon film (4) in the metal contact area by adopting a PECVD or ALD mode;
the seventh step: and printing a metal electrode (6) at the position of the metal contact area by adopting a screen printing mode and sintering.
2. The method of claim 1, wherein the cell structure further comprises a polysilicon layer having a thickness and a dopant concentration, the method comprising: and in the second step, a tunneling oxide layer (2) with the thickness of less than 2nm is formed on the surface of the silicon wafer in an ozone water mode.
3. The method of claim 1, wherein the cell structure further comprises a polysilicon layer having a thickness and a dopant concentration, the method comprising: depositing the doped amorphous silicon film by adopting a PECVD (plasma enhanced chemical vapor deposition) mode in the third step, wherein the temperature in the deposition step is set to be 250 ℃, the radio frequency power is 400W, the silane flow is 400sccm, the flow of phosphine or borane mixed hydrogen gas is 1000sccm, the pressure is 0.4Torr, and the process time is controlled to be 15 s; the thickness of the amorphous silicon film is controlled to be 30-40nm, and the doping concentration is controlled to be 3E19atom/cm3
4. The method of claim 1, wherein the cell structure further comprises a polysilicon layer having a thickness and a dopant concentration, the method comprising: in the fourth step, a mask is covered on the surface of the lightly doped amorphous silicon film, the doped amorphous silicon film is still deposited in a PECVD mode, the temperature of the deposition step is set to be 250 ℃, the radio frequency power is 400W, the silane flow is 400sccm, the flow of phosphine or borane mixed hydrogen gas is 2500sccm, the pressure is 0.4Torr, the process time is controlled to be 70s, the thickness of the amorphous silicon film is controlled to be 120-150nm, and the doping concentration is controlled to be 2E20atom/cm3
5. The method of claim 1, wherein the cell structure further comprises a polysilicon layer having a thickness and a dopant concentration, the method comprising: and in the fifth step, annealing the silicon wafer for 30 minutes at the annealing temperature of 850 ℃.
6. The method of claim 1, wherein the cell structure further comprises a polysilicon layer having a thickness and a dopant concentration, the method comprising: and depositing a silicon nitride film passivation layer in a PECVD (plasma enhanced chemical vapor deposition) mode in the sixth step, wherein the thickness is controlled to be 70 nm.
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Application publication date: 20210430