CN111370539A - A kind of preparation method of solar cell with selective emitter - Google Patents

A kind of preparation method of solar cell with selective emitter Download PDF

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CN111370539A
CN111370539A CN202010196429.8A CN202010196429A CN111370539A CN 111370539 A CN111370539 A CN 111370539A CN 202010196429 A CN202010196429 A CN 202010196429A CN 111370539 A CN111370539 A CN 111370539A
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silicon substrate
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mask layer
etching
boron
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陈嘉
马丽敏
包杰
陈程
刘志锋
林建伟
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Taizhou Zhonglai Photoelectric Technology Co ltd
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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    • H10F71/00Manufacture or treatment of devices covered by this subclass
    • H10F71/10Manufacture or treatment of devices covered by this subclass the devices comprising amorphous semiconductor material
    • H10F71/103Manufacture or treatment of devices covered by this subclass the devices comprising amorphous semiconductor material including only Group IV materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00Constructional details of devices covered by this subclass
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    • H10F77/211Electrodes for devices having potential barriers for photovoltaic cells
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00Constructional details of devices covered by this subclass
    • H10F77/70Surface textures, e.g. pyramid structures
    • H10F77/703Surface textures, e.g. pyramid structures of the semiconductor bodies, e.g. textured active layers
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y02E10/50Photovoltaic [PV] energy
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract

本发明涉及一种具有选择性发射极的太阳能电池的制备方法,包括:(1)、在硅基体一面生长掩膜层作为硅基体的正面;(2)、在掩膜层上局部印刷刻蚀浆料层,并烘干;(3)、对硅基体硼扩散处理,以在不含掩膜层的区域形成重掺杂区域,含掩膜层的区域形成轻掺杂区域,从而形成正面硼选择性发射极(4)、将硅基体背面的制绒面刻蚀成平面,同时去除所述正面硼硅玻璃层;(5)、在硅基体背面生长隧穿氧化层和掺杂非晶硅层,并进行退火处理,形成掺杂多晶硅层;(6)、在硅基体背面沉积背面钝化薄膜,在硅基体正面沉积正面钝化减反膜;(7)在硅基体正面印刷正面主栅和正面副栅,在硅基体背面印刷背面主栅和背面副栅,并进行烘干处理。

Figure 202010196429

The invention relates to a method for preparing a solar cell with a selective emitter, comprising: (1) growing a mask layer on one side of a silicon substrate as the front side of the silicon substrate; (2) locally printing and etching on the mask layer (3) Diffusion treatment of boron on the silicon substrate to form a heavily doped area in the area without the mask layer, and form a lightly doped area in the area with the mask layer, so as to form the front boron Selective emitter (4), etching the textured surface on the backside of the silicon substrate into a flat surface, and removing the borosilicate glass layer on the front side at the same time; (5), growing a tunnel oxide layer and doped amorphous silicon on the backside of the silicon substrate (6) deposit a back passivation film on the back of the silicon substrate, and deposit a front passivation anti-reflection film on the front of the silicon substrate; (7) print a front busbar on the front of the silicon substrate and front sub-grid, the back busbar and back sub-grid are printed on the back of the silicon substrate, and dried.

Figure 202010196429

Description

一种具有选择性发射极的太阳能电池的制备方法A kind of preparation method of solar cell with selective emitter

技术领域technical field

本发明涉及太阳能电池技术领域,具体涉及一种具有选择性发射极的太阳能电池的制备方法。The invention relates to the technical field of solar cells, in particular to a preparation method of a solar cell with a selective emitter.

背景技术Background technique

太阳能电池是将太阳能转化为电能的基础器件。随着太阳能电池的不断进步,高效降本已经成为当前太阳能电池产业化发展的重要方向,高效结构设计和提高制造良率是实现这一目标的关键。其中选择性发射极结构由于其独特的技术优势被广泛研究和使用。选择性发射极技术是在电池的电极下面进行重掺杂,在非金属接触的发射极区域进行浅掺杂,这一技术,不仅可以降低扩散层少子复合速率,提高电池的短波响应和开路电压,还可以降低电池的串联电阻,改善电池短路电流和填充因子,从而提高转换效率。Solar cells are basic devices that convert solar energy into electrical energy. With the continuous progress of solar cells, high efficiency and cost reduction have become an important direction for the current industrialization of solar cells. High-efficiency structural design and improvement of manufacturing yield are the keys to achieve this goal. Among them, the selective emitter structure has been widely studied and used due to its unique technical advantages. Selective emitter technology is to perform heavy doping under the electrode of the battery and shallow doping in the non-metallic contact emitter region. This technology can not only reduce the rate of minority carrier recombination in the diffusion layer, but also improve the short-wave response and open-circuit voltage of the battery. , it can also reduce the series resistance of the battery, improve the short-circuit current and fill factor of the battery, and thus improve the conversion efficiency.

常见的硼掺杂选择性发射极的制备方法为两次扩散法,该方法是通过先高温沉积硼源,接着用激光进行掺杂,清洗后再进行高温氧化,从而形成选择性发射极,硅基体会两次进入高温硼扩炉管,对硅基体造成高温损伤,此外,激光掺杂也会引入激光损伤。另外,硼掺杂的选择性发射极的制备方法还有湿化学刻蚀法,该方法是先制备深结硼扩散,再在硼扩面制备图形化的掩膜,掩膜后利用刻蚀浆料将没有掩膜的区域刻蚀成轻掺杂区,形成选择性发射极,该方法利用化学腐蚀浆料直接对硼扩区进行刻蚀,会破坏表面的金字塔结构,使反射率升高,引起电流损失。The common preparation method of boron-doped selective emitter is the double diffusion method. This method is to deposit a boron source at a high temperature, then dope it with a laser, and then perform high-temperature oxidation after cleaning to form a selective emitter. The substrate will enter the high-temperature boron expansion furnace twice, causing high-temperature damage to the silicon substrate. In addition, laser doping will also introduce laser damage. In addition, the preparation method of boron-doped selective emitter also includes wet chemical etching method. This method is to first prepare deep junction boron diffusion, and then prepare a patterned mask on the boron expanded surface, and use etching slurry after the mask. The area without mask is etched into a lightly doped area to form a selective emitter. This method uses chemical etching slurry to directly etch the boron expansion area, which will destroy the pyramid structure on the surface and increase the reflectivity. cause current loss.

鉴于此,提供一种工艺过程简单、耗时短、成本低的具有选择性发射极的太阳能电池的制备方法十分必要。In view of this, it is very necessary to provide a method for preparing a solar cell with a selective emitter with simple process, short time-consuming and low cost.

发明内容SUMMARY OF THE INVENTION

本发明的目的在于克服现有技术的不足,提供一种工艺过程简单、耗时短和成本低、且能精确具有选择性发射极的太阳能电池的制备方法。The purpose of the present invention is to overcome the deficiencies of the prior art, and to provide a method for preparing a solar cell with a simple process, short time-consuming and low cost, and capable of precisely having a selective emitter.

本发明的一种具有选择性发射极的太阳能电池的制备方法,其技术方案为:包括以下步骤:A preparation method of a solar cell with a selective emitter of the present invention, the technical scheme is as follows: comprising the following steps:

(1)、在双面制绒处理后的硅基体任意一面生长掩膜层,该生长掩膜层的一面作为硅基体的正面;(1), a mask layer is grown on any side of the silicon substrate after the double-sided texturing treatment, and one side of the growth mask layer is used as the front side of the silicon substrate;

(2)、在硅基体正面的所述掩膜层上局部印刷刻蚀浆料层,并烘干;在烘干过程中,所述刻蚀浆料层与掩膜层发生反应,使得印刷刻蚀浆料层区域的掩膜层被刻蚀掉,未印刷刻蚀浆料层区域的掩膜层被保留;其中,所述刻蚀浆料层仅与所述掩膜层进行反应;(2), partially print the etching slurry layer on the mask layer on the front side of the silicon substrate, and dry it; during the drying process, the etching slurry layer reacts with the mask layer, so that the printing etching The mask layer in the area of the etching paste layer is etched away, and the mask layer in the area where the etching paste layer is not printed is retained; wherein, the etching paste layer only reacts with the mask layer;

(3)、对硅基体进行硼扩散处理,以在不含掩膜层的区域形成重掺杂区域,含掩膜层的区域形成轻掺杂区域,从而形成正面硼选择性发射极;在硼扩散过程中,所述轻掺杂区域和重掺杂区域上会覆盖硼硅玻璃层,形成正面硼硅玻璃层,同时部分掺杂源绕扩到背面边缘区域,形成背面硼硅玻璃层;(3), perform boron diffusion treatment on the silicon substrate to form a heavily doped region in the region without the mask layer, and form a lightly doped region in the region containing the mask layer, thereby forming a front boron selective emitter; During the diffusion process, the lightly doped region and the heavily doped region will be covered with a borosilicate glass layer to form a front borosilicate glass layer, and at the same time some doping sources are extended to the back edge region to form a back borosilicate glass layer;

(4)、将硅基体背面的制绒面刻蚀成平面,同时去除所述正面硼硅玻璃层;(4), etching the textured surface on the back of the silicon substrate into a plane, while removing the front borosilicate glass layer;

(5)、在硅基体背面生长隧穿氧化层和掺杂非晶硅层,并进行退火处理,以将硅基体背面的掺杂原子激活,完成晶化,形成掺杂多晶硅层;(5), growing a tunnel oxide layer and a doped amorphous silicon layer on the back of the silicon substrate, and performing annealing treatment to activate the doping atoms on the back of the silicon substrate, complete crystallization, and form a doped polysilicon layer;

(6)、在硅基体背面沉积背面钝化薄膜,在硅基体正面沉积正面钝化减反膜;(6), deposit the back passivation film on the back of the silicon substrate, and deposit the front passivation anti-reflection film on the front of the silicon substrate;

(7)在硅基体正面印刷正面主栅和正面副栅,在硅基体背面印刷背面主栅和背面副栅,并进行烘干处理。(7) printing the front busbar and the front subgrid on the front of the silicon substrate, printing the back busbar and the back subgrid on the backside of the silicon substrate, and performing drying treatment.

本发明提供的一种具有选择性发射极的太阳能电池的制备方法,还包括如下附属技术方案:A preparation method of a solar cell with a selective emitter provided by the present invention also includes the following subsidiary technical solutions:

其中,在步骤(2)中,局部印刷的所述刻蚀浆料层的印刷图形与正面副栅图形相同。Wherein, in step (2), the printing pattern of the partially printed etching paste layer is the same as the pattern of the front sub-grid.

其中,在步骤(3)之前,所述方法还包括:Wherein, before step (3), the method also includes:

(3)’,对步骤(2)处理后的硅基体进行清洗,以去除刻蚀浆料层、以及刻蚀浆料层下方的掩膜层。(3)', cleaning the silicon substrate processed in step (2) to remove the etching slurry layer and the mask layer below the etching slurry layer.

其中,在步骤(2)中,所述掩膜层为SiO2介质膜或SiNX介质膜,或SiO2与SiNX形成的叠层膜,其厚度为20-100nm,制备方法为PECVD或ALD。Wherein, in step (2), the mask layer is a SiO 2 dielectric film or a SiN X dielectric film, or a laminated film formed by SiO 2 and SiN X , the thickness of which is 20-100 nm, and the preparation method is PECVD or ALD .

其中,在步骤(3)中,硼扩散的硼源为三溴化硼,扩散温度为900~1070℃,扩散时间为90~240min,扩散后的方阻值为50~200Ω/sqr。Wherein, in step (3), the boron source for boron diffusion is boron tribromide, the diffusion temperature is 900-1070°C, the diffusion time is 90-240min, and the square resistance value after diffusion is 50-200Ω/sqr.

其中,在步骤(3)’中,对步骤(2)处理后的硅基体采用清水进行清洗,以去除刻蚀浆料层、以及刻蚀浆料层下方的掩膜层,清水温度为40-80℃。Wherein, in step (3)', the silicon substrate processed in step (2) is cleaned with clean water to remove the etching slurry layer and the mask layer below the etching slurry layer, and the temperature of the clean water is 40- 80°C.

其中,在步骤(5)中;所述隧穿氧化层采用二氧化硅制作,其厚度为0.5~2nm,制备方式为硝酸氧化法、高温热氧化法、臭氧氧化法或原子层沉积法;Wherein, in step (5); the tunnel oxide layer is made of silicon dioxide, and its thickness is 0.5-2 nm, and the preparation method is nitric acid oxidation method, high temperature thermal oxidation method, ozone oxidation method or atomic layer deposition method;

其中,当制备方式为高温热氧化法时,在常压、纯氧、温度500~700℃条件下,反应10~20min;Wherein, when the preparation method is a high temperature thermal oxidation method, the reaction is carried out for 10 to 20 minutes under the conditions of normal pressure, pure oxygen, and a temperature of 500 to 700 °C;

当制备方式为硝酸氧化法时,采用质量分数为60~68%的硝酸溶液,在80~100℃的反应温度下,反应4~10min。When the preparation method is a nitric acid oxidation method, a nitric acid solution with a mass fraction of 60-68% is used, and the reaction is carried out at a reaction temperature of 80-100° C. for 4-10 minutes.

其中,在步骤(5)中,在硅基体背表面生长掺杂非晶硅层的方式为磁控溅射法,将硅基体置于氩气氛围中,调整反应气压为0.1~0.7Pa,反应温度为100~300℃,反应10min~3h。Wherein, in step (5), the method of growing the doped amorphous silicon layer on the back surface of the silicon substrate is a magnetron sputtering method, placing the silicon substrate in an argon atmosphere, adjusting the reaction pressure to 0.1-0.7Pa, and reacting The temperature is 100~300℃, and the reaction is performed for 10min~3h.

其中,所述正面钝化减反膜是SiO2、SiNX或Al2O3介质膜中的一种或任几种的组合,背面钝化减反膜是SiO2、SiNX介质膜中的一种或任几种的组合。Wherein, the front passivation anti-reflection film is one or any combination of SiO 2 , SiN X or Al 2 O 3 dielectric films, and the back passivation anti-reflection film is one of SiO 2 , SiN X dielectric films one or any combination.

其中,在步骤(7)中,采用掺铝银浆印刷正面主栅和正面副栅,采用银浆印刷背面主栅和背面副栅;其中,背面副栅线宽为35~90um,互相平行设置;正面副栅线宽为30~90um,互相平行设置。Wherein, in step (7), the front main grid and the front sub grid are printed with aluminum-doped silver paste, and the back main grid and the rear sub grid are printed with silver paste; wherein, the back sub grid line width is 35-90um, which are arranged parallel to each other ; The width of the front auxiliary grid is 30~90um, and they are arranged parallel to each other.

本发明的实施包括以下技术效果:The implementation of the present invention includes the following technical effects:

本发明采用一次硼扩散形成选择性发射极,避免了两次扩散法形成选择性发射极的方法,两次高温扩散对硅基体的高温损伤,提高硅基体的少子寿命,同时也简化了工艺,缩减了工序提高产能。此外,本发明使用选择性刻蚀浆料对掩膜进行刻蚀,避免了常用的化学刻蚀法直接刻蚀发射极,形成选择性发射极时对硅基体金字塔绒面的直接损伤,能够有效避免因金字塔绒面损伤带来的反射率增加,从而提高太阳能电池的电流,提高效率,同时也避免了化学刻蚀的刻蚀速率不易控制的缺点。The invention adopts one-time boron diffusion to form the selective emitter, avoids the method of forming the selective emitter by the double diffusion method, and the high-temperature damage to the silicon substrate caused by the two high-temperature diffusions, improves the minority carrier lifetime of the silicon substrate, and simplifies the process at the same time. Reduced processes and increased productivity. In addition, the present invention uses the selective etching slurry to etch the mask, avoids the direct etching of the emitter by the commonly used chemical etching method, and the direct damage to the textured surface of the silicon base pyramid when the selective emitter is formed, which can effectively The increase in reflectivity caused by the damage of the pyramid texture is avoided, thereby increasing the current of the solar cell and improving the efficiency, and at the same time avoiding the disadvantage that the etching rate of chemical etching is not easy to control.

附图说明Description of drawings

图1为本发明实施例的一种具有选择性发射极的太阳能电池的制备方法步骤(1)’后的电池结构截面示意图。Fig. 1 is a schematic cross-sectional view of the cell structure after step (1)' of a method for preparing a solar cell with a selective emitter according to an embodiment of the present invention.

图2为本发明实施例的一种具有选择性发射极的太阳能电池的制备方法步骤(1)后的电池结构截面示意图。2 is a schematic cross-sectional view of the cell structure after step (1) of a method for preparing a solar cell with a selective emitter according to an embodiment of the present invention.

图3为本发明实施例的一种具有选择性发射极的太阳能电池的制备方法步骤(2)后的电池结构截面示意图。3 is a schematic cross-sectional view of the cell structure after step (2) of a method for preparing a solar cell with a selective emitter according to an embodiment of the present invention.

图4为本发明实施例的一种具有选择性发射极的太阳能电池的制备方法步骤(3)’后的电池结构截面示意图。Fig. 4 is a schematic cross-sectional view of the cell structure after step (3)' of a method for preparing a solar cell with a selective emitter according to an embodiment of the present invention.

图5为本发明实施例的一种具有选择性发射极的太阳能电池的制备方法步骤(3)后的电池结构截面示意图。5 is a schematic cross-sectional view of the cell structure after step (3) of a method for preparing a solar cell with a selective emitter according to an embodiment of the present invention.

图6为本发明实施例的一种具有选择性发射极的太阳能电池的制备方法步骤(4)后的电池结构截面示意图。6 is a schematic cross-sectional view of the cell structure after step (4) of a method for preparing a solar cell with a selective emitter according to an embodiment of the present invention.

图7为本发明实施例的一种具有选择性发射极的太阳能电池的制备方法步骤(5)中制备完超薄隧穿氧化层后的电池结构截面示意图。7 is a schematic cross-sectional view of the cell structure after the ultra-thin tunnel oxide layer is prepared in step (5) of a method for preparing a solar cell with a selective emitter according to an embodiment of the present invention.

图8为本发明实施例的一种具有选择性发射极的太阳能电池的制备方法步骤(5)中制备完掺杂的非晶硅层后的电池结构截面示意图。8 is a schematic cross-sectional view of the cell structure after the doped amorphous silicon layer is prepared in step (5) of a method for preparing a solar cell with a selective emitter according to an embodiment of the present invention.

图9为本发明实施例的一种具有选择性发射极的太阳能电池的制备方法步骤(5)中退火处理后的电池结构截面示意图。9 is a schematic cross-sectional view of the cell structure after annealing in step (5) of a method for preparing a solar cell with a selective emitter according to an embodiment of the present invention.

图10为本发明实施例的一种具有选择性发射极的太阳能电池的制备方法步骤(6)后的电池结构截面示意图。10 is a schematic cross-sectional view of the cell structure after step (6) of a method for preparing a solar cell with a selective emitter according to an embodiment of the present invention.

图11为本发明实施例的一种具有选择性发射极的太阳能电池的制备方法步骤(7)后的电池结构截面示意图。11 is a schematic cross-sectional view of the cell structure after step (7) of a method for preparing a solar cell with a selective emitter according to an embodiment of the present invention.

图中,1-N型晶体硅基体,2-掩膜层,3-刻蚀浆料层,41-轻掺杂区域,42-重掺杂区域,5-BSG硼硅玻璃层,6-超薄隧穿氧化层,7-掺杂的非晶硅层,8-掺杂的多晶硅层,9-背面钝化薄膜,10-正面钝化减反膜,11-正面副栅,12-背面副栅。In the figure, 1-N-type crystalline silicon substrate, 2-mask layer, 3-etching paste layer, 41-lightly doped region, 42-heavy doped region, 5-BSG borosilicate glass layer, 6-super Thin tunneling oxide layer, 7-doped amorphous silicon layer, 8-doped polysilicon layer, 9-back passivation film, 10-front passivation anti-reflection film, 11-front sub-gate, 12-back sub grid.

具体实施方式Detailed ways

下面结合实例对本发明进行详细的说明。The present invention will be described in detail below with reference to examples.

具体实施例仅仅是对本发明的解释,并不是对本发明的限制,本领域技术人员在阅读完本说明书后可以根据需要对本实施例做出没有创造性贡献的修改,但只要在本发明的权利要求范围内都受到保护。The specific embodiment is only an explanation of the present invention, not a limitation of the present invention. Those skilled in the art can make modifications without creative contribution to the present embodiment as required after reading this specification, but only within the scope of the claims of the present invention are protected inside.

本发明的一种具有选择性发射极的太阳能电池的制备方法,A preparation method of a solar cell with a selective emitter of the present invention,

包括以下步骤:Include the following steps:

(1)、在双面制绒处理后的硅基体任意一面生长掩膜层,该生长掩膜层的一面作为硅基体的正面;(1), a mask layer is grown on any side of the silicon substrate after the double-sided texturing treatment, and one side of the growth mask layer is used as the front side of the silicon substrate;

(2)、在硅基体正面的所述掩膜层上局部印刷刻蚀浆料层,并烘干;在烘干过程中,所述刻蚀浆料层与掩膜层发生反应,使得印刷刻蚀浆料层区域的掩膜层被刻蚀掉,未印刷刻蚀浆料层区域的掩膜层被保留;其中,所述刻蚀浆料层仅与所述掩膜层进行反应;(2), partially print the etching slurry layer on the mask layer on the front side of the silicon substrate, and dry it; during the drying process, the etching slurry layer reacts with the mask layer, so that the printing etching The mask layer in the area of the etching paste layer is etched away, and the mask layer in the area where the etching paste layer is not printed is retained; wherein, the etching paste layer only reacts with the mask layer;

(3)、对硅基体进行硼扩散处理,以在不含掩膜层的区域形成重掺杂区域,含掩膜层的区域形成轻掺杂区域,从而形成正面硼选择性发射极;在硼扩散过程中,所述轻掺杂区域和重掺杂区域上会覆盖硼硅玻璃层,形成正面硼硅玻璃层,同时部分掺杂源绕扩到背面边缘区域,形成背面硼硅玻璃层;(3), perform boron diffusion treatment on the silicon substrate to form a heavily doped region in the region without the mask layer, and form a lightly doped region in the region containing the mask layer, thereby forming a front boron selective emitter; During the diffusion process, the lightly doped region and the heavily doped region will be covered with a borosilicate glass layer to form a front borosilicate glass layer, and at the same time some doping sources are extended to the back edge region to form a back borosilicate glass layer;

(4)、将硅基体背面的制绒面刻蚀成平面,同时去除所述正面硼硅玻璃层;(4), etching the textured surface on the back of the silicon substrate into a plane, while removing the front borosilicate glass layer;

(5)、在硅基体背面生长隧穿氧化层和掺杂非晶硅层,并进行退火处理,以将硅基体背面的掺杂原子激活,完成晶化,形成掺杂多晶硅层;(5), growing a tunnel oxide layer and a doped amorphous silicon layer on the back of the silicon substrate, and performing annealing treatment to activate the doping atoms on the back of the silicon substrate, complete crystallization, and form a doped polysilicon layer;

(6)、在硅基体背面沉积背面钝化薄膜,在硅基体正面沉积正面钝化减反膜;(6), deposit the back passivation film on the back of the silicon substrate, and deposit the front passivation anti-reflection film on the front of the silicon substrate;

(7)在硅基体正面印刷正面主栅和正面副栅,在硅基体背面印刷背面主栅和背面副栅,并进行烘干处理。(7) printing the front busbar and the front subgrid on the front of the silicon substrate, printing the back busbar and the back subgrid on the backside of the silicon substrate, and performing drying treatment.

在一个实施例中,在步骤(1)中,N型晶体硅基体的电阻率为1~5Ω·cm,厚度为80~200μm。In one embodiment, in step (1), the resistivity of the N-type crystalline silicon substrate is 1˜5 Ω·cm, and the thickness is 80˜200 μm.

在一个实施例中,在步骤(2)中,局部印刷的所述刻蚀浆料层的印刷图形与正面副栅图形相同。In one embodiment, in step (2), the printing pattern of the partially printed etching paste layer is the same as the front sub-grid pattern.

优选地,在步骤(3)之前,所述方法还包括:Preferably, before step (3), the method further comprises:

(3)’,对步骤(2)处理后的硅基体进行清洗,以去除刻蚀浆料层、以及刻蚀浆料层下方的掩膜层。(3)', cleaning the silicon substrate processed in step (2) to remove the etching slurry layer and the mask layer below the etching slurry layer.

在一个实施例中,在步骤(2)中,所述掩膜层为SiO2介质膜或SiNX介质膜,或SiO2与SiNX形成的叠层膜,其厚度为20-100nm,制备方法为PECVD或ALD。In one embodiment, in step (2), the mask layer is a SiO 2 dielectric film or a SiN X dielectric film, or a laminated film formed by SiO 2 and SiN X , the thickness of which is 20-100 nm. Preparation method For PECVD or ALD.

在一个实施例中,在步骤(3)中,硼扩散的硼源为三溴化硼,扩散温度为900~1070℃,扩散时间为90~240min,扩散后的方阻值为50~200Ω/sqr。In one embodiment, in step (3), the boron source for boron diffusion is boron tribromide, the diffusion temperature is 900-1070°C, the diffusion time is 90-240min, and the square resistance after diffusion is 50-200Ω/ sqr.

在一个实施例中,在步骤(3)’中,对步骤(2)处理后的硅基体采用清水进行清洗,以去除刻蚀浆料层、以及刻蚀浆料层下方的掩膜层,清水温度为40-80℃。In one embodiment, in step (3)', clean water is used to clean the silicon substrate processed in step (2) to remove the etching slurry layer and the mask layer under the etching slurry layer. The temperature is 40-80°C.

在一个实施例中,在步骤(5)中,高温退火的温度为800-1000℃,时间为20-120min。In one embodiment, in step (5), the high temperature annealing temperature is 800-1000° C., and the time is 20-120 min.

在一个实施例中,在步骤(5)中;所述隧穿氧化层采用二氧化硅制作,其厚度为0.5~2nm,制备方式为硝酸氧化法、高温热氧化法、臭氧氧化法或原子层沉积法;In one embodiment, in step (5); the tunnel oxide layer is made of silicon dioxide, the thickness is 0.5-2 nm, and the preparation method is nitric acid oxidation, high temperature thermal oxidation, ozone oxidation or atomic layer deposition method;

其中,当制备方式为高温热氧化法时,在常压、纯氧、温度500~700℃条件下,反应10~20min;Wherein, when the preparation method is a high temperature thermal oxidation method, the reaction is carried out for 10 to 20 minutes under the conditions of normal pressure, pure oxygen, and a temperature of 500 to 700 °C;

当制备方式为硝酸氧化法时,采用质量分数为60~68%的硝酸溶液,在80~100℃的反应温度下,反应4~10min。When the preparation method is a nitric acid oxidation method, a nitric acid solution with a mass fraction of 60-68% is used, and the reaction is carried out at a reaction temperature of 80-100° C. for 4-10 minutes.

在一个实施例中,在步骤(5)中,在硅基体背表面生长掺杂非晶硅层的方式为磁控溅射法,将硅基体置于氩气氛围中,调整反应气压为0.1~0.7Pa,反应温度为100~300℃,反应10min~3h。In one embodiment, in step (5), the method of growing the doped amorphous silicon layer on the back surface of the silicon substrate is a magnetron sputtering method, the silicon substrate is placed in an argon atmosphere, and the reaction pressure is adjusted to 0.1~ 0.7Pa, the reaction temperature is 100~300℃, and the reaction is carried out for 10min~3h.

在一个实施例中,所述正面钝化减反膜是SiO2、SiNX或Al2O3介质膜中的一种或任几种的组合,背面钝化减反膜是SiO2、SiNX介质膜中的一种或任几种的组合。In one embodiment, the front passivation anti-reflection film is one or a combination of any of SiO 2 , SiN X or Al 2 O 3 dielectric films, and the back passivation anti-reflection film is SiO 2 , SiN X One or any combination of dielectric films.

在一个实施例中,在步骤(7)中,采用掺铝银浆印刷正面主栅和正面副栅,采用银浆印刷背面主栅和背面副栅;在一个实施例中,背面副栅线宽为35~90um,互相平行设置;正面副栅线宽为30~90um,互相平行设置。In one embodiment, in step (7), the front busbar and the front subgrid are printed with aluminum-doped silver paste, and the rear busbar and the rear subgrid are printed with silver paste; It is 35~90um, and it is set parallel to each other; the width of the front auxiliary grid is 30~90um, and it is set parallel to each other.

可选地,在步骤(1)之前,所述方法还包括:Optionally, before step (1), the method further includes:

步骤(1)’、选择N型晶体硅基体,并对N型晶体硅基体进行两面制绒处理。Step (1)', selecting an N-type crystalline silicon substrate, and performing texturing on both sides of the N-type crystalline silicon substrate.

本发明采用一次硼扩散形成选择性发射极,避免了两次扩散法形成选择性发射极的方法,两次高温扩散对硅基体的高温损伤,提高硅基体的少子寿命,同时也简化了工艺,缩减了工序提高产能。此外,本发明使用选择性刻蚀浆料对掩膜进行刻蚀,避免了常用的化学刻蚀法直接刻蚀发射极,形成选择性发射极时对硅基体金字塔绒面的直接损伤,能够有效避免因金字塔绒面损伤带来的反射率增加,从而提高太阳能电池的电流,提高效率,同时也避免了化学刻蚀的刻蚀速率不易控制的缺点。The invention adopts one-time boron diffusion to form the selective emitter, avoids the method of forming the selective emitter by the double diffusion method, and the high-temperature damage to the silicon substrate caused by the two high-temperature diffusions, improves the minority carrier lifetime of the silicon substrate, and simplifies the process at the same time. Reduced processes and increased productivity. In addition, the present invention uses the selective etching slurry to etch the mask, avoids the direct etching of the emitter by the commonly used chemical etching method, and the direct damage to the textured surface of the silicon base pyramid when the selective emitter is formed, which can effectively The increase in reflectivity caused by the damage of the pyramid texture is avoided, thereby increasing the current of the solar cell and improving the efficiency, and at the same time avoiding the disadvantage that the etching rate of chemical etching is not easy to control.

下面将以具体的实施例对发明的制备方法进行详细地说明。The preparation method of the invention will be described in detail below with specific examples.

实施例1Example 1

步骤(1)’、选择N型晶体硅基体1,并对N型晶体硅基体1进行双面制绒处理;其中,N型晶体硅基体1的电阻率为5Ω·cm;N型晶体硅基体1的厚度为170μm。完成本步骤后的电池结构如图1所示。Step (1)', selecting an N-type crystalline silicon substrate 1, and performing double-sided texturing treatment on the N-type crystalline silicon substrate 1; wherein, the resistivity of the N-type crystalline silicon substrate 1 is 5 Ω·cm; 1 has a thickness of 170 μm. The battery structure after this step is completed is shown in FIG. 1 .

步骤(1)、将步骤(1)’处理后的N型晶体硅基体1,选择其中任一面,利用PECVD的方式生长掩膜层2。其中,掩膜层2的制作材料为SiO2,厚度为20nm。完成本步骤后的电池结构如图2所示。In step (1), select any surface of the N-type crystalline silicon substrate 1 processed in step (1)', and grow a mask layer 2 by PECVD. Wherein, the fabrication material of the mask layer 2 is SiO 2 , and the thickness is 20 nm. The battery structure after this step is completed is shown in FIG. 2 .

步骤(2)、在步骤(1)处理后的N型晶体硅基体1的掩膜层2上局部印刷图形化的刻蚀浆料层3,印刷图形与金属化图形的细栅相同,该刻蚀浆料仅与掩膜反应,对金字塔绒面不造成损伤。完成本步骤后的电池结构如图3所示。In step (2), a patterned etching slurry layer 3 is locally printed on the mask layer 2 of the N-type crystalline silicon substrate 1 processed in step (1). The printing pattern is the same as the fine gate of the metallized pattern. The etching paste only reacts with the mask and does not cause damage to the pyramid texture. The battery structure after this step is completed is shown in FIG. 3 .

步骤(3)’、将步骤(2)处理后的N型晶体硅基体放入50℃的热水中进行清洗浆料,将印刷的刻蚀浆料层3清洗掉,同时浆料下方的掩膜层2被腐蚀掉。完成本步骤后的电池结构如图4所示。Step (3)', put the N-type crystalline silicon substrate processed in step (2) into hot water at 50° C. to clean the slurry, clean the printed etching slurry layer 3, and at the same time the mask under the slurry is removed. Film 2 is etched away. The battery structure after this step is completed is shown in FIG. 4 .

步骤(3)、将步骤(3)’处理后的N型晶体硅基体放入硼扩散炉进行扩散,扩散方式为单面扩散,有掩膜的区域形成轻掺杂区域41,没有掩膜的区域形成重掺杂区域42。其中,硼扩散的源为三溴化硼,扩散温度为1020℃,扩散时间为240min,轻掺杂区域方阻200Ω/sqr,重掺杂区域方阻50Ω/sqr。且轻掺杂区域和重掺杂区域上覆盖一层BSG硼硅玻璃层5,部分掺杂源绕扩到背面,形成BSG硼硅玻璃层5。完成本步骤后的电池结构如图5所示。In step (3), the N-type crystalline silicon substrate processed in step (3)' is put into a boron diffusion furnace for diffusion, and the diffusion method is single-sided diffusion. The regions form heavily doped regions 42 . Among them, the source of boron diffusion is boron tribromide, the diffusion temperature is 1020°C, the diffusion time is 240min, the square resistance of the lightly doped area is 200Ω/sqr, and the square resistance of the heavily doped area is 50Ω/sqr. In addition, the lightly doped region and the heavily doped region are covered with a BSG borosilicate glass layer 5 , and part of the doping source is extended to the back surface to form the BSG borosilicate glass layer 5 . The battery structure after this step is completed is shown in FIG. 5 .

步骤(4)、将步骤(3)处理后的N型晶体硅基体的背面进行刻蚀处理,在背面形成平坦的表面形貌,同时将正面的BSG硼硅玻璃层5和掩膜层2去除。完成本步骤后的电池结构如图6所示。In step (4), the backside of the N-type crystalline silicon substrate treated in step (3) is etched to form a flat surface morphology on the backside, and the BSG borosilicate glass layer 5 and the mask layer 2 on the front side are removed at the same time . The battery structure after this step is completed is shown in FIG. 6 .

步骤(5)、在步骤(4)处理后的N型晶体硅基体的背表面生长一层超薄隧穿氧化层6,该超薄隧穿氧化层的成分为二氧化硅,二氧化硅的制备方法为热氧化,该二氧化硅层厚度为2nm;完成本步骤后的电池结构如图7所示。然后在超薄隧穿氧化层6的外面利用PVD的方法,沉积一层掺杂的非晶硅层7,具体地,将硅基体置于氩气氛围中,调整反应气压为0.1Pa,反应时间为50min,反应温度为300℃,完成本步骤后的电池结构如图8所示。最后对N型晶体硅基体1进行退火处理,将背面的掺杂原子激活完成晶化,形成掺杂的多晶硅层8,退火温度为800℃,退火时间为40min,完成本步骤后的电池结构如图9所示。In step (5), an ultra-thin tunneling oxide layer 6 is grown on the back surface of the N-type crystalline silicon substrate processed in step (4). The composition of the ultra-thin tunneling oxide layer is silicon dioxide. The preparation method is thermal oxidation, and the thickness of the silicon dioxide layer is 2 nm; the battery structure after this step is completed is shown in FIG. 7 . Then, a layer of doped amorphous silicon layer 7 is deposited on the outside of the ultra-thin tunnel oxide layer 6 by PVD. Specifically, the silicon substrate is placed in an argon atmosphere, the reaction pressure is adjusted to 0.1Pa, and the reaction time is 50 min, the reaction temperature is 300 °C, and the battery structure after this step is completed is shown in FIG. 8 . Finally, the N-type crystalline silicon substrate 1 is annealed to activate the dopant atoms on the backside to complete crystallization to form a doped polysilicon layer 8. The annealing temperature is 800°C and the annealing time is 40min. The battery structure after this step is as follows: shown in Figure 9.

(6)、将步骤(5)处理后的N型晶体硅基体1的背面沉积一层氮化硅钝化薄膜9,膜厚120nm,在其正面沉积一层氧化铝和氮化硅的叠层膜10。完成本步骤后的电池结构如图10所示。(6), deposit a layer of silicon nitride passivation film 9 on the back of the N-type crystalline silicon substrate 1 processed in step (5), with a film thickness of 120 nm, and deposit a layer of aluminum oxide and silicon nitride on the front side of the stack. membrane 10. The battery structure after this step is completed is shown in FIG. 10 .

(7)、将步骤(6)处理后的N型晶体硅基体1,首先在背表面使用银浆印刷背面主栅和背面副栅并进行烘干,其中背面副栅12线宽45um,互相平行。在N型晶体硅基体1的正表面使用掺铝银浆印刷正面主栅和正面副栅11,其中正面副栅11线宽45um且互相平行;完成本步骤后的电池结构如图11所示。然后将N型晶体硅基体1传送入带式烧结炉进行烧结,烧结峰值温度为800℃,至此完成具有硼掺杂选择性发射极的太阳能电池的制备。(7), the N-type crystalline silicon substrate 1 processed in step (6), first use silver paste to print the back main grid and the back sub grid on the back surface and dry, wherein the back sub grid 12 has a line width of 45um and is parallel to each other . The front busbar and the front subgrid 11 are printed on the front surface of the N-type crystalline silicon substrate 1 using Al-doped silver paste, wherein the front subgrid 11 has a line width of 45um and is parallel to each other; the battery structure after this step is shown in FIG. 11 . Then, the N-type crystalline silicon substrate 1 is transferred into a belt sintering furnace for sintering, and the sintering peak temperature is 800° C., thus completing the preparation of a solar cell with a boron-doped selective emitter.

实施例2Example 2

步骤(1)’、选择N型晶体硅基体1,并对N型晶体硅基体1进行双面制绒处理;其中,N型晶体硅基体1的电阻率为1Ω·cm;N型晶体硅基体1的厚度为100μm。完成本步骤后的电池结构如图1所示。Step (1)', selecting an N-type crystalline silicon substrate 1, and performing double-sided texturing treatment on the N-type crystalline silicon substrate 1; wherein, the resistivity of the N-type crystalline silicon substrate 1 is 1Ω·cm; the N-type crystalline silicon substrate 1 1 has a thickness of 100 μm. The battery structure after this step is completed is shown in FIG. 1 .

步骤(1)、将步骤(1)’处理后的N型晶体硅基体1,选择其中任一面,利用PECVD的方式生长掩膜层2。其中,掩膜层2的制作材料为SiNX,厚度为50nm。完成本步骤后的电池结构如图2所示。In step (1), select any surface of the N-type crystalline silicon substrate 1 processed in step (1)', and grow a mask layer 2 by PECVD. Wherein, the fabrication material of the mask layer 2 is SiN X , and the thickness is 50 nm. The battery structure after this step is completed is shown in FIG. 2 .

步骤(2)、在步骤(1)处理后的N型晶体硅基体1的掩膜层2上局部印刷图形化的刻蚀浆料层3,印刷图形与金属化图形的细栅相同,该刻蚀浆料仅与掩膜反应,对金字塔绒面不造成损伤。完成本步骤后的电池结构如图3所示。In step (2), a patterned etching slurry layer 3 is locally printed on the mask layer 2 of the N-type crystalline silicon substrate 1 processed in step (1). The printing pattern is the same as the fine gate of the metallized pattern. The etching paste only reacts with the mask and does not cause damage to the pyramid texture. The battery structure after this step is completed is shown in FIG. 3 .

步骤(3)’、将步骤(2)处理后的N型晶体硅基体放入40℃的热水中进行清洗浆料,将印刷的刻蚀浆料层3清洗掉,同时浆料下方的掩膜层2被腐蚀掉。完成本步骤后的电池结构如图4所示。Step (3)', put the N-type crystalline silicon substrate processed in step (2) into hot water at 40° C. to clean the slurry, clean the printed etching slurry layer 3, and at the same time, the mask under the slurry is removed. Film 2 is etched away. The battery structure after this step is completed is shown in FIG. 4 .

步骤(3)、将步骤(3)’处理后的N型晶体硅基体放入硼扩散炉进行扩散,扩散方式为单面扩散,有掩膜的区域形成轻掺杂区域41,没有掩膜的区域形成重掺杂区域42。其中,硼扩散的源为三溴化硼,扩散温度为900℃,扩散时间为90min,轻掺杂区域方阻50Ω/sqr,重掺杂区域方阻50Ω/sqr。在硼扩散过程中,且轻掺杂区域和重掺杂区域上覆盖一层BSG硼硅玻璃层5,部分掺杂源绕扩到背面,形成BSG硼硅玻璃层5。完成本步骤后的电池结构如图5所示。In step (3), the N-type crystalline silicon substrate processed in step (3)' is put into a boron diffusion furnace for diffusion, and the diffusion method is single-sided diffusion. The regions form heavily doped regions 42 . Among them, the source of boron diffusion is boron tribromide, the diffusion temperature is 900°C, the diffusion time is 90min, the square resistance of the lightly doped area is 50Ω/sqr, and the square resistance of the heavily doped area is 50Ω/sqr. During the boron diffusion process, the lightly doped region and the heavily doped region are covered with a BSG borosilicate glass layer 5 , and part of the doping source is extended to the backside to form the BSG borosilicate glass layer 5 . The battery structure after this step is completed is shown in FIG. 5 .

步骤(4)、将步骤(3)处理后的N型晶体硅基体的背面进行刻蚀处理,在背面形成平坦的表面形貌,同时将正面的BSG硼硅玻璃层5和掩膜层2去除。完成本步骤后的电池结构如图6所示。In step (4), the backside of the N-type crystalline silicon substrate treated in step (3) is etched to form a flat surface morphology on the backside, and the BSG borosilicate glass layer 5 and the mask layer 2 on the front side are removed at the same time . The battery structure after this step is completed is shown in FIG. 6 .

步骤(5)、在步骤(4)处理后的N型晶体硅基体的背表面生长一层超薄隧穿氧化层6,该超薄隧穿氧化层的成分为二氧化硅,二氧化硅的制备方法为高温热氧化法,具体地,将步骤(6)处理后的N型晶体硅基体置于常压、纯氧、温度500℃条件下,反应10min,形成厚度为3nm二氧化硅层;完成本步骤后的电池结构如图7所示。然后在超薄隧穿氧化层6的外面利用磁控溅射法的方法,沉积一层掺杂的非晶硅层7。具体地,将硅基体置于氩气氛围中,调整反应气压为0.4Pa,反应时间为50min,反应温度为100℃,完成本步骤后的电池结构如图8所示。最后对N型晶体硅基体1进行退火处理,将背面的掺杂原子激活完成晶化,形成掺杂的多晶硅层8,退火温度为1000℃,退火时间为20min,完成本步骤后的电池结构如图9所示。In step (5), an ultra-thin tunneling oxide layer 6 is grown on the back surface of the N-type crystalline silicon substrate processed in step (4). The composition of the ultra-thin tunneling oxide layer is silicon dioxide. The preparation method is a high-temperature thermal oxidation method. Specifically, the N-type crystalline silicon substrate treated in step (6) is placed under the conditions of normal pressure, pure oxygen, and a temperature of 500° C., and reacted for 10 minutes to form a silicon dioxide layer with a thickness of 3 nm; The battery structure after this step is completed is shown in FIG. 7 . Then, a layer of doped amorphous silicon layer 7 is deposited on the outside of the ultra-thin tunnel oxide layer 6 by magnetron sputtering. Specifically, the silicon substrate was placed in an argon atmosphere, the reaction pressure was adjusted to 0.4 Pa, the reaction time was 50 min, and the reaction temperature was 100° C. The battery structure after this step was completed is shown in FIG. 8 . Finally, the N-type crystalline silicon substrate 1 is annealed to activate the doping atoms on the backside to complete crystallization to form a doped polysilicon layer 8. The annealing temperature is 1000° C. and the annealing time is 20 minutes. The battery structure after this step is as follows shown in Figure 9.

(6)、将步骤(5)处理后的N型晶体硅基体1的背面沉积一层氮化硅与二氧化硅的复合膜作为钝化薄膜9,膜厚120nm,在其正面沉积一层氧化铝和二氧化硅的叠层膜10。完成本步骤后的电池结构如图10所示。(6), deposit a layer of composite film of silicon nitride and silicon dioxide on the back of the N-type crystalline silicon substrate 1 processed in step (5) as a passivation film 9 with a film thickness of 120 nm, and deposit a layer of oxide on its front Laminated film 10 of aluminum and silicon dioxide. The battery structure after this step is completed is shown in FIG. 10 .

(7)、将步骤(6)处理后的N型晶体硅基体1,首先在背表面使用银浆印刷背面主栅和背面副栅并进行烘干,其中背面副栅12线宽90um,互相平行。在N型晶体硅基体1的正表面使用掺铝银浆印刷正面主栅和正面副栅11,其中正面副栅11线宽90um且互相平行;完成本步骤后的电池结构如图11所示。然后将N型晶体硅基体1传送入带式烧结炉进行烧结,烧结峰值温度为800℃,至此完成具有硼掺杂选择性发射极的太阳能电池的制备。(7), the N-type crystalline silicon substrate 1 processed in step (6), first use silver paste on the back surface to print the back main grid and the back sub grid and dry, wherein the back sub grid 12 has a line width of 90um and is parallel to each other . The front busbar and the front subgrid 11 are printed on the front surface of the N-type crystalline silicon substrate 1 using Al-doped silver paste, wherein the front subgrid 11 has a line width of 90um and is parallel to each other; the battery structure after this step is shown in FIG. 11 . Then, the N-type crystalline silicon substrate 1 is transferred into a belt sintering furnace for sintering, and the sintering peak temperature is 800° C., thus completing the preparation of a solar cell with a boron-doped selective emitter.

实施例3Example 3

步骤(1)’、选择N型晶体硅基体1,并对N型晶体硅基体1进行双面制绒处理;其中,N型晶体硅基体1的电阻率为3Ω·cm;N型晶体硅基体1的厚度为170μm。完成本步骤后的电池结构如图1所示。Step (1)', selecting an N-type crystalline silicon substrate 1, and performing double-sided texturing treatment on the N-type crystalline silicon substrate 1; wherein, the resistivity of the N-type crystalline silicon substrate 1 is 3 Ω·cm; the N-type crystalline silicon substrate 1 1 has a thickness of 170 μm. The battery structure after this step is completed is shown in FIG. 1 .

步骤(1)、将步骤(1)’处理后的N型晶体硅基体1,选择其中任一面,利用PECVD的方式生长掩膜层2。其中,掩膜层2的制作材料为SiO2与SiNX形成的叠层膜,厚度为100nm。完成本步骤后的电池结构如图2所示。In step (1), select any surface of the N-type crystalline silicon substrate 1 processed in step (1)', and grow a mask layer 2 by PECVD. Wherein, the fabrication material of the mask layer 2 is a laminated film formed of SiO 2 and SiN X , and the thickness is 100 nm. The battery structure after this step is completed is shown in FIG. 2 .

步骤(2)、在步骤(1)处理后的N型晶体硅基体1的掩膜层2上局部印刷图形化的刻蚀浆料层3,印刷图形与金属化图形的细栅相同,该刻蚀浆料仅与掩膜反应,对金字塔绒面不造成损伤。完成本步骤后的电池结构如图3所示。In step (2), a patterned etching slurry layer 3 is locally printed on the mask layer 2 of the N-type crystalline silicon substrate 1 processed in step (1). The printing pattern is the same as the fine gate of the metallized pattern. The etching paste only reacts with the mask and does not cause damage to the pyramid texture. The battery structure after this step is completed is shown in FIG. 3 .

步骤(3)’、将步骤(2)处理后的N型晶体硅基体放入80℃的热水中进行清洗浆料,将印刷的刻蚀浆料层3清洗掉,同时浆料下方的掩膜层2被腐蚀掉。完成本步骤后的电池结构如图4所示。Step (3)', put the N-type crystalline silicon substrate processed in step (2) into hot water at 80° C. to clean the slurry, clean the printed etching slurry layer 3, and at the same time the mask under the slurry is removed. Film 2 is etched away. The battery structure after this step is completed is shown in FIG. 4 .

步骤(3)、将步骤(3)’处理后的N型晶体硅基体放入硼扩散炉进行扩散,扩散方式为单面扩散,有掩膜的区域形成轻掺杂区域41,没有掩膜的区域形成重掺杂区域42。其中,硼扩散的源为三溴化硼,扩散温度为1070℃,扩散时间为220min,轻掺杂区域方阻100Ω/sqr,重掺杂区域方阻70Ω/sqr。且轻掺杂区域和重掺杂区域上覆盖一层BSG硼硅玻璃层5,部分掺杂源绕扩到背面,形成BSG硼硅玻璃层5。完成本步骤后的电池结构如图5所示。In step (3), the N-type crystalline silicon substrate processed in step (3)' is put into a boron diffusion furnace for diffusion, and the diffusion method is single-sided diffusion. The regions form heavily doped regions 42 . Among them, the source of boron diffusion is boron tribromide, the diffusion temperature is 1070°C, the diffusion time is 220min, the square resistance of the lightly doped area is 100Ω/sqr, and the square resistance of the heavily doped area is 70Ω/sqr. In addition, the lightly doped region and the heavily doped region are covered with a BSG borosilicate glass layer 5 , and part of the doping source is extended to the back surface to form the BSG borosilicate glass layer 5 . The battery structure after this step is completed is shown in FIG. 5 .

步骤(4)、将步骤(3)处理后的N型晶体硅基体的背面进行刻蚀处理,在背面形成平坦的表面形貌,同时将正面的BSG硼硅玻璃层5和掩膜层2去除。完成本步骤后的电池结构如图6所示。In step (4), the backside of the N-type crystalline silicon substrate treated in step (3) is etched to form a flat surface morphology on the backside, and the BSG borosilicate glass layer 5 and the mask layer 2 on the front side are removed at the same time . The battery structure after this step is completed is shown in FIG. 6 .

步骤(5)、在步骤(4)处理后的N型晶体硅基体的背表面生长一层超薄隧穿氧化层6,该超薄隧穿氧化层的成分为二氧化硅,二氧化硅的制备方法为硝酸氧化法,具体地,将步骤(6)处理后的N型晶体硅基体置于质量分数为60~68%的硝酸溶液中,在80~100℃的反应温度下,反应4~10min形成厚度为2nm二氧化硅层;完成本步骤后的电池结构如图7所示。然后在超薄隧穿氧化层6的外面利用PVD的方法,沉积一层掺杂的非晶硅层7,其中,将硅基体置于氩气氛围中,调整反应气压为0.7Pa,反应时间为50min,反应温度为300℃,完成本步骤后的电池结构如图8所示。最后对N型晶体硅基体1进行退火处理,将背面的掺杂原子激活完成晶化,形成掺杂的多晶硅层8,退火温度为900℃,退火时间为60min,完成本步骤后的电池结构如图9所示。In step (5), an ultra-thin tunneling oxide layer 6 is grown on the back surface of the N-type crystalline silicon substrate processed in step (4). The composition of the ultra-thin tunneling oxide layer is silicon dioxide. The preparation method is a nitric acid oxidation method. Specifically, the N-type crystalline silicon substrate treated in step (6) is placed in a nitric acid solution with a mass fraction of 60 to 68%, and at a reaction temperature of 80 to 100 ° C. A silicon dioxide layer with a thickness of 2 nm is formed in 10 minutes; the battery structure after this step is completed is shown in FIG. 7 . Then, a layer of doped amorphous silicon layer 7 is deposited on the outside of the ultra-thin tunnel oxide layer 6 by PVD. The silicon substrate is placed in an argon atmosphere, the reaction pressure is adjusted to 0.7Pa, and the reaction time is 50min, the reaction temperature is 300°C, and the battery structure after this step is completed is shown in FIG. 8 . Finally, the N-type crystalline silicon substrate 1 is annealed to activate the dopant atoms on the backside to complete crystallization to form a doped polysilicon layer 8. The annealing temperature is 900° C. and the annealing time is 60 minutes. The battery structure after this step is as follows: shown in Figure 9.

(6)、将步骤(5)处理后的N型晶体硅基体1的背面沉积一层二氧化硅的钝化薄膜9,膜厚100nm,在其正面沉积一层二氧化硅和氮化硅的叠层膜10。完成本步骤后的电池结构如图10所示。(6), deposit a passivation film 9 of silicon dioxide on the back of the N-type crystalline silicon substrate 1 processed in step (5), with a film thickness of 100 nm, and deposit a layer of silicon dioxide and silicon nitride on its front side. Laminated film 10 . The battery structure after this step is completed is shown in FIG. 10 .

(7)、将步骤(6)处理后的N型晶体硅基体1,首先在背表面使用银浆印刷背面主栅和背面副栅并进行烘干,其中背面副栅12线宽90um,互相平行。在N型晶体硅基体1的正表面使用掺铝银浆印刷正面主栅和正面副栅11,其中正面副栅11线宽90um且互相平行;完成本步骤后的电池结构如图11所示。然后将N型晶体硅基体1传送入带式烧结炉进行烧结,烧结峰值温度为800℃,至此完成具有硼掺杂选择性发射极的太阳能电池的制备。(7), the N-type crystalline silicon substrate 1 processed in step (6), first use silver paste on the back surface to print the back main grid and the back sub grid and dry, wherein the back sub grid 12 has a line width of 90um and is parallel to each other . The front busbar and the front subgrid 11 are printed on the front surface of the N-type crystalline silicon substrate 1 using Al-doped silver paste, wherein the front subgrid 11 has a line width of 90um and is parallel to each other; the battery structure after this step is shown in FIG. 11 . Then, the N-type crystalline silicon substrate 1 is transferred into a belt sintering furnace for sintering, and the sintering peak temperature is 800° C., thus completing the preparation of a solar cell with a boron-doped selective emitter.

最后应当说明的是,以上实施例仅用以说明本发明的技术方案,而非对本发明保护范围的限制,尽管参照较佳实施例对本发明作了详细地说明,本领域的普通技术人员应当理解,可以对本发明的技术方案进行修改或者等同替换,而不脱离本发明技术方案的实质和范围。Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, not to limit the protection scope of the present invention. Although the present invention has been described in detail with reference to the preferred embodiments, those of ordinary skill in the art should understand that , the technical solutions of the present invention may be modified or equivalently replaced without departing from the spirit and scope of the technical solutions of the present invention.

Claims (10)

1. A method for preparing a solar cell with a selective emitter is characterized in that: the method comprises the following steps:
(1) growing a mask layer on any side of the silicon substrate subjected to the double-side texturing treatment, wherein one side of the grown mask layer is used as the front side of the silicon substrate;
(2) locally printing an etching slurry layer on the mask layer on the front surface of the silicon substrate, and drying to etch the mask layer in the area of the printing etching slurry layer and retain the mask layer in the area of the etching slurry layer which is not printed;
(3) carrying out boron diffusion treatment on the silicon substrate to form a heavily doped region in a region without the mask layer, and forming a lightly doped region in a region containing the mask layer so as to form a front boron selective emitter; in the boron diffusion process, the light doping area and the heavy doping area are covered with borosilicate glass layers to form a front borosilicate glass layer, and meanwhile, part of doping sources extend to the edge area of the back to form a back borosilicate glass layer;
(4) etching the texturing surface on the back surface of the silicon substrate into a plane, and simultaneously removing the borosilicate glass layer on the front surface;
(5) growing a tunneling oxide layer and a doped amorphous silicon layer on the back surface of the silicon substrate, and carrying out annealing treatment to activate doped atoms on the back surface of the silicon substrate to complete crystallization and form a doped polycrystalline silicon layer;
(6) depositing a back passivation film on the back of the silicon substrate, and depositing a front passivation antireflection film on the front of the silicon substrate;
(7) and printing a front main grid and a front auxiliary grid on the front surface of the silicon substrate, printing a back main grid and a back auxiliary grid on the back surface of the silicon substrate, and drying.
2. The production method according to claim 1, wherein in the step (2), the locally printed pattern of the etching paste layer is the same as the front side sub-gate pattern.
3. The method of claim 1 or 2, wherein prior to step (3), the method further comprises:
(3) and', cleaning the silicon substrate processed in the step (2) to remove the etching slurry layer and the mask layer below the etching slurry layer.
4. The production method according to claim 1 or 2, wherein in the step (2), the mask layer is SiO2Dielectric film or SiNXDielectric film, or SiO2And SiNXThe formed laminated film has a thickness of 20-100nm and is prepared by PECVD or ALD.
5. The production method according to claim 1 or 2, wherein in the step (3), a boron source for boron diffusion is boron tribromide, the diffusion temperature is 900 to 1070 ℃, the diffusion time is 90 to 240min, and the diffused square resistance is 50 to 200 Ω/sqr.
6. The method according to claim 3, wherein in the step (3)', the silicon substrate processed in the step (2) is cleaned with clear water to remove the etching slurry layer and the mask layer under the etching slurry layer, and the temperature of the clear water is 40-80 ℃.
7. The production method according to claim 1 or 2, wherein, in step (5); the tunneling oxide layer is made of silicon dioxide, the thickness of the tunneling oxide layer is 0.5-2 nm, and the preparation method is a nitric acid oxidation method, a high-temperature thermal oxidation method, an ozone oxidation method or an atomic layer deposition method;
wherein, when the preparation method is a high-temperature thermal oxidation method, the reaction is carried out for 10-20 min under the conditions of normal pressure, pure oxygen and the temperature of 500-700 ℃;
when the preparation method is a nitric acid oxidation method, a nitric acid solution with the mass fraction of 60-68% is adopted to react for 4-10 min at the reaction temperature of 80-100 ℃.
8. The method of claim 7, wherein in the step (5), the doped amorphous silicon layer is grown on the back surface of the silicon substrate by magnetron sputtering, the silicon substrate is placed in an argon atmosphere, the reaction pressure is adjusted to 0.1 to 0.7Pa, the reaction temperature is adjusted to 100 to 300 ℃, and the reaction time is 10min to 3 h.
9. The production method according to claim 1 or 2, wherein the front passivation anti-reflective film is SiO2、SiNXOr Al2O3One or a combination of any several of the dielectric films, and the back passivation antireflection film is SiO2、SiNXOne or a combination of any several of the dielectric films.
10. The preparation method according to claim 1 or 2, characterized in that, in the step (7), the front main grid and the front auxiliary grid are printed by adopting aluminum-doped silver paste, and the back main grid and the back auxiliary grid are printed by adopting silver paste; wherein, the line width of the back side auxiliary grid is 35-90 um and the back side auxiliary grid are arranged in parallel; the line width of the front side auxiliary grid is 30-90 um and the front side auxiliary grid are arranged in parallel.
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