CN112736043B - 多裸片封装模块及方法 - Google Patents

多裸片封装模块及方法 Download PDF

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Publication number
CN112736043B
CN112736043B CN202011611062.8A CN202011611062A CN112736043B CN 112736043 B CN112736043 B CN 112736043B CN 202011611062 A CN202011611062 A CN 202011611062A CN 112736043 B CN112736043 B CN 112736043B
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die
substrate
flip
electrically connected
chip
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CN112736043A (zh
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蒲应江
蒋航
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Chengdu Monolithic Power Systems Co Ltd
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Chengdu Monolithic Power Systems Co Ltd
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Priority to CN202011611062.8A priority Critical patent/CN112736043B/zh
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Priority to US17/545,282 priority patent/US20220208732A1/en
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Abstract

本申请公开了一种多裸片封装模块及方法。该多裸片封装模块包括：嵌入裸片，被埋在基板中；电组件，被放置在基板上方，通过导体与基板电连接；倒装裸片，被放置在基板上方、电组件下方，或被放置在基板下方，并通过导体与基板电连接。所述多裸片封装模块降低了成本、提高了性能。

Description

多裸片封装模块及方法
技术领域
本发明涉及一种半导体封装，更具体地说，本发明涉及一种多裸片封装模块及方法。
背景技术
近几年来，客户端电子产品的要求在显著提高。微型化和可便携性成为势不可挡的趋势，促使芯片封装更加紧凑。相应地，便携式电子设备在具有更多功能和更好性能的同时，其体积也变得越来越小。因此，现今的功率供应系统被要求具有更小的尺寸、更高的功率输出、更多的功能和更高的效率。在这些要求下，有些技术将开关器件如场效应晶体管和控制器集成进单片裸片。但是，通常来说，控制器采用互补金属氧化物半导体工艺(CMOS工艺)，需要18至20层掩膜制作工艺；而开关器件通常采用双扩散金属氧化物半导体工艺(DMOS工艺)，只需要8至9层掩膜制作工艺。因此，这种单裸片由于将开关器件和控制器一起制作，制作成本高。
发明内容
因此本发明的目的在于解决现有技术的上述技术问题，提出一种多裸片封装模块及方法。
根据本发明的实施例，提出了一种多裸片封装模块，包括：嵌入裸片，被埋在基板中；电组件，被放置在基板上方，通过导体与基板电连接；倒装裸片，被放置在基板上方、电组件下方，或被放置在基板下方，并通过导体与基板电连接。
根据本发明的实施例，还提出了一种多裸片封装模块，包括，嵌入裸片，被埋在基板中；上倒装裸片，被放置在基板上方，通过导体与基板电连接；下倒装裸片，被放置在基板下方，通过导体与基板电连接；电组件，被放置在上倒装裸片上方，通过导体与基板电连接。
根据本发明的实施例，还提出了一种多裸片封装模块，包括：输入引脚，接收输入电压，该输入引脚电连接至其上形成有上端功率开关的第一裸片；出引脚，电连接至电组件，所述电组件被放置在基板上方；接地引脚，电连接至其上形成有下端功率开关的第二裸片；控制引脚，接收控制信号，所述控制引脚电连接至其上形成有控制器的第三裸片；其中：第一裸片、第二裸片和第三裸片的其中一个裸片为嵌入裸片，被埋在基板中；另外两个裸片为倒装裸片，均被放置在基板下方，或者均被放置在基板上方、电组件下方；或者其中一个倒装裸片被放置在基板下方，另一个倒装裸片被放置在基板上方、电组件下方。
根据本发明的实施例，还提出了一种多裸片封装的方法，包括：将嵌入裸片埋入基板，所述基板具有多层金属层；将电组件放置在基板上方；将倒装裸片放置在基板上方、电组件下方或放置在基板下方；通过导体电连接嵌入裸片、倒装裸片、电组件和基板。
根据本发明各方面的上述多裸片封装模块及方法，降低了成本、提高了性能。
附图说明
图1为根据本发明实施例的多裸片封装模块100的剖面结构示意图；
图2为根据本发明实施例的多裸片封装模块200的剖面结构示意图；
图3为根据本发明实施例的多裸片封装模块300的剖面结构示意图；
图4为根据本发明实施例的多裸片封装模块400的剖面结构示意图；
图5为根据本发明实施例的多裸片封装模块500的剖面结构示意图；
图6为根据本发明实施例的多裸片封装模块600的剖面结构示意图；
图7为根据本发明实施例的多裸片封装模块700的剖面结构示意图；
图8为根据本发明实施例的多裸片封装模块800的剖面结构示意图；
图9为根据本发明实施例的多裸片封装模块900的剖面结构示意图；
图10示意性示出了根据本发明实施例的多裸片封装模块1000；
图11示意性示出了根据本发明实施例的多裸片封装的方法流程图1100。
具体实施方式
下面将详细描述本发明的具体实施例，应当注意，这里描述的实施例只用于举例说明，并不用于限制本发明。在以下描述中，为了提供对本发明的透彻理解，阐述了大量特定细节。然而，对于本领域普通技术人员显而易见的是：不必采用这些特定细节来实行本发明。在其他实例中，为了避免混淆本发明，未具体描述公知的电路、材料或方法。
在整个说明书中，对“一个实施例”、“实施例”、“一个示例”或“示例”的提及意味着：结合该实施例或示例描述的特定特征、结构或特性被包含在本发明至少一个实施例中。因此，在整个说明书的各个地方出现的短语“在一个实施例中”、“在实施例中”、“一个示例”或“示例”不一定都指同一实施例或示例。此外，可以以任何适当的组合和/或子组合将特定的特征、结构或特性组合在一个或多个实施例或示例中。此外，本领域普通技术人员应当理解，在此提供的附图都是为了说明的目的，并且附图不一定是按比例绘制的。应当理解，当称元件“耦接到”或“连接到”另一元件时，它可以是直接耦接或耦接到另一元件或者可以存在中间元件。相反，当称元件“直接耦接到”或“直接连接到”另一元件时，不存在中间元件。相同的附图标记指示相同的元件。这里使用的术语“和/或”包括一个或多个相关列出的项目的任何和所有组合。
图1为根据本发明实施例的多裸片封装模块100的剖面结构示意图。在图1所示实施例中，所述多裸片封装模块100包括：嵌入裸片101，被埋在基板110中；倒装裸片102，被放置在基板110的上方，通过导体111(如焊料凸块、过孔结构、和/或金属线)与基板110电连接；电组件(如电感、电容)130，被放置在倒装裸片102上方，通过导体111与基板110电连接。
在本发明一个实施例中，所述嵌入裸片101包括其上形成有接触点(如焊料凸块)的有源面11T，该有源面通常也被称为上表面或顶面，与有源面相反的另一面通常被称为底面。
在本发明的实施例中，“倒装裸片”是指裸片的接触区通过焊料凸块直接与引线框架或基底电耦接的任意裸片；“基板”是指封装级别的材料制成的载板，应用于类似印制电路板PCB中，包括多个金属层；“焊料凸块”是指用来直接电耦接两个接触区的球状或柱状金属小块(如铜柱)，该金属小块多以焊料填充。
在本发明一个实施例中，通过在裸片和基板上打过孔、并使用金属材料例如铜来填充过孔，以在裸片之间、裸片与基板之间、及裸片与外部接触之间形成金属线连接。
在本发明一个实施例中，所述嵌入裸片101的有源面11T可以朝上(有源面11T朝向倒装裸片102，如图1所示)，也可以朝下(有源面背向倒装裸片102，如图2所示)。如图1所示，当嵌入裸片101的有源面11T朝上时，嵌入裸片101的有源面通过导体112与倒装裸片102和基板110电连接。如图2所示，当嵌入裸片101的有源面11T朝下时，嵌入裸片101的有源面通过导体113与基板110电连接。
在本发明一个实施例中，导体112通过金属线和过孔结构，经由基板110的下表面被引出，以作为嵌入裸片101的输入输出端子。
前述图1和图2所示实施例的倒装裸片102被放置在基板110上方、电组件130下方，但是本领域技术人员应当意识到，倒装裸片102也可以被放置在其他位置，如下图3所示。
图3为根据本发明实施例的多裸片封装模块300的剖面结构示意图。在图3所示实施例中，所述多裸片封装模块300包括：嵌入裸片101，被埋在基板110中；倒装裸片103，被放置在基板110下方(如被贴在基板110的下表面)，通过导体114(如焊料凸块、过孔结构、和/或金属线)与基板110电连接；电组件(如电感、电容)130，被放置在基板110上方，通过导体111与基板110电连接。
在图3所示实施例中，所述嵌入裸片101的有源面11T朝下，使得嵌入裸片101的有源面11T通过导体115与倒装裸片103和基板110电连接。
根据本发明的实施例，多裸片封装模块(如100、200、300)还包括：塑封材料120，用以包封基板110的上方(如上表面)和下方(如下表面)，以保护电组件130、倒装裸片102(和/或103)。在本发明一个实施例中，塑封材料120包括绝缘材料，如环氧树脂。
在上述图1、图2和图3所示实施例中，嵌入裸片101的部分边缘与倒装裸片102(或103)的部分边缘在垂直方向(即如图1、图2、图3所示的Z方向)有交叠，使嵌入裸片101和倒装裸片102(或103)之间的导体有最小的垂直距离和更小的寄生阻抗。在本发明一个实施例中，垂直方向为与裸片平面(如嵌入裸片101的有源面)垂直的方向。但是本领域技术人员应当意识到，在本发明的其他实施例中，嵌入裸片101与倒装裸片102(或103)在垂直方向也可以没有交叠，如图4所示实施例的多裸片封装模块400和图5所示的多裸片封装模块500。
图4所示多裸片封装模块400与图1所示多裸片封装模块100相似，与图1所示多裸片封装模块100不同的是，在图4实施例中，嵌入裸片101与倒装裸片102在垂直方向上没有交叠，嵌入裸片101与倒装裸片102之间的导体112包括焊料凸块11(垂直方向，与倒装裸片102接触的部分导体)、金属线12(平面方向)和过孔结构13(垂直方向，与嵌入裸片101接触的部分导体)。图4所示多裸片封装模块400的其他部分与图1所示多裸片封装模块100相似，为叙述简明，这里不再详述。
图5所示多裸片封装模块500与图3所示多裸片封装模块300相似，与图3所示多裸片封装模块300不同的是，在图5实施例中，嵌入裸片101与倒装裸片103在垂直方向上没有交叠，嵌入裸片101与倒装裸片103之间的导体115包括过孔结构(或焊料凸块)11(垂直方向，与嵌入裸片101接触的部分导体)、金属线12(平面方向)和焊料凸块13(垂直方向，与倒装裸片103接触的部分导体)。图5所示多裸片封装模块500的其他部分与图3所示多裸片封装模块300相似，为叙述简明，这里不再详述。
也就是说，在本发明一部分实施例中，导体包括焊料凸块和过孔结构(如图1、图3所示实施例中嵌入裸片101与倒装裸片102/103之间的导体)。在本发明另一部分实施例中，导体包括焊料凸块、过孔结构和金属线(如图4所示实施例中嵌入裸片101与倒装裸片102之间的导体)。在本发明其他实施例中，导体还可以包括焊料凸块、通孔结构/穿孔结构，和/或金属线(如图1、2、4所示实施例中倒装裸片与基板之间的导体)。
图6为根据本发明实施例的多裸片封装模块600的剖面结构示意图。在图6所示实施例中，所述多裸片封装模块600包括：嵌入裸片101，被埋在基板110中；上倒装裸片102，被放置在基板110的上方，通过导体111与基板110电连接；下倒装裸片103，被放置在基板110的下方(如被贴在基板110的下表面)，通过导体114与基板110电连接；电组件(如电感、电容)130，被放置在上倒装裸片102上方，通过导体111与基板110电连接。
在图6所示实施例中，所述嵌入裸片101的有源面11T朝上，使得嵌入裸片101的有源面11T通过导体112与上倒装裸片102电连接。但是本领域的技术人员应当意识到，在其他实施例中，嵌入裸片101的有源面11T也可以朝下，使得嵌入裸片101的有源面11T通过导体与下倒装裸片103电连接(如图3)。
也就是说，根据本发明的实施例，多裸片封装模块包括：嵌入裸片101，被埋在基板110中；电组件(如电感、电容等)130，被放置在基板110上方，通过导体111与基板110电连接；以及倒装裸片(102和/或103)，被放置在基板110上方、电组件130下方，或被放置在基板110下方，通过导体与基板110电连接。
在本发明的实施例中，“上倒装裸片”是指倒装裸片的有源面朝下(face down)；“下倒装裸片”是指倒装裸片的有源面朝上(face up)。
前述根据本发明多个实施例的多裸片封装模块包括一个嵌入裸片、一个倒装裸片和电组件。但是本领域技术人员应当意识到，本发明的多裸片封装模块可以包括一个或多个嵌入裸片、一个或多个倒装裸片与电组件的组合。如图7～图9实施例所示的多裸片封装模块700、800及900。这些实施例示出了多裸片封装模块包括两个嵌入裸片和/或两个(或多个)倒装裸片与电组件的组合，但是并未穷举其他组合，本领域技术人员应当意识到，在其他实施例中，多裸片封装模块可以包括任意个所需的嵌入裸片与任意个所需的倒装裸片与电组件的组合，且嵌入裸片的部分边缘与倒装裸片的部分边缘在垂直方向可以有交叠，也可以没有交叠。
在本发明一个实施例中，嵌入裸片101、倒装裸片(上倒装裸片102和/或下倒装裸片103)分别包括功率变换电路的功率开关器件和相应的控制器。例如，嵌入裸片101包括功率开关器件、倒装裸片包括控制器；或嵌入裸片101包括控制器、倒装裸片包括功率开关器件。但是，本领域技术人员应当意识到，在本发明的其他实施例中，嵌入裸片101和倒装裸片可以包括其他电路和器件。
图10示意性示出了根据本发明实施例的多裸片封装模块1000，该模块包括降压变换电路。具体来说，所述多裸片封装模块1000包括：输入引脚Vin，接收输入电压，该输入引脚Vin电连接至其上形成有上端功率开关的第一裸片1001；输出引脚Vo，电连接至电组件1003，所述电组件被放置在基板上方；接地引脚GND，电连接至其上形成有下端功率开关的第二裸片1002；控制引脚PWM，接收控制信号(如由前级电路输入)，所述控制引脚PWM电连接至其上形成有控制器的第三裸片1003；其中第一裸片1001、第二裸片1002和第三裸片1003的其中一个裸片为嵌入裸片，被埋在基板中；另外两个裸片为倒装裸片，均被放置在基板上方、电组件下方，或者均被放置在基板下方；或者其中一个倒装裸片被放置在基板上方、电组件下方，另一个倒装裸片被放置在基板下方。
继续参考图10，第一裸片1001具有电连接至输入引脚Vin的第一端子1、电连接至开关引脚SW的第二端子2、以及电连接至第三裸片1003的控制端子。第二裸片1002包括电连接至开关引脚SW的第一端子3、电连接至接地引脚GND的第二端子4、以及电连接至第三裸片1003的控制端子。第三裸片1003包括电连接至控制引脚PWM的输入端子7、电连接至第一裸片1001控制端子的第一输出端子5、以及电连接至第二裸片1002控制端子的第二输出端子6。
前述根据本发明多个实施例的多裸片封装模块为小尺寸封装提供了更紧凑的解决方案，带来了更好的性能。不同于传统技术，前述根据本发明多个实施例的多裸片封装模块可以采用不同的工艺来制作不同裸片(如倒装裸片用一种工艺、嵌入芯片用另一种工艺)，并将这些裸片与电组件封装在一起形成模块：一部分裸片(如嵌入裸片)被埋在基板里，一部分裸片被放置在基板上方、电组件下方，或放置在基板下方，并通过导体(如焊料凸块)与基板连接。因此，总成本被降低。此外，嵌入裸片与倒装裸片在垂直于裸片平面的方向上有交叠，使得封装尺寸更小，这进一步节省了费用并减小了寄生阻抗。
图11示意性示出了根据本发明实施例的多裸片封装的方法流程图1100。如图11所示，所述多裸片封装方法包括：
步骤1101，将嵌入裸片埋入基板，所述基板具有多层金属层。
步骤1102，将电组件放置在基板上方。
步骤1103，将倒装裸片放置在基板上方、电组件下方或放置在基板下方。
步骤1104，通过导体电连接嵌入裸片、倒装裸片、电组件和基板。
在本发明一个实施例中，所述方法还包括：在基板底部预植焊球。
在本发明一个实施例中，所述方法还包括：用塑封材料包封基板的上方和底部，以保护倒装裸片和焊球。
在本发明一个实施例中，所述方法还包括：将焊球从塑封材料包裹中研磨磨出或用激光烧出，并在露出的焊球区域再植焊球。
在本发明一个实施例中，所述嵌入裸片、倒装裸片和基板之间的导体包括焊料凸块、过孔结构或金属线。在本发明另一个实施例中，所述导体包括焊料凸块和通孔结构。
在本发明一个实施例中，所述嵌入裸片、倒装裸片通过不同的金属层引出，作为多裸片封装的外部引脚。
在本发明一个实施例中，所述嵌入裸片的部分边缘与倒装裸片的部分边缘在垂直方向有交叠。
虽然已参照几个典型实施例描述了本发明，但应当理解，所用的术语是说明和示例性、而非限制性的术语。由于本发明能够以多种形式具体实施而不脱离发明的精神或实质，所以应当理解，上述实施例不限于任何前述的细节，而应在随附权利要求所限定的精神和范围内广泛地解释，因此落入权利要求或其等效范围内的全部变化和改型都应为随附权利要求所涵盖。

Claims (2)

1.一种多裸片封装模块，包括：
输入引脚，接收输入电压，该输入引脚电连接至其上形成有上端功率开关的第一裸片；
输出引脚，电连接至电组件，所述电组件被放置在基板上方；
接地引脚，电连接至其上形成有下端功率开关的第二裸片；
控制引脚，接收控制信号，所述控制引脚电连接至其上形成有控制器的第三裸片；其中：
第一裸片、第二裸片和第三裸片的其中一个裸片为嵌入裸片，被埋在基板中；
另外两个裸片为倒装裸片，均被放置在基板下方，或者均被放置在基板上方、电组件下方；或者其中一个倒装裸片被放置在基板下方，另一个倒装裸片被放置在基板上方、电组件下方。
2.如权利要求1所述的多裸片封装模块，其中所述嵌入裸片的部分边缘与倒装裸片的部分边缘在垂直方向有交叠。
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