CN112701050B - Packaging method and packaging structure of embedded element - Google Patents
Packaging method and packaging structure of embedded element Download PDFInfo
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- CN112701050B CN112701050B CN202011536517.4A CN202011536517A CN112701050B CN 112701050 B CN112701050 B CN 112701050B CN 202011536517 A CN202011536517 A CN 202011536517A CN 112701050 B CN112701050 B CN 112701050B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
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Abstract
The invention discloses a packaging method and a packaging structure of an embedded element, wherein the packaging method of the embedded element comprises the following steps: combining the back surface of the semiconductor element with the front surface of the lead frame by adopting a combination material to form a primary structure; covering and pressing the DAF material on the front surface of the primary structure to form a DAF layer; processing a through hole exposing the front surface of the lead frame on the DAF layer; filling metal core balls in the via holes, and combining the metal core balls to form a conductive column; patterning the lead frame; the packaging structure of the embedded element comprises: a lead frame; a semiconductor element, the back surface of which is combined with the front surface of the conductive part; a DAF layer; the front electrode contact of the semiconductor element is exposed from the DAF layer; the DAF layer is provided with a via hole; the conductive columns are filled in the via holes and comprise a plurality of metal core balls which are mutually connected. The packaging method and the packaging structure of the embedded element reduce the product volume, simplify the method and the structure, lead frames can be used for heat dissipation, and the conducting performance of the conducting posts is good.
Description
Technical Field
The present invention relates to the field of semiconductor technologies, and in particular, to a method and a structure for packaging an embedded device.
Background
With the rapid development of portable electronic products in recent years, various related products are gradually developed towards high density and high performance, and the trend of being light, thin and small.
In many integrated circuit products, a semiconductor device is generally packaged by a packaging material, and then the semiconductor device package and other electronic components are mounted on a substrate (such as a circuit board); therefore, in an electronic system, the packaging material and the substrate occupy the packaging space, and the semiconductor component packaging part occupies the surface area of the substrate, so that the miniaturization of a product is not facilitated; moreover, the structure of the whole packaging structure is complex, and the manufacturing process is complex.
Disclosure of Invention
One object of an embodiment of the present invention is to: the packaging method for the embedded element is provided, the semiconductor element is embedded into the substrate, miniaturization of products is facilitated, the whole packaging structure is simpler, and heat dissipation performance is good.
Another object of an embodiment of the present invention is to: the utility model provides an embedded component's packaging structure, it imbeds the semiconductor component in the base plate, is favorable to realizing the miniaturization of product, and whole packaging structure is simpler, and heat dispersion is good.
In order to achieve the purpose, the invention adopts the following technical scheme:
a method of encapsulating an embedded component, comprising:
providing a lead frame and a semiconductor element, and combining the back surface of the semiconductor element with the front surface of the lead frame by adopting a combination material to form a primary structure;
providing a DAF material, covering and pressing the DAF material on the front surface of the primary structure, forming a DAF layer on the front surface of the primary structure, and exposing an electrode contact of the front surface of the semiconductor element from the DAF layer;
processing a through via hole in the DAF layer;
placing a plurality of metal core balls to the via holes, wherein the metal core balls comprise metal balls and solder layers coated outside the metal balls; melting and solidifying the solder layer to connect the metal core balls to form a conductive column;
and patterning the lead frame to form a plurality of conductive parts electrically connected with the conductive columns.
Preferably, the method further comprises the following steps: and the electrode contact is arranged on the front surface of the semiconductor element, and the solder ball is implanted on the conductive column.
Preferably, the method further comprises the following steps: an electronic component is provided, and the electronic component is bonded to the back surface of the conductive portion using a conductive bonding material.
Preferably, the via hole is processed on the DAF layer through a laser drilling processing technology;
the lead frame is patterned by a photolithography process, or by an etching process.
A component-embedded package structure, comprising:
the lead frame is a patterned conductive layer and comprises a plurality of conductive parts;
a semiconductor element having a back surface bonded to the front surface of the conductive portion via a first bonding layer, and an electrode pad provided on the front surface;
a DAF layer covering the front surface of the lead frame and the semiconductor element; the electrode contact of the front surface of the semiconductor element is exposed from the DAF layer; the DAF layer is provided with a via hole;
the conductive column comprises a plurality of metal core balls filled in the through holes, each metal core ball comprises a metal ball and a solder layer wrapped outside the metal ball, and the metal core balls are connected with the solder layers; the conductive post is connected to the conductive portion, and the other end is exposed from the DAF layer.
Preferably, the electronic component further comprises an electronic component, and the front surface of the electronic component is combined with the back surface of the conductive part through a conductive second combination layer.
Preferably, the solder ball structure also comprises a plurality of solder balls, wherein the solder balls are metal core balls; the electrode contact on the front surface of the semiconductor element is electrically connected with the solder ball, and the conductive column is electrically connected with the solder ball.
Preferably, the metal ball is a copper ball.
Preferably, one, two or more of the semiconductor elements are included; at least one semiconductor element is a triode wafer;
the electrode contact of the triode wafer comprises a drain contact arranged on the back side, a source contact and a grid contact arranged on the front side; the drain contact is led to the front surface of the packaging structure through the conductive part and the conductive column; the source contact and the gate contact are exposed by the DAF layer.
Preferably, the electronic device comprises a plurality of the electronic elements, and the electronic elements are wafers or passive elements.
The invention has the beneficial effects that: (1) according to the packaging method and the packaging structure of the embedded element, the lead frame and the DAF material are combined to be used as the substrate, and the semiconductor element is embedded into the substrate, so that the miniaturization of a product is facilitated, and the space on the substrate is saved; (2) the packaging method is simplified, and the whole packaging structure is simpler; (3) the lead frame can also be used for heat dissipation in the packaging structure, and the heat dissipation performance is better (4) the conductive column of the packaging structure is formed by combining a plurality of metal core balls, and the conduction performance of the conductive column is better.
Drawings
The invention is explained in more detail below with reference to the figures and examples.
Fig. 1 is a schematic diagram illustrating a method for packaging an embedded component according to an embodiment of the invention;
fig. 2 is a second schematic diagram illustrating a packaging method of an embedded device according to an embodiment of the invention;
fig. 3 is a third schematic view illustrating a packaging method of an embedded device according to a third embodiment of the invention;
FIG. 4 is a fourth illustration showing a packaging method of an embedded component according to an embodiment of the invention;
FIG. 5 is a fifth exemplary illustration of a method for packaging an embedded component according to an embodiment of the invention;
FIG. 6 is a sixth embodiment of a packaging method for embedded components according to the present invention;
FIG. 7 is a schematic structural diagram of a metal core sphere according to an embodiment of the present invention;
fig. 8 is a seventh schematic view illustrating a packaging method of an embedded device according to an embodiment of the invention;
fig. 9 is an eighth schematic view illustrating a packaging method of an embedded device according to an embodiment of the invention;
FIG. 10 is an enlarged view of portion A of FIG. 9;
FIG. 11 is a ninth schematic view illustrating a method for packaging an embedded device according to an embodiment of the present invention;
fig. 12 is a tenth schematic diagram illustrating a packaging method of an embedded device according to an embodiment of the invention;
fig. 13 is an eleventh schematic view illustrating a method for packaging an embedded component according to an embodiment of the present invention, and a schematic view illustrating a package structure of an embedded component according to an embodiment of the present invention;
in the figure: 10. a lead frame; 11. a conductive portion; 12. a spacing channel; 20. a semiconductor element; 201. a triode wafer; 21. an electrode contact; 211. a source contact; 212. a gate contact; 31. a DAF material; 32. a DAF layer; 321. a via hole; 40. a conductive post; 50. a solder ball; 60. an electronic component; 61. a wafer; 62. a passive element; 70. a bonding material; 71. a first bonding layer; 72. a second bonding layer; 90. a metal core sphere; 91. a metal ball; 92. and a solder layer.
Detailed Description
In order to make the technical problems solved, technical solutions adopted and technical effects achieved by the present invention clearer, the technical solutions of the embodiments of the present invention will be described in further detail below with reference to the accompanying drawings, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, unless otherwise explicitly specified or limited, the terms "connected" and "fixed" are to be understood broadly, e.g., as being fixedly connected, detachably connected, or integrated; can be mechanically or electrically connected; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
In the present invention, unless otherwise expressly stated or limited, "above" or "below" a first feature means that the first and second features are in direct contact, or that the first and second features are not in direct contact but are in contact with each other via another feature therebetween. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.
In fig. 1 to 10, the front side of the structure in the drawings is the upward side, and the back side is the downward side; in fig. 11-13, the front side of the structure is facing downward and the back side is facing upward.
The invention provides a packaging method of an embedded element, which takes a lead frame 10 and a DAF material 31 as a substrate in a pressing way, and a semiconductor element 20 is embedded in the substrate, thus being beneficial to reducing the volume of a product, realizing the miniaturization of the product and saving the space on the substrate; moreover, the whole packaging structure is simpler and is convenient to package; meanwhile, the lead frame 10 is used for leading out the element electrodes, and can also be used as a heat dissipation plate for dissipating heat outwards, so that the space is efficiently utilized, and the lead frame has good heat dissipation performance.
As shown in fig. 1 to 13, in an embodiment of the method for encapsulating an embedded component of the present invention, the method for encapsulating an embedded component includes:
the preparation method comprises the following steps: providing a lead frame 10, a semiconductor element 20, a DAF material 31; the DAF material 31 is Die Attach Film, which is an insulating adhesive Film;
and (3) an element in the upper plate: providing a bonding material 70 on the front surface of the lead frame 10, and bonding the back surface of the semiconductor element 20 with the front surface of the lead frame 10 through the bonding material 70 by a welding or bonding process to form a primary structure; wherein, one, two or more semiconductor elements 20 can be combined on the lead frame 10 according to actual requirements;
pressing step (DAF lamination): the method comprises the steps of (1) enabling the front surface of a primary structure to face upwards, namely the surface, provided with a semiconductor element 20, of the primary structure to face upwards, covering a DAF material 31 on the front surface of the primary structure, and applying pressure to the DAF material 31 so that the DAF material 31 is in pressing combination with the front surface of a lead frame 10, the front surface of the semiconductor element 20 and the side surface of the semiconductor element 20, and a DAF layer 32 combined with the lead frame 10 and the semiconductor element 20 is formed on the primary structure; exposing the electrode contact 21 on the front surface of the semiconductor element 20 from the DAF layer 32 while pressing the DAF material 31;
drilling: processing a via hole 321 on the DAF layer 32 so that the front surface of the lead frame 10 is exposed to the outside through the via hole 321;
conducting: providing a metal core ball 90, wherein the metal core ball 90 comprises a metal ball 91 and a solder layer 92 wrapping the outside of the metal ball 91; placing a plurality of metal core balls 90 into the via holes 321, and electrically connecting the solder layers 92 between the adjacent metal core balls 90 by using a reflow soldering process;
a ball planting step: a solder ball 50 is implanted in the exposed portion of the conductive post 40, and a solder ball 50 is implanted in the exposed portion of the electrode contact 21 on the front surface of the semiconductor element 20; patterning step: etching a pattern on the lead frame 10 by a photolithography or etching process, so that the lead frame 10 forms a patterned conductive layer, the patterned conductive layer includes a plurality of conductive portions 11 electrically connected to the conductive posts 40, a spacing channel 12 is provided between adjacent conductive portions 11, and the spacing channel 12 is etched by a photolithography or etching method;
and (3) an outer element mounting step: the electronic component 60 is provided, a conductive bonding material is provided on the back surface of the conductive part 11, the front surface of the electronic component 60 is bonded to the back surface of the conductive part 11 through the conductive bonding material by a soldering or bonding process, and the electrode contact 21 on the front surface of the electronic component 60 is electrically connected to the conductive part 11 through the conductive bonding material.
Specifically, in the conducting step, the solder layer 92 outside the metal core balls 90 is melted by heating, and after solidification, the adjacent metal core balls 90 are connected by solder to form the conductive column 40; one end of the conductive post 40 is electrically connected to the lead frame 10, and the other end is exposed to the outside.
In the present embodiment, the semiconductor device 20 is a semiconductor wafer; the electronic components 60 may be one or more of semiconductor wafers 61 and passive components 62, and the number of each electronic component 60 is not limited. The passive element 62 may be, but is not limited to, a capacitor, a resistor, an inductor.
The type of the semiconductor wafer of the present invention may be, but is not limited to, a Si wafer, a SiC wafer, a GaN wafer.
The lead frame 10 is a conductive carrier, and the lead frame 10 and the DAF material 31 are combined to be used as a substrate, so that the semiconductor element 20 is conveniently embedded in a circuit substrate, and a common PCB is replaced; on the other hand, the lead frame 10 serves as a support carrier for the semiconductor element 20; in a third aspect, the lead frame 10 is configured to cooperate with the conductive posts 40 to lead electrodes of the backside of the on-board semiconductor element 20 and electrodes of the off-board electronic element 60 to the front side of the package structure for clip applications.
The packaging method of the invention, through adopting DAF material 31 and lead frame 10 to cooperate, can already regard as the base plate to employ, facilitate imbedding the semiconductor element 20 into base plate, help to realize the miniaturization of the product, save the space on the base plate (namely outside the base plate), make the board have more spaces to mount the electronic component 60, help to realize the high integration level of the product; moreover, the whole packaging structure is simple, the packaging method is simplified, and the packaging efficiency can be improved; in addition, the lead frame 10 is used for leading the electrode of the back surface of the semiconductor element 20 in the board to the front surface of the packaging structure and leading the electrode of the semiconductor element 20 outside the board to the front surface of the packaging structure, so that the electrodes of the elements of the whole packaging structure are led out from the front surface, and the whole module is convenient to be bonded with an external device or product or an electronic circuit on a PCB circuit board again; in addition, the back surface of the lead frame 10 is directly exposed for heat dissipation, and the package structure has good heat dissipation performance while efficiently utilizing space.
In the packaging method of the present invention, in the conducting step, the conducting hole 321 is filled with the plurality of metal core balls 90, and the plurality of metal balls 91 are connected by the melted and re-solidified solder through the reflow soldering process, so as to form the conductive pillar 40.
In the conducting step, if the conductive post 40 is formed by filling the via hole 321 with the solder, when the liquid solder fills the via hole 321, the solder is not easily deposited at the bottom of the via hole 321, and voids are likely to occur in the conductive post 40 formed after the solder is cured, which may result in poor conducting performance of the conductive post 40.
In the packaging method, the metal core balls 90 are used for filling the via holes 321, the density of the metal core balls 90 is higher than that of the solder, the metal core balls 90 can sink into the via holes 321 under the action of gravity, holes at the bottoms of the via holes 321 are avoided, the outer solder layer 92 can flow and fully fill gaps between the metal balls 91 after being melted, and the connection between the adjacent metal balls 91 is realized after the solder is solidified, so that the holes in the conductive columns 40 can be avoided; according to the packaging method, the metal core balls 90 are combined to form the conductive columns 40, so that the conductive performance of the conductive columns 40 is better.
In the packaging method, in the conducting step, the metal core balls 90 are combined to form the conductive columns 40, only filling and reflow soldering operations are needed, the packaging process is simple and convenient, and the conductive columns 40 with good conducting performance can be obtained.
Preferably, in the conducting step, the metal core balls 90 are copper core balls, wherein the copper core balls are used as inner cores, and the outer layers of the copper core balls are coated with a solder layer 92, so that the copper core balls have high hardness, good electrical conductivity and good heat conductivity.
Preferably, in the conducting step, the solder layer 92 of the metal core ball 90 is a tin layer.
In other embodiments, other metals with better conductivity can be used as the metal balls 91, and other conductive bonding materials can be used as the solder layer 92.
Preferably, the metal core sphere 90 may be made by: metal ball 91 is provided, and solder layer 92 is coated on the outer surface of metal ball 91 to form metal core ball 90.
In making the metal core sphere 90: the solder layer 92 can be formed by immersing the metal balls 91 in the flowing solder, taking out the metal balls 91 with the solder attached to the outer surface, and solidifying the solder coated on the outer surface. Of course, the outer surface of the metal ball 91 may be coated with the solder layer 92 in other ways.
In the packaging method of the present invention, the pre-fabricated metal core ball 90 is directly used to fill the via hole 321, and the metal core ball 90 does not need to be fabricated in the packaging process, so that the packaging efficiency can be improved. In this embodiment, the packaging method is implemented according to the arrangement order of the above steps, so that the packaging process is more reasonable and efficient. Preferably, as shown in fig. 9 and 11, after the ball-mounting step is completed, the whole structure is turned over so that the back surface of the lead frame 10 faces upward, thus facilitating the patterning step; the step of carving patterns is carried out after the step of ball planting is completed, the whole structure is only required to be turned over once in the whole packaging process, and the packaging process is more efficient.
In other embodiments, the implementation order of the above steps may also be adjusted according to actual requirements, for example: the patterning step may be performed first and then the ball-mounting step may be performed.
In the ball-mounting step, a metal core ball 90 or a solder ball is used as the solder ball 50.
In the embodiment of the present invention, the metal core ball 90 is used as the solder ball 50. Therefore, before packaging, two materials, namely the metal core ball 90 and the solder ball 50, do not need to be prepared, and only the metal core ball 90 needs to be prepared, so that the packaging process is simplified. Moreover, the metal core ball 90 has good conductive performance, which is beneficial to realizing good conduction between elements inside the packaging structure and external components or circuit structures.
In the ball-mounting step of the present embodiment, the solder layer 92 is a tin layer, and the metal core ball 90 is mounted on the exposed portion of the conductive post 40 and the exposed portion of the electrode contact 21 on the front surface of the semiconductor element 20, and heated to melt the solder layer 92 on the outer layer of the metal core ball 90, so that the solder of the conductive post 40 is melted, and after solidification, the metal core ball 90 is fixed, thereby completing the electrical connection between the metal core ball 90 and the conductive post 40 and the electrode contact 21. Preferably, in the packaging method of the present invention, the front surface of the semiconductor device 20 is selected to be provided with the front electrode pads 21, and the front electrode pads 21 are protruded with respect to the device surface, so that when the DAF material 31 is pressed, the protruded front electrode pads 21 penetrate the DAF material 31, thereby exposing the front electrode pads 21 to the outside.
In other embodiments, the semiconductor device 20 with the front electrode contact 21 flush with the device surface may be used, and the DAF material 31 located above the front electrode contact 21 is removed by grinding or other processing methods, so that the front electrode contact 21 of the semiconductor device 20 is exposed from the DAF layer 32.
Specifically, the bonding material 70 between the semiconductor element 20 embedded in the board and the lead frame 10 is cured to form a first bonding layer 71, and the bonding material 70 between the electronic element 60 located outside the board and the lead frame 10 is cured to form a second bonding layer 72.
The first bonding layer 71 in this embodiment is a conductive bonding layer, and the first bonding layer 71 is formed by curing a conductive adhesive, so that when the front and back surfaces of the semiconductor element 20 in the board are both provided with the electrode contacts 21, the electrode contacts 21 on the back surface can be led to the front surface of the package structure through the first bonding layer 71, the conductive portion 11 and the conductive pillar 40; of course, for the semiconductor element 20 without the electrode pad 21 on the back surface, the first bonding layer 71 may be an insulating and thermally conductive bonding layer.
The second bonding layer 72 in this embodiment is a conductive bonding layer, so that the electrodes of the electronic component 60 can be led to the front surface of the package structure through the second bonding layer 72, the conductive part 11, and the conductive pillar 40.
In other embodiments, the first bonding layer 71 may be formed by curing another conductive bonding material 70 such as solder paste, and the second bonding layer 72 may be formed by curing a conductive adhesive, solder paste, or the like, the bonding material 70.
In the patterning step, the adjacent conductive portions 11 may remain electrically connected, or may be completely separated by the spacer 12 to insulate them; when the spacing channel 12 is etched, the part aligned with the conductive pillar 40 is avoided, so that after the patterning is completed, the conductive part 11 and the conductive pillar 40 are kept connected, and thus the electrode of the electronic element 60 outside the board can be led to the front surface of the packaging structure through the conductive part 11, the conductive pillar 40 and the solder ball 50.
Preferably, in the drilling step, the via hole 321 is machined in the DAF layer 32 by a laser drilling machining process.
Preferably, in the conducting step, a conductive material is filled in the via hole 321 through a printing process, or through an electroplating process, or through another chemical process, and the conductive material forms the conductive pillar 40.
In the conducting step of the present embodiment, the conductive material is copper, and the conductive pillar 40 is a copper pillar, which is filled in the via hole 321 by printing copper or copper plating.
In the step of mounting the on-board element of the present embodiment, two semiconductor elements 20 are bonded to the lead frame 10. At least one of the semiconductor devices 20 is an active device, such as a triode chip 201, having electrode contacts 21 on both sides, a source contact 211 and a gate contact 212 on the front side, and a drain contact on the back side.
The invention also provides an element embedded packaging structure, the lead frame 10 and the DAF material 31 are pressed to be used as a substrate, and the semiconductor element 20 is embedded into the substrate, so that the miniaturization of a product is realized, and the space on the substrate is saved; moreover, the whole packaging structure is simpler and is convenient to package; meanwhile, the lead frame 10 is used for leading out the element electrodes, and can also be used as a heat dissipation plate for dissipating heat outwards, so that the space is efficiently utilized, and the lead frame has good heat dissipation performance.
As shown in fig. 1-13, in an embodiment of the present invention, the package structure with embedded components includes:
the lead frame 10 is a patterned conductive layer and comprises a plurality of conductive parts 11, wherein spacing channels 12 are arranged between the adjacent conductive parts 11, and the spacing channels 12 are etched by a photoetching or etching method;
a semiconductor element 20 having a back surface bonded to the front surface of the conductive portion 11 via a first bonding layer 71, and an electrode pad 21 provided on the front surface;
a DAF layer 32 covering the front surface of the lead frame 10, the front surface of the semiconductor element 20, and the side surfaces of the semiconductor element 20; the electrode contact 21 on the front surface of the semiconductor element 20 is exposed from the DAF layer 32; the DAF layer 32 is provided with a via hole 321; the DAF layer 32 is exposed by the streets 12;
a conductive pillar 40, which includes a plurality of metal core balls 90 filled in the via hole 321, where the metal core balls 90 include metal balls 91 and solder layers 92 wrapping the metal balls 91, and the adjacent solder layers 92 are connected; the conductive column 40 is connected to the conductive part 11. Wherein the side faces of the semiconductor element 20, i.e. the faces of the semiconductor element 20 between the front and back faces.
Preferably, the conductive pillar is completely filled in the via hole 321, that is, the outer wall of the conductive pillar 40 is combined with the inner wall of the via hole 321, so as to ensure the reliability of the electrical connection and the sealing performance of both sides of the via hole 321, thereby protecting the semiconductor element 20 in the board. One end of the conductive post 40 is electrically connected to the front surface of the conductive part 11, and the other end is exposed from the front surface of the DAF layer 32.
Preferably, the first bonding layer 71 is a conductive bonding layer, and when the back surface of the semiconductor element 20 is provided with the electrode contact 21, the electrode contact 21 of the back surface is led to the front surface of the package structure through the first bonding layer 71, the conductive portion 11 and the conductive pillar 40.
It should be noted that the lead frame 10 is a conductive carrier, and the lead frame 10 is used for combining with the DAF material 31 on one hand, and is used as a circuit board application, so as to facilitate embedding the semiconductor element 20 into the circuit board, thereby replacing a general PCB; on the other hand, the lead frame 10 serves as a support carrier for the semiconductor element 20; in a third aspect, the lead frame 10 is used to cooperate with the conductive posts 40 to lead the electrodes of the back surface of the semiconductor element 20 inside the board and the electrodes of the electronic element 60 outside the board to the front surface of the package structure.
The DAF layer 32 is matched with the lead frame 10, so that the packaging structure can be used as a substrate, the semiconductor element 20 is conveniently embedded into the substrate, the miniaturization of a product is favorably realized, the space on the substrate (namely outside the substrate) is saved, more spaces for mounting the electronic element 60 are formed on the board, and the high integration level of the product is favorably realized; moreover, the whole packaging structure is simple, the packaging method is simplified, and the packaging efficiency can be improved; in addition, the lead frame 10 is used for leading the electrode of the back surface of the semiconductor element 20 in the board to the front surface of the packaging structure and leading the electrode of the semiconductor element 20 outside the board to the front surface of the packaging structure, so that the electrodes of the elements of the whole packaging structure are led out from the front surface, and the whole module is convenient to be bonded with an external device or product or an electronic circuit on a PCB circuit board again; in addition, the back surface of the lead frame 10 is directly exposed for heat dissipation, and the package structure has good heat dissipation performance while efficiently utilizing space.
In this embodiment, the electrode pad 21 on the front surface of the semiconductor device 20 is protruded with respect to the device surface; in other embodiments, the electrode contact 21 on the front surface of the semiconductor device 20 may be flush with the device surface.
Preferably, in the package structure of the present invention, in order to meet higher performance requirements, a plurality of electronic components 60 are integrated, the electronic components 60 are disposed on the patterned conductive layer of the substrate embedded with components, and the front surface of the electronic components 60 is bonded to the back surface of the conductive portion 11 through the conductive second bonding layer 72; the electrode pads 21 on the front surface of the electronic component 60 are led to the front surface of the package structure through the second bonding layer 72, the conductive part 11, and the conductive pillar 40.
According to the packaging structure, the through hole 321 is filled with the metal core balls 90, the density of the metal core balls 90 is higher than that of solder, the metal core balls 90 can sink into the through hole 321 under the action of gravity, cavities at the bottom of the through hole 321 are avoided, the outer layer of the solder layer 92 can flow and fully fill gaps between the metal balls 91 after being melted, and the adjacent metal balls 91 are connected after the solder is solidified, so that cavities can be prevented from occurring in the conductive column 40; in the packaging structure of the invention, the conducting column 40 formed by combining the plurality of metal core balls 90 is adopted to fill the conducting hole 321, so that the conducting performance of the conducting column 40 is better; therefore, the conduction performance of the element, an external component and a circuit is better, and the resistance and the thermal resistance are reduced.
Preferably, the metal core balls 90 are copper core balls, wherein the copper core balls are used as inner cores, and the outer layers of the copper core balls are coated with a solder layer 92, so that the copper core balls are high in hardness, good in electric conductivity and good in heat conductivity.
Preferably, the solder layer 92 of the metal core balls 90 is a tin layer. By embedding a part of the semiconductor element 20, which is required to be provided, in the substrate, more element mounting space is reserved in the patterned conductive layer of the substrate, and the electronic element 60 can be mounted on the conductive portion 11.
Preferably, the electrode pad 21 on the front surface of the semiconductor element 20 is electrically connected to the solder ball 50, and the conductive post 40 is electrically connected to the solder ball 50.
In the present embodiment, the electrode pad 21 on the front surface of the semiconductor element 20 is directly exposed from the DAF layer 32 and is extracted through the solder ball 50, the electrode pad 21 on the back surface of the semiconductor element 20 is extracted through the first bonding layer 71, the conductive portion 11, the conductive pillar 40, and the solder ball 50, and the electrode pad 21 of the electronic element 60 is extracted through the second bonding layer 72, the conductive portion 11, the conductive pillar 40, and the solder ball 50.
Preferably, one, two or more of said semiconductor elements 20; at least one of the semiconductor elements 20 is an active triode wafer 201;
the electrode contact 21 of the triode wafer 201 comprises a drain contact arranged on the back surface, a source contact 211 arranged on the front surface and a gate contact 212; the drain contact is led to the front surface of the packaging structure through the conductive part 11 and the conductive column 40; the source contact 211 and the gate contact 212 are exposed by the DAF layer 32.
Preferably, a plurality of the electronic elements 60 are included, and the electronic elements 60 are wafers 61 or passive elements 62.
The number of the wafers 61 may be one, two or more, and the number of the passive elements 62 may be one, two or more.
In this embodiment, two wafers 61 and one passive component 62 are included.
In the description herein, it is to be understood that the terms "upper", "lower", "left", "right", and the like are used in an orientation or positional relationship based on that shown in the drawings, and are used for convenience of description and simplicity of operation only, and do not indicate or imply that the referenced device or element must have a particular orientation, be constructed in a particular orientation, and be operated, and thus should not be construed as limiting the present invention. Furthermore, the terms "first" and "second" are used merely for descriptive purposes and are not intended to have any special meaning.
In the description herein, references to the description of "an embodiment," "an example" or the like are intended to mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example.
Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be appropriately combined to form other embodiments as will be appreciated by those skilled in the art.
The technical principle of the present invention is described above in connection with specific embodiments. The description is made for the purpose of illustrating the principles of the invention and should not be construed in any way as limiting the scope of the invention. Based on the explanations herein, those skilled in the art will be able to conceive of other embodiments of the present invention without inventive effort, which would fall within the scope of the present invention.
Claims (10)
1. A method for encapsulating an embedded component, comprising:
providing a lead frame (10) and a semiconductor element (20), and combining the back surface of the semiconductor element (20) with the front surface of the lead frame (10) by adopting a bonding material (70) to form a primary structure;
providing a DAF material (31), covering and pressing the DAF material (31) on the front surface of the primary structure, forming a DAF layer (32) on the front surface of the primary structure, and exposing an electrode contact (21) on the front surface of the semiconductor element (20) from the DAF layer (32);
processing a through via hole (321) in the DAF layer (32);
placing a plurality of metal core balls (90) to the through holes (321), wherein the metal core balls (90) comprise metal balls (91) and solder layers (92) coated outside the metal balls; melting and solidifying the solder layer (92) again to connect the metal core balls (90) to form a conductive column (40);
and patterning the lead frame (10) to form a plurality of conductive parts (11) electrically connected with the conductive columns (40).
2. The method of encapsulating an embedded component of claim 1, further comprising: an electrode contact (21) on the front surface of the semiconductor element (20), and a solder ball (50) implanted on the conductive post (40); the solder ball (50) is the metal core ball (90).
3. The method of encapsulating an embedded component of claim 1, further comprising: an electronic component (60) is provided, and the electronic component (60) is bonded to the back surface of the conductive part (11) using a conductive bonding material.
4. The method for encapsulating an embedded component according to any of the claims 1-3, characterized in that the via hole (321) is machined in the DAF layer (32) by a laser drilling process; the lead frame (10) is patterned by a photolithographic process, or by an etching process.
5. A component-embedded package, comprising:
a lead frame (10) which is a patterned conductive layer comprising several conductive portions (11);
a semiconductor element (20) having a back surface bonded to the front surface of the conductive portion (11) by a first bonding layer (71), and having an electrode pad (21) on the front surface;
a DAF layer (32) covering the front surface of the lead frame (10) and the semiconductor element (20); the electrode contact (21) on the front surface of the semiconductor element (20) is exposed from the DAF layer (32); the DAF layer (32) is provided with a through hole (321);
the conductive column (40) comprises a plurality of metal core balls (90) filled in the via holes (321), the metal core balls (90) comprise metal balls (91) and solder layers (92) wrapping the outside of the metal balls (91), and the adjacent solder layers (92) are connected; one end of the conductive column (40) is connected to the conductive part (11), and the other end is exposed from the DAF layer (32).
6. The component-embedded package structure according to claim 5, further comprising an electronic component (60), wherein a front surface of the electronic component (60) is bonded to a rear surface of the conductive portion (11) by a conductive second bonding layer (72).
7. The embedded component package structure of claim 5, further comprising a plurality of solder balls (50), said solder balls (50) being said metal core balls (90); the electrode contact (21) on the front surface of the semiconductor element (20) is electrically connected to the solder ball (50), and the conductive post (40) is electrically connected to the solder ball (50).
8. The embedded component package structure according to any one of claims 5-7, wherein the metal balls (91) are copper balls.
9. The embedded component package structure of any one of claims 5-7, comprising one, two or more of said semiconductor components (20); at least one of the semiconductor elements (20) is a triode wafer (201);
the electrode contact (21) of the triode wafer (201) comprises a drain contact arranged on the back surface, a source contact (211) arranged on the front surface and a grid contact (212); the drain contact is led to the front surface of the packaging structure through the conductive part (11) and the conductive column (40); the source contact (211) and the gate contact (212) are exposed by the DAF layer (32).
10. The embedded component packaging structure of claim 6, comprising a plurality of the electronic components (60), wherein the electronic components (60) are dies (61) or passive components (62).
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| Publication number | Priority date | Publication date | Assignee | Title |
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| TW201603201A (en) * | 2014-07-07 | 2016-01-16 | 萬國半導體股份有限公司 | Embedded package and packaging method |
| CN106158780A (en) * | 2016-08-11 | 2016-11-23 | 华天科技（西安）有限公司 | The encapsulating structure of a kind of DAF film parcel fingerprint sensor and manufacture method thereof |
| CN110970374A (en) * | 2019-12-31 | 2020-04-07 | 湖北方晶电子科技有限责任公司 | Flip-chip power device packaging structure |
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| JP2011165741A (en) * | 2010-02-05 | 2011-08-25 | Renesas Electronics Corp | Semiconductor device, and method of manufacturing the same |
| KR101695352B1 (en) * | 2010-08-12 | 2017-01-12 | 삼성전자 주식회사 | Lead frame, and semiconductor package having the same |
| JP6994646B2 (en) * | 2018-01-17 | 2022-01-14 | パナソニックＩｐマネジメント株式会社 | Method of manufacturing element chips |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW201603201A (en) * | 2014-07-07 | 2016-01-16 | 萬國半導體股份有限公司 | Embedded package and packaging method |
| CN106158780A (en) * | 2016-08-11 | 2016-11-23 | 华天科技（西安）有限公司 | The encapsulating structure of a kind of DAF film parcel fingerprint sensor and manufacture method thereof |
| CN110970374A (en) * | 2019-12-31 | 2020-04-07 | 湖北方晶电子科技有限责任公司 | Flip-chip power device packaging structure |
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