CN215266272U - High-radiating-plate-level fan-out packaging structure based on copper foil carrier plate - Google Patents
High-radiating-plate-level fan-out packaging structure based on copper foil carrier plate Download PDFInfo
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- CN215266272U CN215266272U CN202121371912.1U CN202121371912U CN215266272U CN 215266272 U CN215266272 U CN 215266272U CN 202121371912 U CN202121371912 U CN 202121371912U CN 215266272 U CN215266272 U CN 215266272U
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/24137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The utility model discloses a high heat dissipation plate level fan-out packaging structure based on a copper foil carrier plate, which comprises a copper foil carrier plate; the first rewiring layer is positioned on one side of the copper foil carrier plate, and the first plastic packaging layer wraps the first rewiring layer; the heat dissipation device comprises a plurality of heat dissipation elements arranged on the first rewiring layer at intervals and a plurality of chips adhered to the heat dissipation elements through die attach adhesives; the second plastic packaging layer wraps the chip and the radiating element, and a connecting hole for exposing the first rewiring layer is formed in the second plastic packaging layer along the thickness direction of the second plastic packaging layer; and the electric connection structure is positioned on one surface of the second plastic packaging layer, which is far away from the first plastic packaging layer, and is respectively electrically connected with the chip and the first rewiring layer. The utility model discloses be provided with radiating element, the heat that the chip during operation produced can derive the heat to the heavy wiring layer through radiating element fast, and the heavy wiring layer can give off the heat outside packaging structure, has improved the radiating efficiency of chip, has solved the chip that the chip is overheated and lead to and has scrapped the problem.
Description
Technical Field
The utility model relates to an integrated circuit packaging technology field, concretely relates to high heat dissipation board level fan-out packaging structure based on copper foil carrier plate.
Background
In recent years, in order to increase the mounting density of printed wiring boards and to achieve miniaturization, multilayering of printed wiring boards has been widely performed. Such multilayer printed wiring boards are used in many portable electronic devices for the purpose of weight reduction and size reduction. Thus, the multilayer printed wiring board is required to be further reduced in thickness of the interlayer insulating layer and further reduced in weight as a wiring board. However, the heat dissipation of the chip is mainly performed through the large-area substrate, and the heat dissipation surface area of the chip is also reduced due to the reduction of the package size, which requires that the heat conduction performance of the packaged chip is sufficiently good.
Generally speaking, when a fan-out package structure is manufactured, a chip needs to be plastically packaged, then a laser opening is performed on a plastic package layer to expose an I/O interface of the chip, a conductive post is formed in a through hole through electroplating to lead out electrical properties of the chip, the temperature near the I/O interface of the chip is too high due to the laser opening, and the chip is wrapped in a plastic package material (usually epoxy resin and other materials), so that the heat dissipation efficiency of the chip is low, and the chip may be scrapped.
Therefore, it becomes very important to develop a new high heat dissipation chip packaging technology.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a high radiator plate level fan-out packaging structure based on copper foil support plate improves the radiating efficiency of chip, solves the chip problem of scrapping that the laser trompil leads to.
To achieve the purpose, the utility model adopts the following technical proposal:
the utility model provides a high heat dissipation board level fan-out packaging structure based on copper foil carrier plate includes:
a copper foil carrier;
the first rewiring layer is positioned on one side of the copper foil carrier plate, and the first plastic package layer wraps the first rewiring layer;
the heat dissipation elements are arranged on the first rewiring layer at intervals, and the chips are adhered to the heat dissipation elements through die attach adhesives;
the second plastic packaging layer wraps the chip and the radiating element, and a connecting hole for exposing the first rewiring layer is formed in the second plastic packaging layer along the thickness direction of the second plastic packaging layer;
and the electric connection structure is positioned on one surface of the second plastic package layer, which is far away from the first plastic package layer, and is respectively electrically connected with the chip and the first rewiring layer.
As a preferred scheme of the high heat dissipation plate level fan-out package structure based on the copper foil carrier, the connecting hole is filled with a conductive post, one end of the conductive post is electrically connected with the first redistribution layer, and the other end of the conductive post is electrically connected with the electrical connection structure.
As a preferred scheme of a high heat dissipation board level fan-out package structure based on a copper foil carrier, the electrical connection structure includes:
the second rewiring layer is positioned on one surface, far away from the first plastic packaging layer, of the second plastic packaging layer and is electrically connected with the conductive columns and the chip respectively;
the third plastic packaging layer coats the second rewiring layer;
the chips are electrically connected through the second redistribution layer, and the chips can be electrically connected with the first redistribution layer through the second redistribution layer and the conductive columns.
As a preferred scheme of the high heat dissipation plate level fan-out package structure based on the copper foil carrier, the chip includes a bare chip, an I/O interface located in the bare chip, and a metal bump protruding out of the bare chip and electrically connected to the I/O interface, the metal bump is exposed out of the second plastic package layer, and one end of the metal bump, which is far away from the bare chip, is electrically connected to the second redistribution layer.
As a preferred scheme of the high-radiating-plate-level fan-out packaging structure based on the copper foil carrier plate, the copper foil carrier plate comprises a carrier plate, copper layers pressed on the upper surface and the lower surface of the carrier plate and copper foils attached to the copper layers on one surface, and the first redistribution layer is located on the copper foils.
As a preferred scheme of the high heat dissipation board level fan-out packaging structure based on the copper foil carrier, the metal bump is a tin solder, a copper solder, a silver solder or a gold-tin alloy solder.
As a preferred scheme of the high-radiating-board-level fan-out packaging structure based on the copper foil carrier, the die bond adhesive is solder paste, copper paste, sintering paste, graphene, silver adhesive, non-conductive adhesive or conductive adhesive.
As a preferred scheme of the high heat dissipation board level fan-out package structure based on the copper foil carrier, the heat dissipation element is a copper block.
As a preferred scheme of the high-radiating-plate-level fan-out packaging structure based on the copper foil carrier plate, the connecting hole is formed by communicating adjacent tapered holes at the ends of an upper small hole and a lower small hole.
As a preferable scheme of the high heat dissipation board level fan-out package structure based on the copper foil carrier, the first redistribution layer and the second redistribution layer are of one-layer or multi-layer structures.
The utility model has the advantages that:
(1) the utility model discloses a chip is attached on heat-radiating element through solid crystal glue, and the heat that the chip during operation produced is through solid crystal glue transmission to heat-radiating element on, and heat-radiating element can derive the heat of chip to rewiring layer fast, and rewiring layer can give off the heat outside packaging structure, has improved the radiating efficiency of chip, has solved the overheated and chip that leads to of chip and has scrapped the problem.
(2) The utility model discloses carry out layer upon layer plastic envelope to packaging structure, first plastic envelope layer carries out the plastic envelope to first rewiring layer, and the second plastic envelope layer carries out the plastic envelope to the chip, and the third plastic envelope layer carries out the plastic envelope to second rewiring layer, strengthens the sealed protection to packaging structure, has improved packaging structure's stability.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required to be used in the embodiments of the present invention will be briefly described below. It is obvious that the drawings described below are only some embodiments of the invention, and that for a person skilled in the art, other drawings can be obtained from these drawings without inventive effort.
Fig. 1 is a schematic cross-sectional view of a copper foil carrier according to an embodiment of the present invention.
Fig. 2 is a schematic cross-sectional view of an intermediate product after manufacturing a first redistribution layer according to an embodiment of the present invention.
Fig. 3 is a schematic cross-sectional view of an intermediate product after manufacturing the first plastic package layer according to an embodiment of the present invention.
Fig. 4 is a schematic cross-sectional view of an intermediate product after the heat dissipation element is implanted according to an embodiment of the present invention.
Fig. 5 is a schematic cross-sectional view of an intermediate product after chip implantation according to an embodiment of the present invention.
Fig. 6 is a schematic cross-sectional view of an intermediate product after a second plastic package layer is manufactured according to an embodiment of the present invention.
Fig. 7 is a schematic cross-sectional view of an intermediate product after a second redistribution layer is formed according to an embodiment of the present invention.
Fig. 8 is a schematic cross-sectional view of an intermediate product after a third plastic package layer is manufactured according to an embodiment of the present invention.
Fig. 9 is a schematic cross-sectional view of a copper foil carrier board-based high-thermal-dissipation board-level fan-out package structure after the copper foil carrier board is removed.
In fig. 1 to 9:
1. a copper foil carrier; 11. a carrier plate; 12. a copper layer; 13. copper foil;
2. a first rewiring layer; 3. a first plastic packaging layer; 4. a heat dissipating element; 5. die bonding glue;
6. a chip; 61. a bare chip; 62. an I/O interface; 63. a metal bump;
7. a second plastic packaging layer; 8. a conductive post; 9. a second rewiring layer; 10. a third plastic packaging layer;
100. and connecting the holes.
Detailed Description
The technical solution of the present invention is further explained by the following embodiments with reference to the accompanying drawings.
Wherein the showings are for the purpose of illustration only and are shown by way of illustration only and not in actual form, and are not to be construed as limiting the present patent; for a better understanding of the embodiments of the present invention, some parts of the drawings may be omitted, enlarged or reduced, and do not represent the size of an actual product; it will be understood by those skilled in the art that certain well-known structures in the drawings and descriptions thereof may be omitted.
The same or similar reference numerals in the drawings of the embodiments of the present invention correspond to the same or similar parts; in the description of the present invention, it should be understood that if the terms "upper", "lower", "left", "right", "inner", "outer", etc. are used to indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, it is only for convenience of description and simplification of description, but it is not indicated or implied that the device or element referred to must have a specific orientation, be constructed in a specific orientation, and be operated, and therefore, the terms describing the positional relationship in the drawings are used only for illustrative purposes and are not to be construed as limiting the present patent, and the specific meaning of the terms will be understood by those skilled in the art according to the specific circumstances.
In the description of the present invention, unless otherwise explicitly specified or limited, the term "connected" or the like, if appearing to indicate a connection relationship between the components, is to be understood broadly, for example, as being either a fixed connection, a detachable connection, or an integral part; can be mechanically or electrically connected; they may be directly connected or indirectly connected through intervening media, or may be connected through one or more other components or may be in an interactive relationship with one another. The specific meaning of the above terms in the present invention can be understood in specific cases to those skilled in the art.
As shown in fig. 8, the utility model provides a high radiator plate level fan-out packaging structure based on copper foil carrier plate, include:
a copper foil carrier 1;
the copper foil carrier comprises a first rewiring layer 2 and a first plastic package layer 3, wherein the first rewiring layer 2 is located on one side of the copper foil carrier 1, the first plastic package layer 3 covers the first rewiring layer 2, and the first rewiring layer 2 is flush with the first plastic package layer 3;
a plurality of heat dissipation elements 4 arranged on the first rewiring layer 2 at intervals and a plurality of chips 6 adhered to the heat dissipation elements 4 through die attach adhesives 5;
a second plastic packaging layer 7 for coating the chip 6 and the heat dissipation element 4, wherein the second plastic packaging layer 7 is provided with a connecting hole 100 along the thickness direction for exposing the first rewiring layer 2, and the connecting hole 100 is formed by communicating adjacent tapered holes at the upper small hole end and the lower small hole end;
and the electric connection structure is positioned on one surface of the second plastic package layer 7, which is far away from the first plastic package layer 3, and is respectively electrically connected with the chip 6 and the first rewiring layer 2.
Optionally, the heat dissipation element 4 is a copper block.
Optionally, the die attach adhesive 5 is a solder paste, a copper paste, a sintering paste, graphene, a silver paste, a non-conductive adhesive, or a conductive adhesive, and has functions of adhesion, electrical conduction, and thermal conduction.
Specifically, the connection hole 100 is filled with the conductive pillar 8, one end of the conductive pillar 8 is electrically connected to the first redistribution layer 2, and the other end is electrically connected to the electrical connection structure.
Alternatively, the material of the conductive post 8 in the present embodiment may adopt Cu, Ag or Au.
The utility model discloses a chip 6 is attached on radiator element 4 through solid crystal glue 5, and the heat that chip 6 during operation produced is through solid crystal glue 5 transmission to radiator element 4 on, and radiator element 4 can derive the heat of chip 6 to first rewiring layer 2 fast, and first rewiring layer 2 can give off the heat outside packaging structure, has improved chip 6's radiating efficiency, has solved chip 6 overheated and the chip 6 problem of scrapping that leads to.
Specifically, the electrical connection structure includes:
the second rewiring layer 9 is positioned on one surface, away from the first plastic package layer 3, of the second plastic package layer 7, and the second rewiring layer 9 is electrically connected with the conductive columns 8 and the chip 6 respectively;
a third plastic packaging layer 10, wherein the second rewiring layer 9 is coated by the third plastic packaging layer 10;
the chips 6 are electrically connected through the second redistribution layer 9, and the chips 6 can be electrically connected with the first redistribution layer 2 through the second redistribution layer 9 and the conductive pillars 8.
The utility model discloses carry out layer upon layer plastic envelope to packaging structure, first plastic envelope layer 3 carries out the plastic envelope to first rewiring layer 2, and second plastic envelope layer 7 carries out the plastic envelope to chip 6, and third plastic envelope layer 10 carries out the plastic envelope to second rewiring layer 9, strengthens the sealed protection to packaging structure, has improved packaging structure's stability.
Specifically, the chip 6 includes a bare chip 61, an I/O interface 62 located in the bare chip 61, and a metal bump 63 protruding from the bare chip 61 and electrically connected to the I/O interface 62, wherein the metal bump 63 is exposed out of the second molding compound layer 7, and one end of the metal bump 63 away from the bare chip 61 is electrically connected to the second redistribution layer 9.
Alternatively, the metal bump 63 is solder, brazing material, silver solder or gold-tin alloy solder, and the metal bump 63 of the present embodiment is preferably made of brazing material and made into a copper pillar.
As shown in fig. 1, the copper foil carrier 1 includes a carrier 11, copper layers 12 laminated on the upper and lower surfaces of the carrier 11, and a copper foil 13 attached to one of the copper layers 12, wherein the first redistribution layer 2 is disposed on the copper foil 13.
Alternatively, the first rewiring layer 2 and the second rewiring layer 9 are each a one-layer or multi-layer structure.
Optionally, the first Molding Compound layer 3, the second Molding Compound layer 7, and the third Molding Compound layer 10 are all made of polyimide, silicone, or EMC (Epoxy Molding Compound), which is preferred in this embodiment, and can improve the stability of the package structure and play a role in protecting the chip 6.
The utility model also provides a preparation method of high radiator plate level fan-out packaging structure based on copper foil support plate, including following step:
s10, providing the copper foil carrier plate 1 and the first photosensitive dry film, and attaching the first photosensitive dry film to the copper foil carrier plate 1;
s20, forming a first patterning hole on the first photosensitive dry film through exposure and development;
s30, performing electroplating process, forming a first redistribution layer 2 in the first patterned hole, and removing the remaining first photosensitive dry film, referring to fig. 2;
s40, performing plastic package on the first redistribution layer 2 to form a first plastic package layer 3, and performing grinding processing on the first plastic package layer 3 to expose the first redistribution layer 2, referring to fig. 3;
s50, providing a plurality of heat dissipation elements 4, and implanting the heat dissipation elements 4 onto the first redistribution layer 2, referring to fig. 4;
s60, providing a plurality of chips 6, and adhering the chips 6 to the heat dissipation elements 4 one by one through the die attach adhesive 5, referring to fig. 5;
s70, carrying out plastic package on the chip 6 and the radiating element 4 to form a second plastic package layer 7, and grinding the second plastic package layer 7 to expose the metal bump 63 of the chip 6;
s80, opening the second plastic package layer 7 to form a connection hole 100 exposing the first redistribution layer 2, referring to fig. 6;
s90, forming a seed layer (not shown in the figure) on the surface of the second molding compound layer 7 and the hole wall of the connection hole 100 by vacuum sputtering;
s100, providing a second photosensitive dry film, and attaching the second photosensitive dry film to the seed layer;
s110, forming a second patterning hole on the second photosensitive dry film through exposure and development;
s120, performing an electroplating process, forming a conductive pillar 8 in the connection hole 100, forming a second redistribution layer 9 in the second patterned hole, and removing the remaining second photosensitive dry film and the seed layer, referring to fig. 7;
s130, plastic packaging the second redistribution layer 9 to form a third plastic packaging layer 10, referring to fig. 8.
When the packaging structure is used, the copper foil carrier 1 under the first redistribution layer 2 is removed, referring to fig. 9.
Compared with a common carrier, the copper foil carrier 1 of the embodiment does not need to manufacture a seed layer on the copper foil carrier 1 when manufacturing the first redistribution layer 2, the copper foil 13 on the surface of the copper foil carrier 1 can be used as the seed layer, and the first redistribution layer 2 can be formed by directly pasting a photosensitive dry film on the copper foil carrier 1 and then carrying out exposure, development and electroplating treatment, which is simpler in process.
It should be understood that the above-described embodiments are merely illustrative of the preferred embodiments of the present invention and the technical principles thereof. It will be understood by those skilled in the art that various modifications, equivalents, changes, and the like can be made to the present invention. However, these modifications are within the scope of the present invention as long as they do not depart from the spirit of the present invention. In addition, certain terms used in the specification and claims of the present application are not limiting, but are used merely for convenience of description.
Claims (10)
1. The utility model provides a high heat dissipation board level fan-out packaging structure based on copper foil carrier plate which characterized in that includes:
a copper foil carrier;
the first rewiring layer is positioned on one side of the copper foil carrier plate, and the first plastic package layer wraps the first rewiring layer;
the heat dissipation elements are arranged on the first rewiring layer at intervals, and the chips are adhered to the heat dissipation elements through die attach adhesives;
the second plastic packaging layer wraps the chip and the radiating element, and a connecting hole for exposing the first rewiring layer is formed in the second plastic packaging layer along the thickness direction of the second plastic packaging layer;
and the electric connection structure is positioned on one surface of the second plastic package layer, which is far away from the first plastic package layer, and is respectively electrically connected with the chip and the first rewiring layer.
2. The high heat spreader level fan-out package structure of claim 1, wherein the connecting holes are filled with conductive pillars, one end of each conductive pillar is electrically connected to the first redistribution layer, and the other end of each conductive pillar is electrically connected to the electrical connection structure.
3. The copper foil carrier-based high heat spreader level fan-out package structure of claim 2, wherein the electrical connection structure comprises:
the second rewiring layer is positioned on one surface, far away from the first plastic packaging layer, of the second plastic packaging layer and is electrically connected with the conductive columns and the chip respectively;
the third plastic packaging layer coats the second rewiring layer;
the chips are electrically connected through the second redistribution layer, and the chips can be electrically connected with the first redistribution layer through the second redistribution layer and the conductive columns.
4. The high heat spreader level fan-out package structure of claim 3, wherein the chip comprises a bare chip, an I/O interface located in the bare chip, and a metal bump protruding from the bare chip and electrically connected to the I/O interface, the metal bump is exposed out of the second molding compound layer, and an end of the metal bump away from the bare chip is electrically connected to the second redistribution layer.
5. The high heat dissipating plate level fan-out package structure based on a copper foil carrier of claim 4, wherein the copper foil carrier comprises a carrier, copper layers laminated on the upper and lower surfaces of the carrier, and a copper foil attached to one of the copper layers, and the first redistribution layer is disposed on the copper foil.
6. The high heat dissipating board level fan-out package structure based on a copper foil carrier of claim 4, wherein the metal bump is a tin solder, a copper solder, a silver solder or a gold-tin alloy solder.
7. The high heatsink plate level fan-out package structure based on a copper foil carrier of any one of claims 1-6, wherein the die bond paste is solder paste, copper paste, sintering paste, graphene, silver paste, non-conductive paste, or conductive paste.
8. The copper foil carrier-based high heat spreader level fan-out package structure of any one of claims 1-6, wherein the heat spreader component is a copper block.
9. The high heat dissipation plate level fan-out packaging structure based on the copper foil carrier plate as claimed in any one of claims 1 to 6, wherein the connecting hole is formed by communicating adjacent tapered holes at the end of the upper and lower small holes.
10. The copper foil carrier board-based high heat dissipation board level fan-out package structure of any one of claims 3-6, wherein the first redistribution layer and the second redistribution layer are one or more layers.
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CN202121371912.1U CN215266272U (en) | 2021-06-18 | 2021-06-18 | High-radiating-plate-level fan-out packaging structure based on copper foil carrier plate |
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CN202121371912.1U CN215266272U (en) | 2021-06-18 | 2021-06-18 | High-radiating-plate-level fan-out packaging structure based on copper foil carrier plate |
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- 2021-06-18 CN CN202121371912.1U patent/CN215266272U/en active Active
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