CN112597002A - Python script based test vector generation method - Google Patents
Python script based test vector generation method Download PDFInfo
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- CN112597002A CN112597002A CN202011444173.4A CN202011444173A CN112597002A CN 112597002 A CN112597002 A CN 112597002A CN 202011444173 A CN202011444173 A CN 202011444173A CN 112597002 A CN112597002 A CN 112597002A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/3668—Software testing
- G06F11/3672—Test management
- G06F11/3684—Test management for test design, e.g. generating new test cases
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/3668—Software testing
- G06F11/3672—Test management
- G06F11/368—Test management for test version control, e.g. updating test cases to a new software version
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Abstract
A method for generating test vectors based on Python scripts. The method for generating the test vector is used for solving the defects that a simulation environment is needed or time and labor are wasted in the existing test vector generation process. The method comprises the four steps of firstly determining a keyword of a tested function according to the tested function of a tested chip, then filling in and generating a vector function table according to the keyword, then generating a Python script for printing a test vector corresponding to the keyword for generating the vector function table, and finally running the test vector generation script to generate the required test vector. By using the method, the test vectors can be generated automatically in batches with high efficiency, the vector generation period is shortened, and the test cost is reduced.
Description
Technical Field
The invention belongs to the technical field of chip testing, and particularly relates to a method for generating a test vector based on a Python script.
Background
An Integrated Circuit (IC) test is to detect defects generated in manufacturing, and a test system is generally adopted for testing an IC at present, and a test vector file is required to be configured for system testing, and a test vector generation technology is always a research hotspot in the industry. Generally, test vectors are generated by adopting methods of generating simulation environment and handwriting test vectors, but the simulation vectors cannot be realized at all under the condition of no environment support, and the generation of vectors in tens of thousands of rows by using simulation or handwriting vectors requires great labor and time cost, so that the debugging and updating of the test vectors are not facilitated.
Disclosure of Invention
In order to overcome the defects that the simulation environment is needed or time and labor are wasted in the existing test vector generation process, the invention provides the test vector generation method.
The technical scheme adopted by the invention to solve the technical problem is as follows:
a method for generating a test vector based on a Python script, wherein the method for generating the test vector by the script comprises the following steps:
(1) determining a keyword of the function to be tested according to the function to be tested of the chip to be tested;
(2) filling in and generating a vector function table according to the keywords;
(3) generating a Python script for printing the test vector corresponding to the keyword for generating the vector function table;
(4) and running the test vector generation script to generate the required test vector.
The test functions determined in step (1) are all functions of the chip to be tested, which are determined by the chip to be tested, and the keywords are filled in the vector function generating table in step (2).
And (2) combining each test function by using the keywords appointed in the step (1), wherein each row in the generated vector function table is composed of related keywords and different test items with different behaviors are used for automatically generating the required test vectors in batch, and the keywords not only comprise the functions of the tested chips, but also comprise the names of the test items and the names of the generated test vectors.
And (3) reading the generated vector function table, and correspondingly generating a test vector for printing the test function according to the keywords filled in the table.
And (4) after the preparation of the first three steps, running the test vector generation script in the step (4), generating all vectors required in batch, and finishing the generation of the required vectors.
In one embodiment of the invention, the testing comprises:
determining keywords according to chip test functions, filling a generated vector function table, reading the generated vector function table by using the Python script, and generating test vectors corresponding to the functions according to the generated vector function table.
Compared with the prior art, the invention has the beneficial effects that:
1. the method for generating the test vector is adopted to replace a method for generating the test vector by utilizing a simulation environment, so that the dependence of the test vector generation on the environment is reduced, and the test vector is updated or generated without the simulation environment;
2. the vector required by the test is generated by using a Python script printing mode, so that the real-time performance is higher, the time spent on vector generation is reduced, and the vector generation efficiency is improved;
3. the test vector generation method adopted by the invention is a completely independent test vector test method, and can be used for generating test vectors in a laboratory or being matched with a test machine in a test factory.
Drawings
The invention is further illustrated with reference to the following figures and examples.
FIG. 1 is a vector generation flow diagram of a Python script-based test vector generation method according to the present invention.
Fig. 2 is a vector generation function table of a method for generating a test vector based on a Python script according to an embodiment of the present invention.
Fig. 3 is a generated vector of a method for generating a test vector based on a Python script according to an embodiment of the present invention.
Detailed Description
The following detailed description of embodiments of the invention refers to the accompanying drawings. It should be understood that the particular embodiments described herein are illustrative and explanatory only and are not restrictive of the invention.
It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments in accordance with the present application.
Referring to fig. 1, fig. 2, and fig. 3, fig. 1 is a schematic diagram of a vector generation flow of a method for generating a test vector based on a Python script according to an embodiment of the present invention; FIG. 2 is a function table of a generated vector for a method for generating a test vector based on a Python script according to an embodiment of the present invention; fig. 3 is a generated vector of a method for generating a test vector based on a Python script according to an embodiment of the present invention. Referring to fig. 1, the method includes the following steps:
(1) determining a keyword of the function to be tested according to the function to be tested of the chip to be tested;
(2) filling in and generating a vector function table according to the keywords;
(3) generating a Python script for printing a test vector corresponding to the keyword;
(4) and running the test vector generation script to generate the required test vector.
In this example, taking the Flash memory test vector of the target chip as an example, the tester adopted is a Chroma3360 ATE machine of the china electronic company, and the generated vector is generated according to the format required by the Chroma3360 ATE test machine.
Wherein, the step (1) comprises that the determined test functions are all functions to be tested of the tested chip and are determined by the tested chip;
in this example, the keywords of the functions required by the Flash test chip are determined, such as the keywords of "init _ input", "seri _ mode", "rand _ read _ con" in the CMD column in fig. 2, and the parameters required by the Flash test, such as chip selection, address, data, and the like, are configured;
the step (2) comprises the steps of combining each test function by using the keywords determined in the step (1), wherein each row in a generated vector function table is composed of related keywords and different test items are used for automatically generating the required test vectors in batch, and the keywords not only comprise the functions of the tested chips, but also comprise the names of the test items and the names of the generated test vectors;
reading the generated vector function table, correspondingly printing test vectors of the test function according to keywords filled in the table, wherein each keyword corresponds to a corresponding test vector and comprises an input 0/1, an output L/H and cycle times of each PAD of the chip, and the keywords also comprise parts contained in the test vectors, including the PAD of the chip at the beginning of the vector and the vector at the end of the vector;
and (4) running the script and generating the required test vectors in batches. The ATE test machine provides a stimulation signal for the chip according to the input signal value provided by the function pattern so that the chip executes a corresponding function according to the stimulation signal; and the ATE testing machine compares the signal value output by the chip with the output signal value stored in the function pattern, so as to test the function of the chip Flash.
The above description is only a preferred embodiment of the present invention, and the present invention is not limited to the above embodiment, and any modifications, equivalent substitutions, improvements, etc. within the spirit and principle of the present invention should be included in the protection scope of the present invention as long as the technical effects of the present invention are achieved by the same means. The invention is capable of other modifications and variations in its technical solution and/or its implementation, within the scope of protection of the invention.
Claims (4)
1. A method for generating a test vector based on a Python script is suitable for generating the test vector, and is characterized by comprising the following steps:
(1) determining a keyword of the function to be tested according to the function to be tested of the chip to be tested;
(2) filling in and generating a vector function table according to the keywords;
(3) generating a Python script for printing the test vector corresponding to the keyword for generating the vector function table;
(4) and running the test vector generation script to generate the required test vector.
2. The generate vector function table of claim 1, wherein: and the generated vector function table is a chip test item according to the keyword combination.
3. The method of claim 1, wherein the method for generating test vectors based on Python scripts comprises: the step (3) comprises:
reading keywords in the generated vector function table by a Python script;
and generating a script for printing the test vector according to the vector function generating table.
4. The method of claim 1, wherein the method for generating test vectors based on Python scripts comprises: the step (4) comprises the following steps:
running a Python script to generate a test vector;
the Python script comprises judgment keywords and generates a test vector of each test item line by line.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113849419A (en) * | 2021-12-02 | 2021-12-28 | 上海燧原科技有限公司 | Method, system, equipment and storage medium for generating test vector of chip |
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| CN104484269A (en) * | 2014-11-27 | 2015-04-01 | 北京广利核系统工程有限公司 | Method for automatically generating testing script |
| US20180260309A1 (en) * | 2017-03-11 | 2018-09-13 | Wipro Limited | Method and system for semantic test suite reduction |
| CN110727599A (en) * | 2019-10-17 | 2020-01-24 | 青岛海信宽带多媒体技术有限公司 | Test environment configuration and updating method |
| CN110955608A (en) * | 2019-12-23 | 2020-04-03 | 金蝶软件（中国）有限公司 | Test data processing method and device, computer equipment and storage medium |
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- 2020-12-08 CN CN202011444173.4A patent/CN112597002A/en active Pending
Patent Citations (5)
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| CN101614788A (en) * | 2009-07-17 | 2009-12-30 | 中国人民解放军63908部队 | A kind of method of testing of automatically generated vectors of digital circuit board |
| CN104484269A (en) * | 2014-11-27 | 2015-04-01 | 北京广利核系统工程有限公司 | Method for automatically generating testing script |
| US20180260309A1 (en) * | 2017-03-11 | 2018-09-13 | Wipro Limited | Method and system for semantic test suite reduction |
| CN110727599A (en) * | 2019-10-17 | 2020-01-24 | 青岛海信宽带多媒体技术有限公司 | Test environment configuration and updating method |
| CN110955608A (en) * | 2019-12-23 | 2020-04-03 | 金蝶软件（中国）有限公司 | Test data processing method and device, computer equipment and storage medium |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN113849419A (en) * | 2021-12-02 | 2021-12-28 | 上海燧原科技有限公司 | Method, system, equipment and storage medium for generating test vector of chip |
| CN113849419B (en) * | 2021-12-02 | 2022-04-05 | 上海燧原科技有限公司 | Method, system, equipment and storage medium for generating test vector of chip |
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