CN112289762A - 使用具有环的晶圆形成焊料凸块 - Google Patents

使用具有环的晶圆形成焊料凸块 Download PDF

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Publication number
CN112289762A
CN112289762A CN202010693090.2A CN202010693090A CN112289762A CN 112289762 A CN112289762 A CN 112289762A CN 202010693090 A CN202010693090 A CN 202010693090A CN 112289762 A CN112289762 A CN 112289762A
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Prior art keywords
wafer
ring
substrate
solder bump
mounting
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CN202010693090.2A
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English (en)
Inventor
野间崇
大漥升
林育圣
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Semiconductor Components Industries LLC
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Semiconductor Components Industries LLC
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Publication of CN112289762A publication Critical patent/CN112289762A/zh
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Abstract

本发明涉及使用具有环的晶圆形成焊料凸块。可在环状基板的正面上形成至少一个电路元件，并且可将环状基板安装在安装卡盘上。安装卡盘可具有内部凸起部分和围绕安装卡盘的周边的凹陷环，内部凸起部分被配置为在其上接纳基板的减薄部分，并且凹陷环被配置为在其中接纳环状基板的外环。可形成至少一个焊料凸块，在环状晶圆被设置在安装卡盘上时，至少一个焊料凸块电连接到至少一个电路元件。

Description

使用具有环的晶圆形成焊料凸块
技术领域
本说明书涉及在具有环的晶圆上形成晶圆级焊料凸块。
背景技术
在集成电路(IC)工业中，一直努力在保持或提高器件的操作特性的同时，使器件更为紧凑。同时，希望提高相关制造处理的速度、可靠性和效率。
例如，在形成集成电路器件时，可能期望使用非常薄的基板，例如硅(Si)基板。除了能够实现更为紧凑的器件之外，薄基板还具有其他优点，诸如有利于双侧(例如，顶部/底部或前部/后部)处理。例如，可使背面离子注入成为可能。
此外，可能期望使用具有相对较大尺寸(和对应的较大表面区域)的晶圆。例如，与相对较小的晶圆相比，较大的晶圆尺寸(例如，与四英寸或六英寸相比，直径为八英寸)通常能够使每晶圆形成更多器件，并且通常提供更好的晶圆区域利用率。
然而，大而薄的晶圆易受热应力和机械应力的影响。因此，此类大而薄的晶圆可能易于经历翘曲、碎裂或断裂。
虽然存在用于减轻或消除此类困难的技术，但这些技术可能会限制或妨碍其他所需的处理步骤。因此，在这些和类似的场景中，使用已知技术很难或者不可能形成所期望的各器件结构和各方面。
发明内容
根据一个一般的方面，制造半导体器件的方法可包括：在环状基板的正面上形成至少一个电路元件，已去除环状基板的背面的内部部分以获得环状基板的减薄部分，其中剩余基板材料的外环围绕环状基板的背面的周边。该方法可包括：将环状基板安装在安装卡盘上，其中安装卡盘具有内部凸起部分和围绕安装卡盘周边的凹陷环，内部凸起部分被配置为在其上接纳基板的减薄部分，并且凹陷环被配置为在其中接纳环状基板的外环；以及在将环状晶圆设置在安装卡盘上时，形成至少一个焊料凸块，至少一个焊料凸块电连接到至少一个电路元件。
根据另一个一般的方面，半导体器件制造组件包括：安装组件，安装组件被配置为对在其正面上形成有至少一个电路元件的晶圆进行支撑，晶圆具有背面，其中在围绕背面的周边形成环并且在环内形成减薄部分；以及安装卡盘，安装卡盘设置在安装组件上。安装卡盘可包括凸起部分和凹陷部分，凸起部分被配置为接纳晶圆的减薄部分，并且凹陷部分被配置为接纳晶圆的环。安装半导体器件制造组件可包括掩模，掩模被配置为在晶圆被设置在安装卡盘上，其中晶圆的减薄部分位于安装卡盘的凸起部分上并且晶圆的环设置在安装卡盘的凹陷部分内时，形成至少一个焊料凸块，至少一个焊料凸块用于电连接到至少一个电路。
根据另一个一般的方面，半导体器件可包括形成在基板上的至少一个集成电路，基板具有小于约300微米的厚度。半导体器件可包括形成在集成电路上的至少一个焊料凸块，焊料凸块具有大于约150微米的厚度。
一个或多个实施方式的细节在附图和以下描述中阐明。其他特征将从说明书和附图中以及从权利要求书中显而易见。
附图说明
图1A是焊料凸块安装组件的示例性实施方式的框图。
图1B是包括多个电路元件的图1A的焊料凸块安装组件的更详细的框图。
图2是使用图1A至图1B的焊料凸块安装组件形成的集成电路组件的框图。
图3示出在图1A至图1B的焊料凸块安装组件中使用的具有环的晶圆。
图4是图1A至图1B的焊料凸块安装组件的实施方式的更详细的示例。
图5示出图1A至图1B的焊料凸块安装组件的另一示例性实施方式。
图6是图5的焊料凸块安装组件的安装卡盘的图示。
图7是图7的安装卡盘的放大图示。
图8是示出用于使用图1A至图1B的焊料凸块安装组件来构造图2的电路组件的示例性操作的流程图。
图9A至图9I示出使用图1A至图1B的焊料凸块安装组件来构造第一示例性电路组件的示例性处理流程。
图10示出图9A至图9I的示例性处理流程的示例性结果。
图11A至图11H是使用图1A至图1B的焊料凸块安装组件来构造第二示例性电路组件的示例性处理流程。
具体实施方式
图1A至图11H示出用于以防止晶圆在处理期间翘曲并且包括添加晶圆级焊料凸块以供电互连的方式处理大而薄的晶圆的示例性操作和器件。因此，可以快速、可靠和有效的方式生产集成电路，同时获得所包括的焊料凸块的优点(与诸如引线接合和/或具有回流的焊料放置的其他互连方法相比)。
更具体地，如上所述，大而薄的半导体晶圆受到机械和/或热应力的损坏，包括翘曲、碎裂或断裂。可以通过围绕大而薄的晶圆的周边提供临时的稳定环来减轻或消除此类困难。
例如，可通过将晶圆的内部部分磨削到期望的薄度，同时保留(即，不磨削)距晶圆的边缘处于限定距离内的外环来获得环状晶圆。然后，该环可用于实现稳定的处置，并且提供结构支撑，从而防止晶圆在后续处理期间翘曲、碎裂或断裂。然后，可在对晶圆上的各个电路或电路元件进行切片之前去除该环。
然而，通常通过使用带或树脂将原始(较厚)晶圆安装在一侧(例如，顶侧)上，然后磨削相对侧(例如，底侧)的内部部分以形成围绕该相对、底侧的周边的稳定环来形成和/或处置此类环状晶圆。有时称为背面磨削(BG)带的这种安装带阻止、阻碍或防止相对于安装了BG带的顶侧进行其他处理步骤。
特别地，如下文所详述的，此类BG带阻碍在晶圆顶侧上形成连接焊料凸块，尤其是具有约100微米至150微米或诸如300微米至500微米等更大范围内的所需尺寸的焊料凸块。此外，另如下面详细描述的，用于在相关联的处理步骤期间添加焊料凸块的选项可能另外受到与执行那些处理步骤相关联的温度和其他因素的限制。换句话讲，例如，在某些处理步骤期间可能由于导致焊料凸块过早熔化的高温、或由于来自所使用的其他化学品的可能的焊料污染、或其他处置问题而无法适当地添加焊料凸块。
相比之下，在图1A中，凸块安装组件102被示出为包括安装卡盘104，该安装卡盘包括凸起部分104a和凹陷环104b。如图所示，因此，安装卡盘104被配置为接纳基板晶圆或晶圆106，该基板晶圆或晶圆具有围绕其周边形成的晶圆环108。也就是说，晶圆环108可设置在凹陷环104b内，其中晶圆106的减薄或凹陷部分覆盖凸起部分104a，从而相对于安装卡盘104固定环状晶圆106。
因此，如图所示，环状晶圆106可以稳定且可靠的方式安装，从而有利于相对于(多个)电路元件110进行处理操作。在以下描述中，电路元件110被描述为形成在环状晶圆的在本文中被称为正面或顶侧的一侧上，该一侧与环状晶圆的设置在安装卡盘104上并由该安装卡盘固定的一侧(在本文中被称为背面或底侧)相对。
特别地，通过使用安装卡盘104安装和固定该环状晶圆106，可以灵活、高效、可靠的方式在电路元件110上形成焊料凸块112。如本文所述，该焊料凸块112也可被称为焊料球、焊球或使用其他已知的或未来的命名，并且可被理解为表示可沉积在电路元件110上或以其他方式提供给该电路元件的焊接材料的任何分立元件。
如图1B所示，被示出为110a、110b和110c的多个电路元件可各自具有在其上形成的对应的焊料凸块112a、112b、112c。因此，基板106可被理解为具有以期望的(多种)方式形成在晶圆106的表面区域上方的此类多个电路元件110a、110b、110c。在环状晶圆上形成多个电路元件的另外的示例在下文例如相对于图3示出和描述。
在稍后的处理阶段期间，可去除晶圆环108，并且可使用常规技术对晶圆106切片，从而使图1A的电路元件110或图1B的电路元件110a、110b、110c连接到晶圆106的剩余的、减薄部分，在图2中示出为基板202。如图2中进一步所示，基板202、电路元件110和焊料凸块112可以倒装芯片组件安装到电路板204。可使用另外的常规技术来完成焊料连接处理，包括例如添加粘合剂底层填料206。
因此，图1A、图1B和图2示出图1A的安装卡盘104可用于促进和启用诸如环状晶圆106的环状晶圆的顶侧或正面处理，并且包括形成焊料凸块112。如上所述，并且如下文所详述，安装卡盘104提供这些和其他优点，包括例如在处理阶段期间实现顶侧或正面处理，在该处理阶段期间(或之后)，并且在进行翻转以安装到电路板204之前，焊料凸块112不经受不期望的热、化学、机械或其他应力。
此外，还如所提及和描述的，安装卡盘104通过在去除用于在晶圆环108的磨削期间固定晶圆106的BG带之后的处理阶段处固定包括晶圆环108的晶圆106来实现晶圆106的顶侧或正面处理。因此，图1A的方法使得能够方便地使用用于形成焊料凸块112的各种技术，诸如下文相对于图4所示和所述的球掩模技术。
相比之下，常规技术通常在磨削环(诸如环108)之前执行正面处理。然后，在磨削期间，BG带用于在形成环的同时固定晶圆。如果需要/期望，可在发生某些背面处理操作(诸如背面注入或扩散)的同时，保持BG带。
在这些和类似的情况下，一旦BG带被去除，常规技术就不能适当地固定环状晶圆以供进一步的正面、晶圆级处理(诸如添加焊料凸块112)。相反，常规技术可尝试在去除环之后和/或在对晶圆切片之后添加焊料连接。此类方法受到许多困难和挑战，诸如对于待与所考虑的晶圆的电路元件一起使用的每个电路板的极其精确(并且容易出错)的焊料放置/形成的要求。因此，此类技术受到各种困难，包括潜在的焊料短路(例如，两个或更多个焊料连接之间的短路情况)，诸如在晶体管元件的源极和栅极之间的焊料短路。
换句话讲，由于可能中断后续处理步骤，常规技术在环磨削之前无法适当地添加焊料凸块。此类中断可包括例如在后续处理期间焊料凸块的损坏(包括在此类后续处理期间的热/化学/机械应力)，或BG带的可靠性降低。此外，因为常规技术无法适当且准确地定位环状晶圆以供添加焊料凸块，所以常规技术无法在环磨削之后但在晶圆切片之前添加焊料凸块。
当然，图1A、图1B和图2提供高度简化的视图，这些视图被设计成示出上述方面和相关方面。更详细地，相对于图3至图11提供另外的说明和示例。应当理解，图1A、图1B和图2并非旨在按比例绘制，并且还省略了对本领域的技术人员而言显而易见的许多常规方面。
例如，(多个)电路元件110可表示各种电路元件的许多不同示例。例如，图9和图10提供(多个)电路元件110表示快速恢复二极管(FRD)和/或绝缘栅双极晶体管(IGBT)的示例。图11提供相对于晶圆级封装(WLP)的更详细的示例。然而，本文提供的这些和其他示例并非旨在是排他性的、限制性的或全面的。因此，(多个)电路元件110可在事实上表示任何合适的结构，诸如任何合适的晶体管、二极管或它们的组合。
类似地，尽管晶圆106在本文中可被描述为由硅(Si)构成，但也可使用其他合适的基板材料。此外，可使用各种合适的材料来形成焊料凸块112，但在本文中不详细描述。
在图1A和图1B中，可用晶圆区域的示例性区域(例如，在去除在其上可形成所需电路元件110的晶圆环108之后将保留的芯片区域)可具有处于例如188mm至196mm范围内的(多个)直径，以及处于10微米至150微米且小于300微米的(多个)范围内的深度。晶圆环108的宽度的示例性范围可以是例如1mm至5mm，并且晶圆环108的示例性深度/厚度可以是例如200微米至1000微米。
在示例性实施方式中，可使用例如基本上非接触式拾取装置的合适的处置工具将基板晶圆106移动到安装卡盘104上或从该安装卡盘去除。例如，可使用伯努利棒或伯努利处置装置的变体，该变体使用气体射流来在环状晶圆106上方产生压差，从而使得晶圆被向上拉动。
图1A、图1B和图2的简化视图示出其中所包括的元件中的每个元件的横截面。图3示出晶圆106和环108的示例性侧视图，而图5和图6/7分别提供凸块安装组件102和安装卡盘104的侧角视图。
具体地，图3示出晶圆106的正面视图，该晶圆包括围绕其圆周的环108。在示例性实施方式中，晶圆106可以是8英寸晶圆，并且环可具有近似几毫米(例如，3mm)的宽度。当然，视情况而定，可使用其他尺寸和宽度。
在图3中，附图标号302是指被形成为环108内的凹槽的晶圆106的中心的、减薄部分。也就是说，减薄部分302是指晶圆106的执行背磨削处理的区域。
尽管在图1A和图2中以单数形式示出，但图3示出(多个)电路元件110表示以网格图案形成在晶圆106上的多个电路元件。因此，如已知的那样，并且如本文所提及的，电路元件110可通过对晶圆106进行切片来切割。
图4是图1的凸块安装组件102的示例性实施方式的横截面。如上所述，并且如图4所示，具有环108的晶圆106可安装在安装卡盘104上。
然后，可使用球掩模402来沉积焊料凸块或焊球404。即，一起考虑图3和图4，应当理解，球掩模402可用于以快速、有效、灵活和可靠的方式在电路元件110的期望部分上方以晶圆106的层级形成焊料凸块404。例如，焊料凸块404可具有各种类型(例如，不同尺寸或不同材料)。当然，由于通过安装卡盘104稳定且准确地定位和固定晶圆106，因此也可使用其他凸块或球沉积技术。
图5示出图1A的焊料凸块安装组件102的另一示例性实施方式。在图5中，焊料凸块安装组件502被示出为具有设置在其中的晶圆504。
图6是图5的焊料凸块安装组件502的安装卡盘604的图示。安装卡盘604提供图1A的安装卡盘104的示例性实施方式。
因此，图6的安装卡盘604包括对应于图1A的凸起部分104a的凸起部分604a，以及对应于图1A的凹陷环104b的凹陷环604b。因此，应当理解，通过晶圆504的背磨削所形成的环(例如，环108)可设置在凹陷环604b内，而晶圆504的减薄中心部分(例如，图3的凹陷部分302)可设置在安装卡盘602的凸起部分604a上。
图7是图7的安装卡盘的放大图示。图7提供图6的凸起部分604a和凹陷环604b的边缘的放大视图。
图8是示出可用于图1的系统的示例性实施方式中的示例性处理操作的流程图。下面相对于图9A至图9I以及图11A至图11H提供图8的该操作的更详细的示例。
在图8中，晶圆(例如，如上所述的8英寸Si晶圆)经历正面预磨削操作(802)。例如，此类操作可包括形成绝缘层、绝缘层内用于电接触层的开口以及形成该电接触层。
然后，可执行背磨削(804)，包括使用背磨带(BG带)。即，已执行正面处理的晶圆可贴在正面上并利用BG带安装/稳定，使得晶圆的被暴露背面可经历磨削、抛光和/或形成上述环108所需的任何其他操作。
然后可进行背面后磨削操作(806)。例如，可发生背面扩散，或者如图9C所示，可执行背面离子注入(随后进行退火)。如图9E所示，可执行背面接触层的溅射或其他提供。附加地或另选地，如图11C所示，背面保护(BSP)带可在环108内施加在晶圆106的减薄部分(302)的背面上方。
应当理解，可在多个合适的处理阶段中的一个阶段中去除用于执行背面磨削的BG带，例如，这取决于将包括哪些处理操作。例如，可在上文提及的背面后磨削操作中的所选操作之后去除BG带。然后，如图9F所示，可以执行某些操作的双侧处理，诸如相对于图9F所述的(多个)双侧电镀操作。
然后，如上文相对于图1以及图4至图7所述，可将环状晶圆106(或502)安装在安装卡盘104或604上(808)。以这种方式，可以稳定、牢固、准确的方式安装环状晶圆106。这种定位使得能够并有利于使用图4的球掩模402，或用于形成凸块的其他适当的技术。
因此，可沉积焊料凸块(810)。特别地，如上文所提及和图4的示例所示，应当理解，在晶圆级沉积焊料凸块。即，例如，图4的焊料凸块404可一起沉积，和/或在单个操作阶段中沉积，并且在将晶圆106锯切或切片成单独的电路元件110之前沉积。
有利地，并且如下文所详述，相对于图10，焊料凸块404的晶圆级沉积提供快速、准确的凸块形成。因此，准确形成的焊料凸块使得能够准确地电接触到诸如图1的电路板104的电路板。附加地或另选地，如相对于图11A至图11H所述，可发生进一步的晶圆级处理。
最后，在图8中，可执行任何的后凸块处理(812)。例如，如图9H和图11G两者所示，可执行锯切或切片以去除环108，并且使电路元件110个体化。此外，如上所述，如图2和图9I所示，可执行倒装芯片安装。
图9A至图9I示出使用图1A和图1B的焊料凸块安装组件来构造第一示例性电路组件的示例性处理流程。在图9A中，将晶圆Si基板902示出为具有安装在其上的接触件904和相关联电路元件，其中接触件904可由AlCu或AlSi制成。也就是说，尽管为了简洁而未在图9中明确示出，但期望的电路元件(例如，FRD或IGBT)的各方面可包括在(多个)层904内。
可如图所示添加(多个)绝缘层，诸如氧化物-氮化物层906和聚酰亚胺(PI)层908，以及相关联的涂层和图案结构。在图9中，具有层904、906、908的Si基板902的表面在本文中被称为顶侧或正面，而相对侧被称为底侧或背面。
结合用于安装正面的合适的BG带(图9B中未示出)，可执行已知的用于实施晶圆环磨削的预先步骤和步骤。因此，如图所示，晶圆的薄的、中心部分910连同围绕该中心部分910的周边的外环912一起形成。如本文所提及的，减薄的、中心部分910的厚度可例如处于100微米至200微米的范围内，例如小于300微米。
因此，可如图9C所示进行背面离子注入914，然后进行图9D中的活化退火916。如图9E所示，可进行AlCu镀覆层918的溅射，连同合适的背面金属(BM)退火以及纯碱粉处理。
然后，如图所示，可使用已知的无电镍金(ENIG)镀层技术并且如图9F所示，在正面和背面上形成双镀覆层920。因此，如图所示，双镀覆层920在正面和背面中的每侧上包括Ni(镍)层922和Au(金)层924。
已知上述ENIG处理用于提供各种优点和特征。例如，所参考的ENIG处理提供相对较厚的Ni层，这可抵消在稍后添加焊料连接期间可能发生的无铅焊料的不期望的Ni消耗。虽然较厚的Ni层还可能导致不期望的晶圆翘曲，但是所述ENIG处理的双侧性质连同环912提供了减薄部分910的所期望的稳定性(例如，避免翘曲)。
然后，可以任何期望的方式形成焊料凸块926。具体地，如上所述，图1A、图4、图6以及图7的安装卡盘104/604可连同图4的球掩模404一起使用。仍如上所述，并且如图9G所示，焊料凸块926可由任何合适的材料制成，并且具有被设计成匹配下面的电接触件的所期望的各种尺寸和形状。
如图9H所示，在环切930去除环912的同时，安装带928可用于固定晶圆。然后，可使用常规技术对单独的电路进行切片。
如参考图2，然后，可相对于诸如直接键合铜(DBC)板的合适的电路板932进行倒装芯片组装过程。如图9I所示，FRD 934和IGBT 936可倒转安装。示出了示例性焊料凸块938(对应于焊料凸块926)，以及合适的粘合剂底层填料940。
因此，图9A至图9I示出利用在作为焊料顶部金属(STM)的ENIG镀层上形成焊料凸块以及利用ENIG背部金属(BM)来制作IGBT/FRD器件的示例性方法。如图所示和所述，各种方法实施方式的示例性方面包括提供Si基板，并且形成(多个)IGBT/FRD器件，其中在基板的正面上具有Al(铝)布线。然后，在晶圆的背面上使用例如晶圆环磨削来形成减薄部分(例如，100-200um)和用于支撑晶圆的对应的环。
可在晶圆的背面上执行对(多个)IGBT/FRD器件的离子注入和活化退火，然后在晶圆的背面上形成Al(例如，铝铜或AlCu)层。然后，可使用所述无电镀NiAu技术(例如，以约1.5微米)将双ENIG镀层形成为焊料顶部金属(STM)和背部金属。在NiAu STM上形成焊料凸块形成物之后，可通过适当的环切来去除晶圆环，并且可进行晶圆的切片(例如，刀片切割或锯切割)。
图10示出图9A至图9I的示例性处理流程的示例性结果。具体地，在
图10中，左侧部分示出示例性常规处理结果，其中芯片1002、1004包括FRD器件1006、1008。在此类常规处理中，针对每个相关芯片，在下面的DBC板上形成焊料放置。因此，此类方法受到焊料放置准确度限制，这些焊料放置准确度限制由相关阶段的处理步骤控制，往往处于例如100微米至200微米的范围内。因此，如芯片1010所示，源极1012和栅极1014可易于短路。此外，虽然未在图10中明确示出，但在这些常规处理中形成的焊料通常易于在其中形成空隙(例如，气泡)，这即使在准确形成焊料时也可能降低焊料的可靠性。
相比之下，使用本文所述的技术，器件1016(例如，IGFT)可形成有焊料凸块1018和粘合剂底层填料1020，从而得到芯片1030。另选地，器件1022可包括具有粘合剂底层填料1026的焊料凸块1024，从而得到芯片1028。
在这些示例中，可使用一次性焊料印刷/安装来形成给定晶圆的所有芯片，并且由于此类处理的例如20微米至100微米的可用处理限制，球安装技术可实现相对细小的球形成物。除了提高准确度和效率之外，还避免了焊料空隙，并且隔离的凸块设计相对于下面的芯片降低了焊料应力水平。
图11A至图11H示出使用图1的焊料凸块安装组件构造第二示例性电路组件的示例性处理流程。在图11A中，Si基板1102接收AlCu或AlSi(以及(多个)相关的电路元件)的接触层1104，以及氧化物-氮化物的绝缘层1106的相关图案结构和PI层1108。图11B中的第一PI涂层和图案化层1110之后是图11C中的Cu RDL(重新分布层)1112和第二PI层1114。
然后，如上所述，并且如图11D所示，可使用合适的BG带和其他合适的磨削技术来形成原始基板1102的减薄部分1116和环1118。在该示例中，将背面保护(BSP)带1120施加到减薄部分1116。
如图11E所示，使用图1A、图4、图6和图7的安装卡盘104/604可形成示例性焊料凸块1122。然后，在图11F中，可附接带安装层1124以有利于常规的芯片切片，包括图11G的环切1126。这样，实现了图11H的晶圆级凸块安装件1128。
图11A至图11H的技术能够将晶圆级焊料凸块1122用于例如200微米或更小的减薄基板，即使在期望焊料凸块相对较大(例如，大于100微米，诸如300微米至500微米)时也是如此。例如，基于下面的电路的特性和/或为了确保适当可靠的电接触，可能期望相对较大的焊料凸块。例如，在一些示例性使用情况下，提供相应较大的基板间隙的较大焊料凸块可与提高热循环可靠性和/或提高底层填料润湿性相关联。
因此，薄Si基板可用于使用焊料凸块的晶圆级处理，包括其中在Cu重新分布层RDL上形成高焊料凸块的制造WLP的所述和所示的方法。该方法可包括提供Si基板，并且在Si基板上形成半导体器件/集成电路。在背部金属层、Cu RDL和第二PI层下方形成第一PI层之后，可例如通过晶圆磨削处理或类似处理来形成Si晶圆的减薄部分和用于支撑晶圆的对应Si环。在晶圆的背面(经磨削面)上形成背面保护带BSP之后，可在Cu RDL上开始形成焊料凸块。最后，可通过适当的环切来去除晶圆环，并且可完成切片(例如，刀片切片或锯切片)。
在一些实施方式中，半导体器件可包括形成在环状晶圆的减薄部分的正面上的多个集成电路，环状晶圆包括围绕环状晶圆的背面的周边的外环。半导体器件可包括多个集成电路之中具有小于约300微米的厚度的至少一个集成电路，以及形成在至少一个集成电路上并电连接到至少一个集成电路的至少一个焊料凸块，焊料凸块具有大于约150微米的厚度。
在此类半导体器件的实施方式中，电路板可使用至少一个焊料凸块电连接到集成电路。该至少一个集成电路可包括快速恢复二极管(FRD)和绝缘栅双极晶体管(IGBT)中的至少一个。半导体器件可包括双无电镍金(ENIG)镀层，其包括电连接在至少一个电路元件和至少一个焊料凸块之间的第一层，以及环状晶圆的相对侧上的第二层。
在一些实施方案中，制造半导体器件的方法可包括：在环状基板的正面上形成至少一个电路元件，已去除环状基板的背面的内部部分以获得环状基板的减薄部分，其中剩余基板材料的外环围绕环状基板的背面的周边。该方法可包括：将环状基板安装在安装卡盘上，其中安装卡盘具有内部凸起部分和围绕安装卡盘周边的凹陷环，内部凸起部分被配置为在其上接纳基板的减薄部分，并且凹陷环被配置为在其中接纳环状基板的外环；以及在将环状晶圆设置在安装卡盘上时，形成至少一个焊料凸块，至少一个焊料凸块电连接到至少一个电路元件。
在这些和类似实施方案中，至少一个电路元件可包括快速恢复二极管(FRD)和绝缘栅双极晶体管(IGBT)中的至少一个。减薄部分可小于300微米。该至少一个焊料凸块的直径可大于150微米。
该至少一个电路元件可包括形成在基板的正面上的多个电路元件，并且形成至少一个焊料凸块可包括形成跨基板并电连接到多个电路元件中的每个电路元件的多个焊料凸块。形成多个焊料凸块可包括：在将基板安装在安装卡盘上时，在基板的正面上方提供掩模，掩模在多个电路元件上方具有开口；并且通过开口沉积多个焊料凸块以将多个焊料凸块连接到多个电路元件。
应当理解，在前述描述中，当元件诸如层、区域、基板或部件被提及为在另一个元件上，连接到另一个元件，电连接到另一个元件，耦接到另一个元件，或电耦接到另一个元件时，元件可以直接地在另一个元件上，连接到或耦接到另一个元件上，或者可以存在一个或多个中间元件。相反，当元件被提及直接在另一个元件或层上、直接连接到另一个元件或层、或直接耦合到另一个元件或层时，不存在中间元件或层。虽然在整个具体实施方式中可能不会使用术语直接在…上、直接连接到…、或直接耦接到…，但是被示为直接在元件上、直接连接或直接耦接的元件能以此类方式提及。本申请的权利要求书(如果存在的话)可被修订以叙述在说明书中描述或者在附图中示出的示例性关系。
如在本说明书和权利要求书中所使用的，除非根据上下文明确地指出特定情况，否则单数形式可包括复数形式。除了附图中所示的取向之外，空间相对术语(例如，在…上方、在…上面、在…之上、在…下方、在…下面、在…之下、在…之以下等)旨在涵盖器件在使用或操作中的不同取向。在一些实施方式中，在…上面和在…下面的相对术语可分别包括竖直地在…上面和竖直地在…下面。在一些实施方式中，术语邻近能包括横向邻近或水平邻近。
一些实施方式可使用各种半导体处理和/或封装技术来实现。一些实施方式可使用与半导体基板相关联的各种类型的半导体处理技术来实现，该半导体基板包含但不限于，例如硅(Si)、砷化镓(GaAs)、氮化镓(GaN)、碳化硅(SiC)等。
虽然所描述的实施方式的某些特征已经如本文所述进行了说明，但是本领域技术人员现在将想到许多修改形式、替代形式、变化形式和等同形式。因此，应当理解，所附权利要求书旨在涵盖落入具体实施的范围内的所有此类修改形式和变化形式。应当理解，这些修改形式和变化形式仅仅以举例而非限制的方式呈现，并且可以进行形式和细节上的各种变化。除了相互排斥的组合以外，本文所述的装置和/或方法的任何部分可以任意组合进行组合。本文所述的实施方式能包括所描述的不同实施方式的功能、部件和/或特征的各种组合和/或子组合。

Claims (13)

1.一种制作半导体器件的方法，包括：
在环状基板的正面上形成至少一个电路元件，已去除所述环状基板的背面的内部部分以获得所述环状基板的减薄部分，其中剩余基板材料的外环围绕所述环状基板的所述背面的周边；
将所述环状基板安装在安装卡盘上，所述安装卡盘具有内部凸起部分和围绕所述安装卡盘的周边的凹陷环，所述内部凸起部分被配置为在其上接纳所述基板的所述减薄部分，所述凹陷环被配置为在其中接纳所述环状基板的所述外环；以及
在环状晶圆设置在所述安装卡盘上时，形成电连接到所述至少一个电路元件的至少一个焊料凸块。
2.根据权利要求1所述的方法，还包括：
在所述安装之前，在所述至少一个电路元件上并且在所述基板的所述背面的所述内部部分上形成双无电镍金ENIG镀层并电连接到所述至少一个电路元件；以及
在正面ENIG镀层上形成所述至少一个焊料凸块并电连接到所述正面ENIG镀层。
3.根据权利要求1所述的方法，其中去除所述内部部分包括：
利用背面磨削BG带固定所述基板的所述正面；
磨削所述基板的所述背面以限定所述减薄部分和所述外环；以及
去除所述BG带。
4.根据权利要求1所述的方法，还包括：
从所述安装卡盘上去除所述环状基板；
从所述环状基板上去除所述外环；
对所述基板切片以限定单独的芯片，所述芯片包括具有所述至少一个电路元件的至少一个芯片；以及
将倒装芯片组件中的所述至少一个电路元件安装到至少一个电路板，包括使用所述至少一个焊料凸块将所述至少一个电路元件电连接到所述至少一个电路板。
5.一种半导体器件制造组件，包括：
安装组件，所述安装组件被配置为对在其正面上形成有至少一个电路元件的晶圆进行支撑，所述晶圆具有背面，其中在围绕所述背面的周边形成环和在所述环内形成减薄部分；
安装卡盘，所述安装卡盘设置在所述安装组件上，并且包括
凸起部分，所述凸起部分被配置为接纳所述晶圆的所述减薄部分，和
凹陷部分，所述凹陷部分被配置为接纳所述晶圆的所述环；以及
掩模，所述掩模被配置为在所述晶圆被设置在所述安装卡盘上，其中所述晶圆的所述减薄部分位于所述安装卡盘的所述凸起部分上并且所述晶圆的所述环设置在所述安装卡盘的所述凹陷部分内时，形成至少一个焊料凸块，所述至少一个焊料凸块用于电连接到所述至少一个电路。
6.根据权利要求5所述的半导体器件制造组件，其中所述至少一个电路元件包括形成在所述晶圆的所述正面上的多个电路元件，并且其中所述至少一个焊料凸块包括跨所述基板并电连接到所述多个电路元件中的每个电路元件的多个焊料凸块。
7.根据权利要求5所述的半导体器件制造组件，其中所述晶圆的所述减薄部分小于300微米。
8.根据权利要求5所述的半导体器件制造组件，其中所述至少一个焊料凸块的直径大于150微米。
9.根据权利要求5所述的半导体器件制造组件，包括双无电镍金ENIG镀层，所述双无电镍金ENIG镀层位于所述至少一个电路元件上以及位于所述环内的所述减薄部分上，并且电连接到所述至少一个电路元件，进一步地，其中所述至少一个焊料凸块形成在正面ENIG镀层上并电连接到所述正面ENIG镀层。
10.一种半导体器件，包括：
至少一个集成电路，所述至少一个集成电路形成在基板上，所述基板具有小于约300微米的厚度；和
至少一个焊料凸块，所述至少一个焊料凸块形成在所述集成电路上，所述至少一个焊料凸块具有大于约150微米的厚度。
11.根据权利要求10所述的半导体器件，还包括电路板，所述电路板使用所述至少一个焊料凸块电连接到所述集成电路。
12.根据权利要求10所述的半导体器件，包括双无电镍金ENIG镀层，所述双无电镍金ENIG镀层包括电连接在所述至少一个电路元件和所述至少一个焊料凸块之间的第一层，以及在所述基板的相对侧上的第二层。
13.根据权利要求10所述的半导体器件，其中所述至少一个集成电路包括形成在所述基板上的多个集成电路，并且所述至少一个焊料凸块包括多个焊料凸块，并且进一步地，其中所述多个集成电路通过所述多个焊料凸块电连接到所述电路板。
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