CN112259567A - Method for forming microlens of CIS - Google Patents

Method for forming microlens of CIS Download PDF

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Publication number
CN112259567A
CN112259567A CN202011121262.5A CN202011121262A CN112259567A CN 112259567 A CN112259567 A CN 112259567A CN 202011121262 A CN202011121262 A CN 202011121262A CN 112259567 A CN112259567 A CN 112259567A
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Prior art keywords
dielectric layer
etching
target area
cis
forming
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CN202011121262.5A
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Inventor
白旭东
米魁
程刘锁
陈广龙
王函
范晓
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Hua Hong Semiconductor Wuxi Co Ltd
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Hua Hong Semiconductor Wuxi Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14625Optical elements or arrangements associated with the device
    • H01L27/14627Microlenses
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14683Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14685Process for coatings or optical elements

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

The application discloses a method for forming a microlens of a CIS, comprising: forming a dielectric layer on the hard mask layer, and forming a pixel unit below the hard mask layer; covering a light resistor in a target area on the dielectric layer through a photoetching process, wherein the target area is an area corresponding to the micro lens; carrying out first etching to form a groove between the target areas; performing second etching, namely thinning the dielectric layer to enable the surface of the dielectric layer in the target area to have a radian, forming a micro lens on the dielectric layer in the target area, wherein the second etching is isotropic etching; and removing the photoresist. According to the method, the dielectric layer is formed above the pixel unit of the CIS, and then the micro lens of the CIS is formed through two times of etching, and the dielectric layer is formed without two times of deposition, so that the micro lens is formed, the complexity of the process is reduced, and the manufacturing cost is reduced.

Description

Method for forming microlens of CIS
Technical Field
The present disclosure relates to the field of semiconductor manufacturing technologies, and in particular, to a method for forming a micro-lens (micro-lens) of a complementary metal oxide semiconductor image sensor (CIS).
Background
The CIS is an image sensor manufactured by using a CMOS device, and is widely used in the fields of photography, security systems, smart cellular phones, medical electronics, and the like because of its advantages of high integration level, low power supply voltage, low technical threshold, and the like.
In general, a CIS includes a pixel (pixel) unit and a microlens formed over the pixel unit. The micro lens is formed by forming a front micro lens above the pixel unit and then depositing a medium layer, and two deposition processes are needed, so that the process is complex and the manufacturing cost is high.
Disclosure of Invention
The application provides a method for forming a microlens of a CIS, which can solve the problem of high manufacturing cost caused by complex process in the method for forming the microlens of the CIS in the related art.
In one aspect, an embodiment of the present application provides a method for forming a microlens of a CIS, including:
forming a dielectric layer on the hard mask layer, wherein a pixel unit is formed below the hard mask layer;
covering a light resistance on a target area on the dielectric layer through a photoetching process, wherein the target area is an area corresponding to the micro lens;
carrying out first etching to form a groove between the target areas;
performing second etching, namely thinning the dielectric layer to enable the surface of the dielectric layer of the target area to have a radian, wherein the micro lens is formed on the dielectric layer of the target area, and the second etching is isotropic etching;
and removing the photoresist.
Optionally, the performing the first etching includes:
the first etching is performed by a dry etching process.
Optionally, the depth of the trench formed after the first etching is 2000 angstroms
Figure BDA0002732065330000011
To 6000 angstroms.
Optionally, the dielectric layer includes an oxide layer.
Optionally, the thickness of the dielectric layer is greater than 8000 angstroms.
Optionally, the performing the second etching includes:
and performing the second etching by a wet etching process.
Optionally, the hard mask layer comprises a silicon nitride layer.
Optionally, the hard mask layer has a thickness of 1000 to 8000 angstroms.
The technical scheme at least comprises the following advantages:
after the dielectric layer is formed above the pixel unit of the CIS, the micro lens of the CIS is formed by two times of etching, and the dielectric layer is not required to be formed by two times of deposition so as to form the micro lens, so that the complexity of the process is reduced, and the manufacturing cost is reduced.
Drawings
In order to more clearly illustrate the detailed description of the present application or the technical solutions in the prior art, the drawings needed to be used in the detailed description of the present application or the prior art description will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 is a flowchart of a method for forming a microlens of a CIS according to an exemplary embodiment of the present disclosure;
fig. 2 to 6 are schematic views illustrating a process of forming a microlens of a CIS according to an exemplary embodiment of the present application.
Detailed Description
The technical solutions in the present application will be described clearly and completely with reference to the accompanying drawings, and it is obvious that the described embodiments are some, but not all embodiments of the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplicity of description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present application, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; the connection can be mechanical connection or electrical connection; the two elements may be directly connected or indirectly connected through an intermediate medium, or may be communicated with each other inside the two elements, or may be wirelessly connected or wired connected. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art.
In addition, the technical features mentioned in the different embodiments of the present application described below may be combined with each other as long as they do not conflict with each other.
Referring to fig. 1, there is shown a flowchart illustrating a method of forming a microlens of a CIS, according to an exemplary embodiment of the present application, the method including:
step 101, forming a dielectric layer on the hard mask layer, and forming a pixel unit below the hard mask layer.
Referring to fig. 2, a cross-sectional view of a dielectric layer formed on a hard mask layer is shown. Illustratively, as shown in FIG. 2, an oxide layer may be deposited on the hard mask layer 110 by a Chemical Vapor Deposition (CVD) process(e.g., silicon dioxide (SiO)2) Layer) forms dielectric layer 120. Wherein a pixel unit (not shown in fig. 2) is formed under the hard mask layer 110.
The thickness h2 of the dielectric layer 120 is required to be the same as the thickness of the dielectric layer formed by two depositions in the related art. Optionally, dielectric layer 120 has a thickness h2 of greater than 8000 angstroms (e.g., it may be 15000 angstroms).
Optionally, the hard mask layer 110 comprises a silicon nitride layer; optionally, the hard mask layer 110 has a thickness h1 of 1000 to 8000 angstroms (e.g., which may be 1800 angstroms).
Step 102, covering a photoresist on a target area on the dielectric layer through a photoetching process, wherein the target area is an area corresponding to the micro lens.
Referring to fig. 3, a cross-sectional view of a target area overlying a dielectric layer covered with photoresist by a photolithography process is shown. As shown in fig. 3, the target area covered under the photoresist 101 is the area corresponding to the microlens.
Step 103, performing a first etching to form a trench between the target regions.
Referring to fig. 4, a schematic cross-sectional view of a trench formed by a first etch is shown. Illustratively, as shown in fig. 4, a first etch may be performed by a dry etch process to form trenches 102 between the target regions. The depth h3 of the trench formed after the optional first etch is 2000 to 6000 angstroms (e.g., it may be 4000 angstroms).
And 104, performing secondary etching to thin the dielectric layer, so that the surface of the dielectric layer in the target area has a radian, the dielectric layer in the target area forms a micro lens, and the secondary etching is isotropic etching.
Referring to fig. 5, a schematic cross-sectional view after a second etch is shown. Illustratively, as shown in fig. 5, a second etching process may be performed by a wet etching process to make the surface of dielectric layer 120 in the target region have a curvature, and dielectric layer 120 in the target region forms a microlens (as shown by a dotted line in fig. 5).
Step 105, removing the photoresist.
In summary, in the embodiment of the application, the dielectric layer is formed above the pixel unit of the CIS, and then the microlens of the CIS is formed by two times of etching, and the dielectric layer is not required to be formed by two times of deposition, so that the complexity of the process is reduced, and the manufacturing cost is reduced.
It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications of this invention are intended to be covered by the scope of the invention as expressed herein.

Claims (8)

1. A method of forming a microlens of a CIS, comprising:
forming a dielectric layer on the hard mask layer, wherein a pixel unit is formed below the hard mask layer;
covering a light resistance on a target area on the dielectric layer through a photoetching process, wherein the target area is an area corresponding to the micro lens;
carrying out first etching to form a groove between the target areas;
performing second etching, namely thinning the dielectric layer to enable the surface of the dielectric layer of the target area to have a radian, wherein the micro lens is formed on the dielectric layer of the target area, and the second etching is isotropic etching;
and removing the photoresist.
2. The method of claim 1, wherein the performing a first etch comprises:
the first etching is performed by a dry etching process.
3. The method of claim 2, wherein the trench formed after the first etching is 2000 to 6000 angstroms deep.
4. The method of claim 3, wherein the dielectric layer comprises an oxide layer.
5. The method of claim 4, wherein the dielectric layer has a thickness greater than 8000 angstroms.
6. The method of claim 5, wherein the performing the second etch comprises:
and performing the second etching by a wet etching process.
7. The method of any of claims 1 to 6, wherein the hard mask layer comprises a silicon nitride layer.
8. The method of claim 7, wherein the hard mask layer has a thickness of 1000 to 8000 angstroms.
CN202011121262.5A 2020-10-20 2020-10-20 Method for forming microlens of CIS Pending CN112259567A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113205992A (en) * 2021-04-14 2021-08-03 华虹半导体(无锡)有限公司 Etching method of CIS

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0936338A (en) * 1995-07-14 1997-02-07 Sony Corp Solid-state image sensing device and its manufacture
CN101336381A (en) * 2005-11-28 2008-12-31 光州科学技术院 Method for fabricating micro-lens and micro-lens integrated optoelectronic devices using selective etch of compound semiconductor
CN101393886A (en) * 2007-09-21 2009-03-25 和舰科技(苏州)有限公司 Manufacturing method for micro-lens of image sensor

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0936338A (en) * 1995-07-14 1997-02-07 Sony Corp Solid-state image sensing device and its manufacture
CN101336381A (en) * 2005-11-28 2008-12-31 光州科学技术院 Method for fabricating micro-lens and micro-lens integrated optoelectronic devices using selective etch of compound semiconductor
CN101393886A (en) * 2007-09-21 2009-03-25 和舰科技(苏州)有限公司 Manufacturing method for micro-lens of image sensor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113205992A (en) * 2021-04-14 2021-08-03 华虹半导体(无锡)有限公司 Etching method of CIS
CN113205992B (en) * 2021-04-14 2022-10-28 华虹半导体(无锡)有限公司 Etching method of CIS

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