CN111863596B - Manufacturing process of copper column and thick film copper plating structure of wafer - Google Patents

Manufacturing process of copper column and thick film copper plating structure of wafer Download PDF

Info

Publication number
CN111863596B
CN111863596B CN202010708050.0A CN202010708050A CN111863596B CN 111863596 B CN111863596 B CN 111863596B CN 202010708050 A CN202010708050 A CN 202010708050A CN 111863596 B CN111863596 B CN 111863596B
Authority
CN
China
Prior art keywords
wafer
copper
front surface
coating
back surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202010708050.0A
Other languages
Chinese (zh)
Other versions
CN111863596A (en
Inventor
严立巍
李景贤
陈政勋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shaoxing Tongxincheng Integrated Circuit Co ltd
Original Assignee
Shaoxing Tongxincheng Integrated Circuit Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shaoxing Tongxincheng Integrated Circuit Co ltd filed Critical Shaoxing Tongxincheng Integrated Circuit Co ltd
Priority to CN202010708050.0A priority Critical patent/CN111863596B/en
Publication of CN111863596A publication Critical patent/CN111863596A/en
Application granted granted Critical
Publication of CN111863596B publication Critical patent/CN111863596B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • H01L21/02005Preparing bulk and homogeneous wafers
    • H01L21/02008Multistep processes
    • H01L21/0201Specific process step
    • H01L21/02016Backside treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02697Forming conducting materials on a substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

The invention discloses a manufacturing process of a copper column and thick film copper plating structure of a wafer, and belongs to the field of wafer processing. The manufacturing process of the copper column and thick film copper plating structure of the wafer comprises the following steps: finishing PAD wiring on the front surface of the wafer, and forming a copper seed layer on the PAD wiring layer; grinding the front surface of the wafer, thinning the middle part of the back surface of the wafer through grinding or etching, and coating a first polyimide coating on the back surface of the wafer; coating photoresist, exposing and developing the front surface of the wafer, and forming a region needing to be provided with copper columns on the front surface of the wafer; copper is plated on the area to form copper columns. Coating a polyimide coating on the front surface of the wafer; and forming a metal coating on the back surface of the wafer through metal evaporation or metal sputtering. Compared with the prior art, the manufacturing process can form better stress buffering, and the front side and the back side of the wafer can be welded or wire-bonded to be connected with the packaging radiating fin.

Description

Manufacturing process of copper column and thick film copper plating structure of wafer
Technical Field
The invention relates to the field of wafer processing, in particular to a manufacturing process of a copper column and thick film copper plating structure of a wafer.
Background
In the conventional ultra-thin wafer for high power semiconductor devices, the best heat dissipation effect is generally achieved by forming a thick film copper film on the metal PAD. However, if thick film copper is electroplated and then the back surface is thinned, a large step (topology height) is formed on the front surface, and wafer fragments are easily caused by the step and the stress distribution in each area on the front surface. Therefore, it is difficult to overcome the difficulty of flatness on the front side of the wafer by using either tape or Glass carrier, resulting in difficulty in thinning the wafer to a thickness of 100 μm or less in the back side thinning process of the wafer.
In another technical route, the back surface is thinned, and then turned back to the front surface to make a yellow light process and plate thick film copper, so that it is difficult to make the front surface process smoothly due to the problem of warpage (warp) of the ultra-thin wafer.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides a manufacturing process of a copper column and thick film copper plating structure of a wafer.
The aim of the invention can be achieved by the following technical scheme:
a manufacturing process of a copper column structure and a thick film copper plating structure of a wafer comprises the following steps:
finishing PAD wiring on the front surface of the wafer, and forming a copper seed layer on the PAD wiring layer;
applying a protective tape on the front surface of the wafer, grinding the front surface of the wafer, and tearing off the protective tape;
and thinning the middle part of the back surface of the wafer by grinding or etching to make the back surface of the wafer thin at the center and thick at the edge.
Coating a first polyimide coating on the back surface of the wafer, and removing the volatile solvent through heating and baking;
coating photoresist, exposing and developing the front surface of the wafer, and forming a region needing to be provided with copper columns on the front surface of the wafer;
copper is plated on the area to form copper columns; and removing the photoresist and the copper seed layer outside the area.
Coating a second polyimide coating on the front surface of the wafer, and exposing and developing to form a metal welding window of the copper column and the packaging wire; then removing the first polyimide coating on the back surface of the wafer;
heating and curing the second polyimide coating on the front surface of the wafer, and removing the oxide layer on the back surface of the wafer by using hydrofluoric acid;
and forming a metal coating on the back surface of the wafer through metal evaporation or metal sputtering.
The manufacturing process of the copper column and thick film copper plating structure of the wafer comprises the following steps:
finishing PAD wiring on the front surface of the wafer, and forming a copper seed layer on the PAD wiring layer;
applying a protective tape on the front surface of the wafer, grinding the front surface of the wafer, and tearing off the protective tape;
thinning the middle part of the back surface of the wafer by grinding or etching to make the back surface of the wafer thin at the center and thick at the edge;
then, coating a first polyimide coating on the back surface of the wafer, and removing the volatile solvent through heating and baking;
coating photoresist, exposing and developing the front surface of the wafer, and forming a region needing to be provided with copper columns on the front surface of the wafer;
copper is plated on the area to form a copper column or copper sheet; then removing the photoresist and the copper seed layer outside the area;
using an electrostatic carrier to carry and support the wafer, and using hydrofluoric acid to remove an oxide layer on the back surface of the wafer;
and forming a metal coating on the back surface of the wafer through metal evaporation or metal sputtering.
Further, the wafer is thinned to 200-300 microns.
Further, the thickness of the coating photoresist layer is greater than the height of the copper pillar.
Further, the polyimide coating on the front side and/or the metal back side of the wafer has a thickness of greater than 20 microns.
Further, the polyimide coating is removed by oxygen plasma or organic solvent rinsing or by blanket exposure development.
The invention has the beneficial effects that:
the wafer with the thin center and the thick edge is combined with the polyimide coating on the back of the wafer to form a flat wafer process structure, so that the wafer cannot be broken easily, and the wafer is convenient to carry and transport. On the other hand, after the copper column is formed, a polyimide coating is coated on the front surface, then the polyimide coating on the back surface of the wafer is removed, and the metal coating on the back surface is completed.
Drawings
The invention is further described below with reference to the accompanying drawings.
FIG. 1 is a process block diagram of the present application after PAD routing is completed;
FIG. 2 is a schematic diagram of a process configuration for completing the application of a first polyimide coating layer according to the present application;
FIG. 3 is a schematic view of the process structure after photoresist coating is completed;
FIG. 4 is a schematic view of the process structure after copper pillars are formed;
FIG. 5 is a schematic diagram of a process structure after photoresist removal according to the present application;
FIG. 6 is an enlarged schematic view of a portion of FIG. 5A of the present application;
FIG. 7 is a schematic diagram of a process for removing a portion of a copper seed layer according to the present application;
FIG. 8 is an enlarged schematic view of a portion of FIG. 7B of the present application;
FIG. 9 is a schematic diagram of a process configuration for applying a second polyimide coating of the present application;
FIG. 10 is a schematic view of a process structure for forming a metal welding window according to the present application;
FIG. 11 is a schematic view of a process for forming a metal plating film according to the present application;
fig. 12 is an enlarged schematic view of the structure of fig. 11C of the present application.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
In the description of the present invention, it should be understood that the terms "open," "upper," "lower," "thickness," "top," "middle," "length," "inner," "peripheral," and the like indicate orientation or positional relationships, merely for convenience in describing the present invention and to simplify the description, and do not indicate or imply that the components or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the present invention.
As shown in fig. 1-12, the present invention discloses a process for manufacturing a copper pillar structure and a thick film copper plating structure of a wafer, in which, in one embodiment of the present application, in order to form a copper pillar 6 structure on a wafer 1 and to perform thick film copper plating, the following steps may be sequentially performed:
firstly, PAD wiring 2 is completed on the front surface of a wafer 1, and a copper seed layer 3 is formed on the PAD wiring 2 layer;
applying a protective tape on the front surface of the wafer 1, grinding the front surface of the wafer 1, and tearing off the protective tape;
the center of the back surface of the wafer 1 is thinned by grinding or etching so that the back surface of the wafer 1 is thin at the center and thick at the edge. In particular, the wafer 1 cross section thus obtained may be, for example, but not limited to, ramp-shaped or stepped. Wherein the thinnest part of the wafer 1, namely the thickness of the middle part of the wafer 1, can reach 40-100 micrometers; and the thickest part of the wafer 1, i.e., the edge of the wafer 1, may be set to 5 to 8 mm in thickness. Therefore, the middle part of the wafer 1 meets the thickness requirement, and the edge part can bear larger stress, so that the wafer 1 is effectively prevented from being broken during processing.
Coating a first polyimide coating 4 on the back surface of the wafer 1, and removing the volatile solvent by heating and baking; specifically, the first polyimide coating 4 on the back surface of the wafer 1 can be removed by oxygen plasma or organic solvent rinsing, or by blanket exposure development.
Coating a photoresist 5 on the front surface of the wafer 1, exposing and developing, and forming a region where copper columns 6 are required to be arranged on the front surface of the wafer 1;
copper is plated on the area to form copper columns 6; the photoresist 5 is removed, as well as the copper seed layer 3 outside the area. Thus, the copper pillar 6 process on the front surface of the wafer 1 is completed.
A second polyimide coating 7 is coated on the front surface of the wafer 1, and is exposed and developed to form copper columns 6 and metal welding windows 8 for packaging wires.
Heating and curing the second polyimide coating 7 on the front surface of the wafer 1, and removing an oxide layer on the back surface of the wafer 1 by using hydrofluoric acid;
the metal plating film 9 on the back surface of the wafer 1 is formed by metal vapor deposition or metal sputtering.
In another embodiment of the present invention, a process for manufacturing a copper pillar structure and a thick film copper plating structure of another wafer is also provided, comprising the steps of:
PAD wiring 2 is completed on the front surface of the wafer 1, and a copper seed layer 3 is formed on the PAD wiring 2 layer;
applying a protective tape on the front surface of the wafer 1, grinding the front surface of the wafer 1, and tearing off the protective tape;
thinning the middle part of the back surface of the wafer 1 by grinding or etching to make the back surface of the wafer 1 thin at the center and thick at the edge;
coating a first polyimide coating 4 on the back surface of the wafer 1, and removing the volatile solvent by heating and baking;
coating a photoresist 5 on the front surface of the wafer 1, exposing and developing, and forming a region where copper columns 6 are required to be arranged on the front surface of the wafer 1;
copper is plated on the area to form copper columns 6; removing the photoresist 5 and the copper seed layer 3 outside the region;
unlike the previous embodiment of the present disclosure, in the present embodiment, the oxide layer of the back surface of the wafer 1 is removed using hydrofluoric acid using the electrostatic carrier to mount and support the wafer 1;
the metal plating film 9 on the back surface of the wafer 1 is formed by metal vapor deposition or metal sputtering.
Further, the wafer 1 is thinned to 200 to 300 μm.
Further, the thickness of the coated photoresist 5 is greater than the height of the copper pillars 6.
Further, the polyimide coating on the front side and/or the metal back side of the wafer 1 has a thickness of more than 20 μm.
Further, the polyimide coating is removed by oxygen plasma or organic solvent rinsing or by blanket exposure development.
In the description of the present specification, the descriptions of the terms "one embodiment," "example," "specific example," and the like, mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The foregoing has shown and described the basic principles, principal features and advantages of the invention. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, and that the above embodiments and descriptions are merely illustrative of the principles of the present invention, and various changes and modifications may be made without departing from the spirit and scope of the invention, which is defined in the appended claims.

Claims (6)

1. The manufacturing process of the copper column structure and the thick film copper plating structure of the wafer is characterized by comprising the following steps of:
finishing PAD wiring on the front surface of the wafer, and forming a copper seed layer on the PAD wiring layer;
applying a protective tape on the front surface of the wafer, grinding the front surface of the wafer, and tearing off the protective tape;
thinning the middle part of the back surface of the wafer by grinding or etching to make the back surface of the wafer thin at the center and thick at the edge;
coating a first polyimide coating on the back surface of the wafer, and removing the volatile solvent through heating and baking;
coating photoresist, exposing and developing the front surface of the wafer, and forming a region needing to be provided with copper columns on the front surface of the wafer;
copper is plated on the area to form copper columns; removing the photoresist and the copper seed layer outside the area;
coating a second polyimide coating on the front surface of the wafer, and exposing and developing to form a metal welding window of the copper column and the packaging wire; then removing the first polyimide coating on the back surface of the wafer;
heating and curing the second polyimide coating on the front surface of the wafer, and removing the oxide layer on the back surface of the wafer by using hydrofluoric acid;
and forming a metal coating on the back surface of the wafer through metal evaporation or metal sputtering.
2. The manufacturing process of the copper column structure and the thick film copper plating structure of the wafer is characterized by comprising the following steps of:
finishing PAD wiring on the front surface of the wafer, and forming a copper seed layer on the PAD wiring layer;
applying a protective tape on the front surface of the wafer, grinding the front surface of the wafer, and tearing off the protective tape;
thinning the middle part of the back surface of the wafer by grinding or etching to make the back surface of the wafer thin at the center and thick at the edge;
coating a first polyimide coating on the back surface of the wafer, and removing the volatile solvent through heating and baking;
coating photoresist, exposing and developing the front surface of the wafer, and forming a region needing to be provided with copper columns on the front surface of the wafer;
copper is plated on the area to form copper columns; removing the photoresist and the copper seed layer outside the area;
using an electrostatic carrier to carry and support the wafer, and using hydrofluoric acid to remove an oxide layer on the back surface of the wafer;
and forming a metal coating on the back surface of the wafer through metal evaporation or metal sputtering.
3. The process for manufacturing the copper pillar structure and the thick film copper plating structure of the wafer according to claim 1 or 2, wherein the wafer is thinned to 200 to 300 μm.
4. The process for fabricating a copper pillar structure and a thick film copper plated structure of a wafer according to claim 1 or 2, wherein the thickness of the coated photoresist layer is greater than the height of the copper pillar.
5. The process for fabricating a copper pillar structure and a thick film copper plated structure of a wafer according to claim 1 or 2, wherein the polyimide coating on the front side and/or the metal back side of the wafer has a thickness of more than 20 μm.
6. The process for manufacturing the copper pillar structure and the thick film copper plating structure of the wafer according to claim 1 or 2, wherein: the polyimide coating is removed by oxygen plasma or organic solvent rinsing or by blanket exposure development.
CN202010708050.0A 2020-07-21 2020-07-21 Manufacturing process of copper column and thick film copper plating structure of wafer Active CN111863596B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010708050.0A CN111863596B (en) 2020-07-21 2020-07-21 Manufacturing process of copper column and thick film copper plating structure of wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010708050.0A CN111863596B (en) 2020-07-21 2020-07-21 Manufacturing process of copper column and thick film copper plating structure of wafer

Publications (2)

Publication Number Publication Date
CN111863596A CN111863596A (en) 2020-10-30
CN111863596B true CN111863596B (en) 2023-05-26

Family

ID=73000813

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202010708050.0A Active CN111863596B (en) 2020-07-21 2020-07-21 Manufacturing process of copper column and thick film copper plating structure of wafer

Country Status (1)

Country Link
CN (1) CN111863596B (en)

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004071792A (en) * 2002-08-06 2004-03-04 Seiko Epson Corp Semiconductor device and method for manufacturing the same
TW589726B (en) * 2003-04-25 2004-06-01 Chipmos Technologies Inc Wafer level packaging process and structure thereof
JP2005303214A (en) * 2004-04-16 2005-10-27 Matsushita Electric Ind Co Ltd Grinding method for semiconductor wafer
JP2011009341A (en) * 2009-06-24 2011-01-13 Fuji Electric Systems Co Ltd Method of manufacturing semiconductor device
JP2012182239A (en) * 2011-02-28 2012-09-20 Panasonic Corp Method of manufacturing semiconductor device
CN105448854A (en) * 2014-08-29 2016-03-30 万国半导体股份有限公司 Wafer manufacturing method for thickly-back-metalized molded chip-scale package
CN107706102A (en) * 2017-09-19 2018-02-16 上海华虹宏力半导体制造有限公司 Technique for thinning back side of silicon wafer method
CN209401606U (en) * 2019-01-18 2019-09-17 芯恩(青岛)集成电路有限公司 A kind of semiconductor devices
CN111430325A (en) * 2020-04-29 2020-07-17 绍兴同芯成集成电路有限公司 Process structure of wafer double-sided alloy bump

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6426283B1 (en) * 2000-12-01 2002-07-30 Taiwan Semiconductor Manufacturing Co., Ltd Method for bumping and backlapping a semiconductor wafer
US8048775B2 (en) * 2007-07-20 2011-11-01 Alpha And Omega Semiconductor Incorporated Process of forming ultra thin wafers having an edge support ring
US9245861B2 (en) * 2012-09-01 2016-01-26 Alpha And Omega Semiconductor Incorporated Wafer process for molded chip scale package (MCSP) with thick backside metallization
US10026707B2 (en) * 2016-09-23 2018-07-17 Microchip Technology Incorportated Wafer level package and method

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004071792A (en) * 2002-08-06 2004-03-04 Seiko Epson Corp Semiconductor device and method for manufacturing the same
TW589726B (en) * 2003-04-25 2004-06-01 Chipmos Technologies Inc Wafer level packaging process and structure thereof
JP2005303214A (en) * 2004-04-16 2005-10-27 Matsushita Electric Ind Co Ltd Grinding method for semiconductor wafer
JP2011009341A (en) * 2009-06-24 2011-01-13 Fuji Electric Systems Co Ltd Method of manufacturing semiconductor device
JP2012182239A (en) * 2011-02-28 2012-09-20 Panasonic Corp Method of manufacturing semiconductor device
CN105448854A (en) * 2014-08-29 2016-03-30 万国半导体股份有限公司 Wafer manufacturing method for thickly-back-metalized molded chip-scale package
CN107706102A (en) * 2017-09-19 2018-02-16 上海华虹宏力半导体制造有限公司 Technique for thinning back side of silicon wafer method
CN209401606U (en) * 2019-01-18 2019-09-17 芯恩(青岛)集成电路有限公司 A kind of semiconductor devices
CN111430325A (en) * 2020-04-29 2020-07-17 绍兴同芯成集成电路有限公司 Process structure of wafer double-sided alloy bump

Also Published As

Publication number Publication date
CN111863596A (en) 2020-10-30

Similar Documents

Publication Publication Date Title
JPH10125685A (en) Protruding electrode and its forming method
US20130224910A1 (en) Method for chip package
CN111799178B (en) Double-sided copper-plating thick film process for ultrathin wafer
JPH06268112A (en) Semiconductor device and its manufacture
KR102196797B1 (en) Template for supporting mask and producing methoe thereof and producing method of mask integrated frame
KR20190031851A (en) Producing method of mask integrated frame
CN111863596B (en) Manufacturing process of copper column and thick film copper plating structure of wafer
CN111668125B (en) Wafer tin ball printing process
KR20190096577A (en) Mask integrated frame and producing method of mask integrated frame
US6548386B1 (en) Method for forming and patterning film
CN111799152B (en) Wafer double-sided metal process
CN111146099B (en) Semiconductor structure and manufacturing method thereof
TWI826497B (en) Template for supporting mask and producing methoe thereof and producing method of mask integrated frame
JP2000332049A (en) Manufacture of semiconductor device
JPH06230425A (en) Liquid crystal display device and its production
JPH10340852A (en) Substrate for transfer mask and manufacture of transfer mask using the substrate
WO2021227154A1 (en) Preparation method for display panel, and display panel and display apparatus
WO2022199019A1 (en) Array substrate and manufacturing method therefor, display panel, and display device
US6074948A (en) Method for manufacturing thin semiconductor device
US20240049506A1 (en) Mask-support assembly and producing method thereof
WO2017008366A1 (en) Method for manufacturing display panel
US20230230903A1 (en) Semiconductor chip, chip system, method of forming a semiconductor chip, and method of forming a chip system
KR20240058804A (en) Method of Manufacturing Bipolar Electrostatic Chuck Carrier with Structured Conductors
JPH02277242A (en) Manufacture of semiconductor device
US9698106B2 (en) Metal deposition on substrates

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant