CN111668125B - Wafer tin ball printing process - Google Patents
Wafer tin ball printing process Download PDFInfo
- Publication number
- CN111668125B CN111668125B CN202010568384.2A CN202010568384A CN111668125B CN 111668125 B CN111668125 B CN 111668125B CN 202010568384 A CN202010568384 A CN 202010568384A CN 111668125 B CN111668125 B CN 111668125B
- Authority
- CN
- China
- Prior art keywords
- wafer
- photoresist layer
- layer
- printing process
- metal layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/11001—Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate
- H01L2224/11002—Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate for supporting the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
- H01L2224/1131—Manufacturing methods by local deposition of the material of the bump connector in liquid form
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/118—Post-treatment of the bump connector
- H01L2224/11848—Thermal treatments, e.g. annealing, controlled cooling
Abstract
The invention discloses a wafer tin ball printing process, and belongs to the field of wafer processing. A wafer solder ball printing process comprises the following steps: sputtering one end face of the wafer to form a metal layer; coating a first photoresist layer on the metal layer, and carrying out exposure and development; removing the metal layer outside the protection area of the first light resistance layer, and then removing the first light resistance layer; bonding the other end face of the wafer on a glass carrier plate; coating a second light resistance layer on the non-bonding end face of the glass carrier plate; removing the second photoresist layer; coating a third photoresist layer in the window, and forming a through groove penetrating to the metal layer on the third photoresist layer through exposure and development; printing solder paste in the through groove, and removing the third photoresist layer; spraying soldering flux, and heating to form solder balls. Compared with the traditional tin ball printing process, the process breaks through the limitation of the traditional tin ball printing process on the thickness of the wafer, and can be suitable for thinner wafers.
Description
Technical Field
The invention relates to the field of wafer processing, in particular to a wafer tin ball printing process.
Background
In the design of high current power devices, because the input/output current intensity per unit time is very high, large-area or high-height solder balls (Bump) are needed to improve the reliability of products, but in the actual manufacturing process, after the high-level-difference solder balls are manufactured on the front surface of the wafer in a printing mode, the thinning of the back surface and the metal process are difficult to operate. Therefore, the process of printing solder ball must be performed by first performing the thinning process and then turning over to the front side.
Since the thin wafer must withstand the mechanical pressure of the solder paste, the processed wafer cannot be too thin, at least about 175-200 um. However, in order to reduce the resistance and the heat generation speed, the thickness of the element must be reduced to 100um or less, and even 40 to 50 um. Therefore, the existing processes are far from meeting the performance requirements.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides a wafer solder ball printing process.
The purpose of the invention can be realized by the following technical scheme:
a wafer solder ball printing process comprises the following steps:
arranging a dielectric layer on one end face of the wafer, sputtering on one end face of the wafer, and forming a metal layer on the dielectric layer;
coating a first photoresist layer on the metal layer, and carrying out exposure and development;
removing the metal layer outside the protection area of the first light resistance layer, and then removing the first light resistance layer;
bonding one end face of the wafer on a glass carrier plate;
coating a second photoresist layer on the non-bonding end face of the glass carrier plate, exposing and developing to form a through window on the glass carrier plate and expose the metal layer;
removing the second photoresist layer by using oxygen plasma or organic solvent;
coating a third photoresist layer in the window, and forming a through groove penetrating to the metal layer on the third photoresist layer through exposure and development;
printing solder paste in the through groove, and removing the third photoresist layer;
spraying soldering flux, and heating to form solder balls.
Further, the first photoresist layer, the second photoresist layer and the third photoresist layer are removed by oxygen plasma or organic solvent.
Furthermore, the metal layer is made of copper or titanium.
Further, after the wafer is bonded on the glass carrier plate and before the second photoresist layer is coated, the thickness of the wafer is reduced by grinding or etching.
Furthermore, after thinning, the thickness of the wafer is 20-100 microns.
Further, after the solder balls are formed, one end face of the wafer is cut through plasma, and then the wafer and the glass carrier plate are bonded in a debonding mode through laser heating.
The invention has the beneficial effects that:
because the wafer is bonded on the glass carrier plate before the solder paste is printed, and the printing operation is carried out by opening a window on the glass carrier plate. Because the glass carrier plate provides rigid support, the wafer can bear the mechanical pressure during printing or tin paste printing, and the limitation of the traditional tin ball printing process on the thickness of the wafer is broken through.
Drawings
The invention will be further described with reference to the accompanying drawings.
FIG. 1 is a partial cross-sectional view of a process structure in which a first photoresist layer has been coated in accordance with the present application;
FIG. 2 is a partial cross-sectional view of a process structure after development of a first photoresist layer is completed in the present application;
FIG. 3 is a partial cross-sectional view of the process structure after removal of the first photoresist layer in the present application;
FIG. 4 is a partial cross-sectional view of a bonded glass carrier and thinned process configuration of the present application;
FIG. 5 is a partial cross-sectional view of the process structure after removal of the second photoresist layer in the present application;
FIG. 6 is a partial cross-sectional view of the process structure after forming a through slot in the present application;
FIG. 7 is a partial cross-sectional view of the process structure after printing solder paste in accordance with the present application;
FIG. 8 is a partial cross-sectional view of the process structure after removal of the third photoresist layer in the present application;
FIG. 9 is a partial cross-sectional view of the process structure after the solder balls are formed by removing heat in the present application;
FIG. 10 is a partial cross-sectional view of a process structure after debonding in accordance with the present application;
FIG. 11 is a cross-sectional view of the process structure after the second photoresist layer has been removed in the present application;
FIG. 12 is an overall cross-sectional view of the process structure after debonding in the present application.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it is to be understood that the terms "opening," "upper," "lower," "thickness," "top," "middle," "length," "inner," "peripheral," and the like are used in an orientation or positional relationship that is merely for convenience in describing and simplifying the description, and do not indicate or imply that the referenced component or element must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be considered as limiting the present invention.
A wafer solder ball printing process comprises the following steps:
arranging a dielectric layer on one end face of the wafer 1, sputtering on one end face of the wafer 1, and forming a metal layer 3 on the dielectric layer; specifically, the metal layer 3 is, for example, but not limited to, copper or titanium, and the number of layers of the metal layer 3 may be multiple, in this embodiment, two metal layers 3 are sputtered.
As shown in fig. 1, a first photoresist layer 4 is coated on the metal layer 3, and then exposed and developed, as shown in fig. 2, a pattern of preset positions of solder balls 7 is formed on the metal layer 3.
As shown in fig. 3, the metal layer 3 outside the protection region of the first photoresist layer 4 is removed, so that the shape of the remaining portion of the metal layer 3 corresponds to the shape of the first photoresist layer 4. Then, the first photoresist layer 4 is removed.
As shown in fig. 4, bonding an end face of the wafer 1 on a glass carrier 2; the thickness of the wafer 1 can then be reduced by grinding or etching to obtain a thinner wafer 1. After thinning, the thickness of the wafer 1 can be 20-100 microns.
Coating a second photoresist layer on the non-bonding end face of the glass carrier 2, then, forming a through window on the glass carrier 2 through exposure and development, exposing the metal layer 3 from the window, and then removing the second photoresist layer. After the window is opened, the process structure is shown in fig. 5 and 11.
As shown in fig. 6, a third photoresist layer 6 is coated in the window, and through grooves penetrating to the metal layer 3 are formed on the third photoresist layer 6 through exposure and development.
As shown in fig. 7, the solder paste 5 is printed in the through-groove by printing. Subsequently, the third photoresist layer 6 is removed, and the process structure as shown in fig. 8 is obtained.
As shown in fig. 9, the solder ball 7 is formed by spraying flux and heating. It should be noted that, in order to ensure the quality of the obtained solder balls 7, the thickness of the glass carrier 2 at the window is not greater than the diameter of the solder balls 7, or the height of the solder balls 7.
After the solder ball 7 is formed, one end face of the wafer 1 is cut by plasma, and then laser or heating is performed. So that the wafer 1 and the glass carrier 2 are debonded, and the final process structure is as shown in fig. 10 and fig. 12.
It is understood that by forming the window on the glass carrier 2, the portion reserved for the solder ball 7 is exposed, and the subsequent operation of printing or coating the solder paste 5 can be performed in the state that the wafer 1 is bonded to the glass carrier 2. The glass carrier 2 provides rigid support for the wafer 1, so that the wafer 1 is not easily broken when bearing the mechanical pressure generated during printing the solder paste 5. That is, compared with the traditional solder ball 7 printing process, the process breaks through the limitation of the traditional solder ball 7 printing process on the thickness of the wafer 1, and can be applied to thinner wafers 1.
In the description herein, references to the description of "one embodiment," "an example," "a specific example" or the like are intended to mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The foregoing shows and describes the general principles, essential features, and advantages of the invention. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, which are described in the specification and illustrated only to illustrate the principle of the present invention, but that various changes and modifications may be made therein without departing from the spirit and scope of the present invention, which fall within the scope of the invention as claimed.
Claims (7)
1. A wafer tin ball printing process is characterized by comprising the following steps:
arranging a dielectric layer on one end face of the wafer, sputtering on one end face of the wafer, and forming a metal layer on the dielectric layer;
coating a first photoresist layer on the metal layer, and carrying out exposure and development;
removing the metal layer outside the protection area of the first light resistance layer, and then removing the first light resistance layer;
bonding one end face of the wafer on a glass carrier plate;
coating a second photoresist layer on the non-bonding end face of the glass carrier plate, exposing and developing to form a through window on the glass carrier plate and expose the metal layer;
removing the second photoresist layer;
coating a third photoresist layer in the window, and forming a through groove penetrating to the metal layer on the third photoresist layer through exposure and development;
printing solder paste in the through groove, and removing the third photoresist layer;
spraying soldering flux, and heating to form solder balls.
2. The wafer solder ball printing process of claim 1, wherein the first photoresist layer, the second photoresist layer and the third photoresist layer are removed by oxygen plasma or organic solvent.
3. The wafer solder ball printing process of claim 1, wherein the metal layer is made of copper or titanium.
4. The wafer solder ball printing process of claim 1, wherein after bonding the wafer on the glass carrier and before coating the second photoresist layer, the wafer is thinned by grinding or etching.
5. The wafer solder ball printing process of claim 4, wherein the thickness of the wafer is 20-100 μm after thinning.
6. The wafer solder ball printing process of claim 1, wherein after the solder ball is formed, an end face of the wafer is cut by plasma, and then the wafer and the glass carrier are debonded by laser heating.
7. The wafer solder ball printing process of claim 1, wherein the thickness of the glass carrier plate at the window is not greater than the diameter of the solder ball.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010568384.2A CN111668125B (en) | 2020-06-19 | 2020-06-19 | Wafer tin ball printing process |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010568384.2A CN111668125B (en) | 2020-06-19 | 2020-06-19 | Wafer tin ball printing process |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN111668125A CN111668125A (en) | 2020-09-15 |
| CN111668125B true CN111668125B (en) | 2022-03-15 |
Family
ID=72389203
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010568384.2A Active CN111668125B (en) | 2020-06-19 | 2020-06-19 | Wafer tin ball printing process |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111668125B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112234018B (en) * | 2020-10-19 | 2022-03-15 | 绍兴同芯成集成电路有限公司 | Ultrathin large-area tin ball printing process adopting polyimide |
| CN112259495A (en) * | 2020-10-22 | 2021-01-22 | 绍兴同芯成集成电路有限公司 | Wafer printing process |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2598137Y (en) * | 2003-01-16 | 2004-01-07 | 威盛电子股份有限公司 | Chip encapsulating structure |
| JP4130158B2 (en) * | 2003-06-09 | 2008-08-06 | 三洋電機株式会社 | Semiconductor device manufacturing method, semiconductor device |
| JP5243735B2 (en) * | 2007-06-18 | 2013-07-24 | ローム株式会社 | Circuit board and semiconductor device |
| CN101373748B (en) * | 2007-08-20 | 2011-06-15 | 宏茂微电子(上海)有限公司 | Wafer-class encapsulation structure and preparation method thereof |
| US9165792B2 (en) * | 2012-09-25 | 2015-10-20 | Infineon Technologies Ag | Integrated circuit, a chip package and a method for manufacturing an integrated circuit |
-
2020
- 2020-06-19 CN CN202010568384.2A patent/CN111668125B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN111668125A (en) | 2020-09-15 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN111668125B (en) | Wafer tin ball printing process | |
| TWI290357B (en) | Dicing sheet, manufacturing method thereof, and manufacturing method of semiconductor apparatus | |
| JP2008182279A (en) | Method for forming solder bump and production of electronic part | |
| JP2005303218A (en) | Semiconductor device and its manufacturing method | |
| JP2018006677A (en) | Manufacturing method for element chip | |
| CN110214369A (en) | Method and apparatus for bonding chip | |
| JP2010087490A (en) | Semiconductor device and semiconductor device manufacturing method | |
| JP2017199834A (en) | Semiconductor package and method of manufacturing the same | |
| JP2000349198A (en) | Chip-size package interposer, its manufacture and intermediate member | |
| CN112661106A (en) | Wafer-level packaging method of non-refrigeration detector, non-refrigeration detector and preparation method thereof | |
| TW202207380A (en) | Semiconductor package and manufacturing method of semiconductor package | |
| JP2006210937A (en) | Method for forming solder bump | |
| KR20040027346A (en) | Method of manufacturing circuit device | |
| JP6691835B2 (en) | Method for manufacturing semiconductor package | |
| CN112259495A (en) | Wafer printing process | |
| JP4087876B2 (en) | Method of forming solder bump | |
| JP2008071831A (en) | Ic chip with through electrode and method for manufacturing the same ic chip | |
| TW201810454A (en) | Manufacturing method of semiconductor package | |
| JP3267167B2 (en) | Semiconductor device and manufacturing method thereof | |
| CN115036390B (en) | Preparation method of high-width-ratio increased welding spot column, electronic device and infrared detector | |
| CN110299338B (en) | Inner column outer ring type double-area composite welding spot structure and hybrid bonding method | |
| TWI727506B (en) | Manufacturing method of semiconductor package and adhesive sheet used therefor | |
| JP2017199824A (en) | Method of manufacturing semiconductor package | |
| CN111863596B (en) | Manufacturing process of copper column and thick film copper plating structure of wafer | |
| WO2023162264A1 (en) | Method for producing semiconductor device, and semiconductor device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |