CN111787684A - Many PP stacks structure and melts landfill hole response discernment circuit board - Google Patents
Many PP stacks structure and melts landfill hole response discernment circuit board Download PDFInfo
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- CN111787684A CN111787684A CN202010701316.9A CN202010701316A CN111787684A CN 111787684 A CN111787684 A CN 111787684A CN 202010701316 A CN202010701316 A CN 202010701316A CN 111787684 A CN111787684 A CN 111787684A
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- 230000004044 response Effects 0.000 title description 5
- 239000000155 melt Substances 0.000 title description 3
- 239000010410 layer Substances 0.000 claims abstract description 57
- 230000006698 induction Effects 0.000 claims abstract description 36
- 239000011241 protective layer Substances 0.000 claims abstract description 31
- 238000005553 drilling Methods 0.000 claims abstract description 25
- 238000002844 melting Methods 0.000 claims abstract description 23
- 230000008018 melting Effects 0.000 claims abstract description 18
- 238000003825 pressing Methods 0.000 claims abstract description 17
- 238000002360 preparation method Methods 0.000 claims abstract description 12
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 9
- 229910052802 copper Inorganic materials 0.000 claims abstract description 9
- 239000010949 copper Substances 0.000 claims abstract description 9
- 230000000694 effects Effects 0.000 claims abstract description 9
- 238000010030 laminating Methods 0.000 claims abstract description 9
- 238000007747 plating Methods 0.000 claims abstract description 9
- 239000004820 Pressure-sensitive adhesive Substances 0.000 claims description 40
- 239000000758 substrate Substances 0.000 claims description 24
- 238000001125 extrusion Methods 0.000 claims description 14
- 238000004519 manufacturing process Methods 0.000 claims description 14
- 238000013461 design Methods 0.000 claims description 12
- 238000000034 method Methods 0.000 claims description 11
- 229910000679 solder Inorganic materials 0.000 claims description 9
- 239000011248 coating agent Substances 0.000 claims description 8
- 238000000576 coating method Methods 0.000 claims description 8
- 238000001816 cooling Methods 0.000 claims description 8
- 238000005520 cutting process Methods 0.000 claims description 8
- 229920005989 resin Polymers 0.000 claims description 8
- 239000011347 resin Substances 0.000 claims description 8
- 239000004814 polyurethane Substances 0.000 claims description 5
- 229920002635 polyurethane Polymers 0.000 claims description 5
- NIXOWILDQLNWCW-UHFFFAOYSA-M Acrylate Chemical compound [O-]C(=O)C=C NIXOWILDQLNWCW-UHFFFAOYSA-M 0.000 claims description 4
- 238000009713 electroplating Methods 0.000 claims description 4
- 238000005498 polishing Methods 0.000 claims description 4
- 229920001296 polysiloxane Polymers 0.000 claims description 4
- 239000004593 Epoxy Substances 0.000 claims 1
- 239000002344 surface layer Substances 0.000 abstract description 8
- 238000005299 abrasion Methods 0.000 abstract description 5
- 238000011161 development Methods 0.000 description 5
- 239000003822 epoxy resin Substances 0.000 description 4
- 229920000647 polyepoxide Polymers 0.000 description 4
- 238000011031 large-scale manufacturing process Methods 0.000 description 3
- 238000000465 moulding Methods 0.000 description 3
- 230000007613 environmental effect Effects 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- NIXOWILDQLNWCW-UHFFFAOYSA-N acrylic acid group Chemical group C(C=C)(=O)O NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
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- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/0047—Drilling of holes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/423—Plated through-holes or plated via connections characterised by electroplating method
- H05K3/424—Plated through-holes or plated via connections characterised by electroplating method by direct electroplating
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The invention discloses a multi-PP stacking and melting landfill hole induction recognition circuit board which comprises a circuit board body, a circuit layer and a PP protective layer, wherein the circuit layer is arranged between the circuit board body and the PP protective layer, so that the effects of inner layer conduction and circuit blind burying are realized; firstly drilling a through hole and then plating copper to achieve circuit conduction; then filling the through holes by adopting a laminating mode, and pressing a PP protective layer on the circuit layer. The invention also discloses a preparation method and application of the multi-PP stacking-melting landfill hole induction identification circuit board. The multi-PP overlapping and filling hole induction recognition circuit board disclosed by the invention has the advantages of good comprehensive performance, no circuit contact on the surface layer, capability of effectively increasing the use times of cards, avoiding contact abrasion, increasing the diversification of market products and strong market popularization.
Description
Technical Field
The invention belongs to the technical field of induction recognition circuit boards, and particularly relates to a multi-PP stacking and melting landfill hole induction recognition circuit board.
Background
Preschool education is one of the important contents of preschool education and is a part of the scientific system constituting the preschool education. Children are the basic stage of intelligence development of life and the fastest development period, and proper and correct preschool education plays a great role in the intelligence development of children and the development of children in the future. A common mode for developing preschool education for the young is to utilize circuit board card symbols and identify online pronunciation through IPAD (internet protocol ad), so that the preschool education is easy to implement, the learning efficiency of students can be effectively improved, children can receive knowledge education and can play pleasure, and the intelligent and recreational combination is realized. Therefore, its emergence has attracted people's attention and has become one of the main ways of modern preschool education.
At present, circuit board cards for developing preschool education in the market are mostly recrudescers or point-to-read machines and are card-inserting contact cards, the cards are easy to wear due to multiple times of contact, the use-resistant times are low, the cost is improved, and unnecessary waste and environmental problems are caused. These problems have stimulated interest in research on contactless circuit board cards by researchers in the industry. Non-contact circuit board card usually through response discernment, reduces card contact wear, promotes the card number of times of using, has effectively reduced energy consumption, cost, also can help one arm's power to environmental problem's solution. How to realize induction recognition and avoid contact wear becomes a popular subject which researchers in the industry strive to solve at present.
In the using process of the existing induction recognition circuit board, due to the single structure of the circuit board, the circuit board does not have waterproof and dustproof performance in the using process, and is easy to warp and deform in the using process, so that the practicability is poor; meanwhile, because the existing circuit board processing technology adopts the solder mask plug hole, a hole is formed in the hole, the waterproof and dustproof performance of the reinforcing plate after the pressing is finished is poor, the warping is difficult to control, the design requirements of the circuit board on customers cannot be met, and the loss of the product in the production process is wasted.
Therefore, how to develop a comprehensive performance is good, the surface layer does not have circuit contact, can effectively promote the use times of the card, avoid contact wear, increase market product diversification, and the strong market popularization's many PP overlapping structure melts landfill hole response identification circuit board accords with market demand, has extensive market value and application prospect, has very important meaning to the development that promotes the response identification circuit board trade.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provide a multi-PP stacking and melting landfill hole induction recognition circuit board, the circuit board designs a card circuit pattern into a blind landfill filling mode, the surface layer is manufactured without a circuit, the contact wear is avoided, the comprehensive performance is good, the surface layer is not contacted with the circuit, the use times of the card can be effectively improved, the contact wear is avoided, the diversification of market products is increased, and the market popularization is strong; meanwhile, the invention also provides a preparation method of the multi-PP stacking and melting landfill hole induction identification circuit board, and the preparation method is simple and easy to implement, has low requirements on equipment and preparation conditions, is high in production efficiency and yield, is low in production cost, and is suitable for continuous large-scale production.
In order to achieve the purpose, the invention adopts the technical scheme that: a multi-PP stacking and melting landfill hole induction recognition circuit board is characterized by comprising a circuit board body, a circuit layer and a PP protective layer, wherein the circuit layer is arranged between the circuit board body and the PP protective layer, so that the effects of inner layer conduction and circuit blind burying are realized; firstly drilling a through hole and then plating copper to achieve circuit conduction; then filling the through holes by adopting a laminating mode, and pressing a PP protective layer on the circuit layer.
Preferably, the thickness of the PP protective layer is 0.5-0.7 mm.
Preferably, the circuit board body, the circuit layer and the PP protective layer are mutually and independently adhered by pressure-sensitive adhesives.
Another object of the present invention is to provide a method for manufacturing the multi-PP stacking-melting buried hole induction identification circuit board, which includes the following steps:
step S1, cutting: cutting a plate with a certain size into a substrate to be processed;
step S2, drilling a through hole: drilling through holes in corresponding positions of the substrate manufactured in the step S1 according to related requirements;
step S3, electroplating: carrying out copper plating on the surface and the inside of the through hole of the substrate subjected to the through hole drilling in the step S2 through the current effect;
step S4, inner layer layout: filling PP resin into the through holes on the substrate subjected to the S3 treatment in a laminating manner under a vacuum condition, ensuring that the resin fills and levels the through holes, and polishing and leveling the surfaces of the filled holes; then coating the pressure-sensitive adhesive on the substrate processed in the step S3, and then distributing circuit patterns on the inner layer according to the design requirement to form a circuit layer;
step S5, pressing: coating a pressure-sensitive adhesive on the circuit layer processed in the step S4, and then pressing a PP protective layer on the circuit layer;
step S6, drilling a positioning hole to form an outer layer: drilling a positioning hole on the substrate manufactured in the step S5 according to the design requirement to form an outer layer;
step S7, solder mask, characters: performing solder mask treatment on the outer layer surface obtained in the step S6, and then performing character operation to obtain a semi-finished circuit board;
step S8, routing: and (4) routing the circuit board processed in the step S7, then carrying out extrusion forming, and manufacturing the multi-PP stacked and fused buried hole induction identification circuit board.
Preferably, a release film for facilitating release of the film is provided between the pressing surface and the finished circuit board during the press molding in step S8.
Preferably, the cooling rate during the extrusion molding is between 0.95 ℃/min and 1.15 ℃/min.
Preferably, the pressure-sensitive adhesives in the steps S4 and S5 are at least one of epoxy resin pressure-sensitive adhesives, acrylate pressure-sensitive adhesives, polyurethane pressure-sensitive adhesives and silicone pressure-sensitive adhesives, respectively.
The invention further aims to provide an application of the multi-PP stacking and burying hole induction recognition circuit board in preschool education.
Due to the application of the technical scheme, compared with the prior art, the invention has the following advantages: the invention provides a multi-PP stacked and fused landfill hole induction recognition circuit board, which designs a card circuit pattern into a blind landfill filling mode, and a surface layer is manufactured without a circuit, so that contact abrasion is avoided, the comprehensive performance is good, the surface layer is contacted without the circuit, the use frequency of the card can be effectively increased, the contact abrasion is avoided, the diversification of market products is increased, and the market popularization is strong; meanwhile, the invention also provides a preparation method of the multi-PP stacking and melting landfill hole induction identification circuit board, and the preparation method is simple and easy to implement, has low requirements on equipment and preparation conditions, is high in production efficiency and yield, is low in production cost, and is suitable for continuous large-scale production.
Drawings
The invention is further illustrated by means of the attached drawings, but the embodiments in the drawings do not constitute any limitation to the invention, and for a person skilled in the art, other drawings can be derived on the basis of the following drawings without inventive effort.
Fig. 1 is a flow chart of a manufacturing process of the multi-PP stacking-melting buried hole induction identification circuit board of the invention.
Detailed Description
The following detailed description of preferred embodiments of the invention will be made.
A multi-PP stacking and melting landfill hole induction recognition circuit board is characterized by comprising a circuit board body, a circuit layer and a PP protective layer, wherein the circuit layer is arranged between the circuit board body and the PP protective layer, so that the effects of inner layer conduction and circuit blind burying are realized; firstly drilling a through hole and then plating copper to achieve circuit conduction; then filling the through holes by adopting a laminating mode, and pressing a PP protective layer on the circuit layer.
Preferably, the thickness of the PP protective layer is 0.5-0.7 mm.
Preferably, the circuit board body, the circuit layer and the PP protective layer are mutually and independently adhered by pressure-sensitive adhesives.
Another object of the present invention is to provide a method for manufacturing the multi-PP stacking-melting buried hole induction identification circuit board, which includes the following steps:
step S1, cutting: cutting a plate with a certain size into a substrate to be processed;
step S2, drilling a through hole: drilling through holes in corresponding positions of the substrate manufactured in the step S1 according to related requirements;
step S3, electroplating: carrying out copper plating on the surface and the inside of the through hole of the substrate subjected to the through hole drilling in the step S2 through the current effect;
step S4, inner layer layout: filling PP resin into the through holes on the substrate subjected to the S3 treatment in a laminating manner under a vacuum condition, ensuring that the resin fills and levels the through holes, and polishing and leveling the surfaces of the filled holes; then coating the pressure-sensitive adhesive on the substrate processed in the step S3, and then distributing circuit patterns on the inner layer according to the design requirement to form a circuit layer;
step S5, pressing: coating a pressure-sensitive adhesive on the circuit layer processed in the step S4, and then pressing a PP protective layer on the circuit layer;
step S6, drilling a positioning hole to form an outer layer: drilling a positioning hole on the substrate manufactured in the step S5 according to the design requirement to form an outer layer;
step S7, solder mask, characters: performing solder mask treatment on the outer layer surface obtained in the step S6, and then performing character operation to obtain a semi-finished circuit board;
step S8, routing: and (4) routing the circuit board processed in the step S7, then carrying out extrusion forming, and manufacturing the multi-PP stacked and fused buried hole induction identification circuit board.
Preferably, a release film for facilitating release of the film is provided between the pressing surface and the finished circuit board during the press molding in step S8.
Preferably, the cooling rate during the extrusion molding is between 0.95 ℃/min and 1.15 ℃/min.
Preferably, the pressure-sensitive adhesives in the steps S4 and S5 are at least one of epoxy resin pressure-sensitive adhesives, acrylate pressure-sensitive adhesives, polyurethane pressure-sensitive adhesives and silicone pressure-sensitive adhesives, respectively.
The invention further aims to provide an application of the multi-PP stacking and burying hole induction recognition circuit board in preschool education.
Due to the application of the technical scheme, compared with the prior art, the invention has the following advantages: the invention provides a multi-PP stacked and fused landfill hole induction recognition circuit board, which designs a card circuit pattern into a blind landfill filling mode, and a surface layer is manufactured without a circuit, so that contact abrasion is avoided, the comprehensive performance is good, the surface layer is contacted without the circuit, the use frequency of the card can be effectively increased, the contact abrasion is avoided, the diversification of market products is increased, and the market popularization is strong; meanwhile, the invention also provides a preparation method of the multi-PP stacking and melting landfill hole induction identification circuit board, and the preparation method is simple and easy to implement, has low requirements on equipment and preparation conditions, is high in production efficiency and yield, is low in production cost, and is suitable for continuous large-scale production.
The invention will be further described with reference to specific examples, but the scope of protection of the invention is not limited thereto:
example 1
The embodiment 1 provides a multi-PP stacking and melting landfill hole induction recognition circuit board which is characterized by comprising a circuit board body, a circuit layer and a PP protective layer, wherein the circuit layer is arranged between the circuit board body and the PP protective layer, so that the effects of inner layer conduction and circuit blind burying are realized; firstly drilling a through hole and then plating copper to achieve circuit conduction; then filling the through holes by adopting a laminating mode, and pressing a PP protective layer on the circuit layer.
The thickness of the PP protective layer is 0.5 mm; the circuit board body, the circuit layer and the PP protective layer are mutually independent and are adhered by pressure-sensitive adhesive.
A preparation method of the multi-PP stacking and melting landfill hole induction recognition circuit board is characterized by comprising the following steps:
step S1, cutting: cutting a plate with a certain size into a substrate to be processed;
step S2, drilling a through hole: drilling through holes in corresponding positions of the substrate manufactured in the step S1 according to related requirements;
step S3, electroplating: carrying out copper plating on the surface and the inside of the through hole of the substrate subjected to the through hole drilling in the step S2 through the current effect;
step S4, inner layer layout: filling PP resin into the through holes on the substrate subjected to the S3 treatment in a laminating manner under a vacuum condition, ensuring that the resin fills and levels the through holes, and polishing and leveling the surfaces of the filled holes; then coating the pressure-sensitive adhesive on the substrate processed in the step S3, and then distributing circuit patterns on the inner layer according to the design requirement to form a circuit layer;
step S5, pressing: coating a pressure-sensitive adhesive on the circuit layer processed in the step S4, and then pressing a PP protective layer on the circuit layer;
step S6, drilling a positioning hole to form an outer layer: drilling a positioning hole on the substrate manufactured in the step S5 according to the design requirement to form an outer layer;
step S7, solder mask, characters: performing solder mask treatment on the outer layer surface obtained in the step S6, and then performing character operation to obtain a semi-finished circuit board;
step S8, routing: and (4) routing the circuit board processed in the step S7, then carrying out extrusion forming, and manufacturing the multi-PP stacked and fused buried hole induction identification circuit board.
Preferably, a release film for facilitating release of the film is provided between the pressing surface and the finished circuit board during the press molding in step S8.
Preferably, the cooling rate in the extrusion forming process is 0.95 ℃/min; the pressure-sensitive adhesives in the steps S4 and S5 are all epoxy resin pressure-sensitive adhesives independently.
An application of the multi-PP overlapping and filling hole induction recognition circuit board in preschool education.
Example 2
Embodiment 2 provides a multi-PP stacking melting landfill hole induction identification circuit board, which is basically the same as embodiment 1, except that the thickness of the PP protective layer is 0.55 mm; the cooling rate in the extrusion forming process is 0.98 ℃/min; the pressure-sensitive adhesives in the steps S4 and S5 are both acrylic pressure-sensitive adhesives independently.
Example 3
Embodiment 3 provides a multi-PP stacking melting landfill hole induction identification circuit board, which is substantially the same as embodiment 1 except that the thickness of the PP protective layer is 0.6 mm; the cooling rate in the extrusion forming process is 1 ℃/min; the pressure-sensitive adhesives in the steps S4 and S5 are all polyurethane pressure-sensitive adhesives independently.
Example 4
Embodiment 4 provides a multi-PP stacking melting landfill hole induction identification circuit board, which is substantially the same as embodiment 1 except that the thickness of the PP protective layer is 0.65 mm; the cooling rate in the extrusion forming process is 1.1 ℃/min; the pressure-sensitive adhesives in step S4 and step S5 are all silicone pressure-sensitive adhesives independently.
Example 5
Embodiment 5 provides a multi-PP stacking melting buried hole induction identification circuit board, which is substantially the same as embodiment 1 except that the thickness of the PP protective layer is 0.7 mm; the cooling rate in the extrusion forming process is 1.15 ℃/min; in the step S4 and the step S5, the pressure-sensitive adhesives are all mixed by epoxy resin pressure-sensitive adhesives, acrylate pressure-sensitive adhesives, polyurethane pressure-sensitive adhesives and organic silicon pressure-sensitive adhesives according to the mass ratio of 1:2:3: 1.
The above-mentioned embodiments are merely illustrative of the technical concept and features of the present invention, and the purpose thereof is to enable those skilled in the art to understand the content of the present invention and implement the invention, and not to limit the scope of the present invention, and all equivalent changes or modifications made according to the spirit of the present invention should be covered by the scope of the present invention.
Claims (8)
1. A multi-PP stacking and melting landfill hole induction recognition circuit board is characterized by comprising a circuit board body, a circuit layer and a PP protective layer, wherein the circuit layer is arranged between the circuit board body and the PP protective layer, so that the effects of inner layer conduction and circuit blind burying are realized; firstly drilling a through hole and then plating copper to achieve circuit conduction; then filling the through holes by adopting a laminating mode, and pressing a PP protective layer on the circuit layer.
2. The circuit board of claim 1, wherein the PP protective layer has a thickness of 0.5-0.7 mm.
3. The multi-PP stacking and melting landfill hole induction identification circuit board as claimed in claim 2, wherein the circuit board body and the circuit layer, and the circuit layer and the PP protective layer are adhered independently by pressure-sensitive adhesive.
4. The multi-PP stacking and melting landfill hole induction identification circuit board as claimed in claim 3, wherein the preparation method of the multi-PP stacking and melting landfill hole induction identification circuit board is characterized by comprising the following steps:
step S1, cutting: cutting a plate with a certain size into a substrate to be processed;
step S2, drilling a through hole: drilling through holes in corresponding positions of the substrate manufactured in the step S1 according to related requirements;
step S3, electroplating: carrying out copper plating on the surface and the inside of the through hole of the substrate subjected to the through hole drilling in the step S2 through the current effect;
step S4, inner layer layout: filling PP resin into the through holes on the substrate subjected to the S3 treatment in a laminating manner under a vacuum condition, ensuring that the resin fills and levels the through holes, and polishing and leveling the surfaces of the filled holes; then coating the pressure-sensitive adhesive on the substrate processed in the step S3, and then distributing circuit patterns on the inner layer according to the design requirement to form a circuit layer;
step S5, pressing: coating a pressure-sensitive adhesive on the circuit layer processed in the step S4, and then pressing a PP protective layer on the circuit layer;
step S6, drilling a positioning hole to form an outer layer: drilling a positioning hole on the substrate manufactured in the step S5 according to the design requirement to form an outer layer;
step S7, solder mask, characters: performing solder mask treatment on the outer layer surface obtained in the step S6, and then performing character operation to obtain a semi-finished circuit board;
step S8, routing: and (4) routing the circuit board processed in the step S7, then carrying out extrusion forming, and manufacturing the multi-PP stacked and fused buried hole induction identification circuit board.
5. The circuit board of claim 4, wherein a release film for easy release is disposed between the extrusion surface and the finished circuit board during extrusion molding in step S8.
6. The circuit board of claim 4, wherein the cooling rate during the extrusion molding process is 0.95 ℃/min to 1.15 ℃/min.
7. The circuit board of claim 4, wherein the pressure sensitive adhesives in steps S4 and S5 are at least one of epoxy pressure sensitive adhesive, acrylate pressure sensitive adhesive, polyurethane pressure sensitive adhesive, and silicone pressure sensitive adhesive, respectively.
8. Use of the multi-PP stacking-melting landfill hole induction recognition circuit board according to any one of claims 1-7 in preschool education.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010701316.9A CN111787684A (en) | 2020-07-20 | 2020-07-20 | Many PP stacks structure and melts landfill hole response discernment circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010701316.9A CN111787684A (en) | 2020-07-20 | 2020-07-20 | Many PP stacks structure and melts landfill hole response discernment circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN111787684A true CN111787684A (en) | 2020-10-16 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010701316.9A Pending CN111787684A (en) | 2020-07-20 | 2020-07-20 | Many PP stacks structure and melts landfill hole response discernment circuit board |
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| CN (1) | CN111787684A (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3012590B2 (en) * | 1998-03-26 | 2000-02-21 | 富山日本電気株式会社 | Method for manufacturing multilayer printed wiring board |
| JP2000323807A (en) * | 1999-05-13 | 2000-11-24 | Noda Screen:Kk | Printed wiring board and manufacture thereof |
| KR20070099360A (en) * | 2006-04-04 | 2007-10-09 | 엘지전자 주식회사 | Making method of printed circuit board |
| CN110149761A (en) * | 2019-06-14 | 2019-08-20 | 昆山大洋电路板有限公司 | A kind of blind circuit board structure for burying electric gold wire of internal layer and method |
-
2020
- 2020-07-20 CN CN202010701316.9A patent/CN111787684A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3012590B2 (en) * | 1998-03-26 | 2000-02-21 | 富山日本電気株式会社 | Method for manufacturing multilayer printed wiring board |
| JP2000323807A (en) * | 1999-05-13 | 2000-11-24 | Noda Screen:Kk | Printed wiring board and manufacture thereof |
| KR20070099360A (en) * | 2006-04-04 | 2007-10-09 | 엘지전자 주식회사 | Making method of printed circuit board |
| CN110149761A (en) * | 2019-06-14 | 2019-08-20 | 昆山大洋电路板有限公司 | A kind of blind circuit board structure for burying electric gold wire of internal layer and method |
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