CN111725291A - 一种jte内嵌多沟槽复合终端结构功率器件及制作方法 - Google Patents

一种jte内嵌多沟槽复合终端结构功率器件及制作方法 Download PDF

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CN111725291A
CN111725291A CN201810613402.7A CN201810613402A CN111725291A CN 111725291 A CN111725291 A CN 111725291A CN 201810613402 A CN201810613402 A CN 201810613402A CN 111725291 A CN111725291 A CN 111725291A
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袁俊
徐妙玲
黄兴
倪炜江
卢小东
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Beijing Century Goldray Semiconductor Co ltd
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Abstract

本发明公开了JTE内嵌多沟槽复合终端结构功率器件及制作方法；自上而下依次层叠设置有P型区、外延层、衬底层和阴极，阳极设置在P型区；在外延层的上方设置有P+区和JTE，所述P+区和所述JTE的一端连接；所述JTE顶部设置有若干个沟槽环，所述沟槽环中填有High‑K介质。本申请的新型复合终端耐压结构工艺简单，对JTE浓度敏感性降低，同时能提高器件终端的耐压能力和减少所需耐压终端的芯片面积；同时终端的N型抗浪涌电流增强层Surge layer在正向导通时大的浪涌电流下还能起到分流作用，增强器件的抗浪涌电流能力。

Description

一种JTE内嵌多沟槽复合终端结构功率器件及制作方法
技术领域
本发明涉及半导体器件技术领域，具体涉及一种功率器件JTE内嵌多沟槽复合终端结构及其制作方法。
背景技术
SiC 作为近十几年来迅速发展的宽禁带半导体材料，与其它半导体材料，比如Si，GaN 及GaAs 相比，SiC 材料具有宽禁带、高热导率、高载流子饱和迁移率、高功率密度等优点。SiC 可以热氧化生成二氧化硅，使得SiC MOSFET，SBD，IGBT及GTO等功率器件和电路的实现成为可能。自20 世纪90 年代以来，SiC MOSFET和SBD等功率器件已在开关稳压电源、高频加热、汽车电子以及功率放大器等方面取得了广泛的应用。
目前碳化硅功率器件的设计和制备过程中，尤其是高压功率器件，为了降低结边缘电场，提高器件实际耐压能力，需要器件有良好的终端结构，例如场板(FP)、场限环(FLR)、结终端延伸(JTE)等。如图1、图2所示，在现有SiC功率器件结构中广泛应用的主要是结终端延伸结构(JTE)和场限环(FLR)。
但是，由于SiC器件的表面电场高，为了提高耐压，需要在器件设计时降低表面峰值电场，需要设计较多数量的场限环。在设计中，环的数量、环宽、环间隔等较多因素都会对表面电场分布造成影响，并且多个场限环的终端占用芯片面积较大，不利于提高电流。而结终端延伸结构JTE存在优值浓度，器件终端击穿耐压对JTE的优值浓度敏感，因此设计窗口较小。并且结终端延伸结构对表面电荷非常敏感，容易因界面不稳定性和氧化层电荷而影响器件表面电场分布，进而影响器件击穿电压以及可靠性。因此，需要设计一种更可靠高效的SiC器件终端结构，对JTE的浓度或FLR环宽、间距的工艺偏差以及界面电荷不敏感，同时提高器件的耐压性能。
发明内容
针对现有技术中存在的问题，本发明的目的在于提供一种功率器件JTE内嵌多沟槽复合终端结构及其制作方法。该新型终端结构主要由三种结构组合而成：在N型（或P型）外延耐压层的结终端区域的上层是与外延层相反掺杂的P型层结终端延伸JTE（外延是P型时则为N型），同时在上层P型层中有离散的沟槽环，沟槽中填入了SiO2或其他High-K介质；在终端P型JTE结构的底下有与外延层相同掺杂类型但浓度比外延层稍高的N型抗浪涌电流增强层Surge layer。在具体工艺制作时，终端P型 JTE区和底下的N型抗浪涌电流增强层Surge layer一次注入完成，然后利用类似传统场限环FLR的光刻版做光刻，直接在光刻的开口处继续往下刻蚀出离散的沟槽结构；接下来在制作器件钝化层时将沟槽中填入了SiO2或其他High-K介质，这样就能构造出一种新型的JTE复合终端结构。这种新型复合终端耐压结构工艺简单，对JTE浓度敏感性降低，同时能提高器件终端的耐压能力和减少所需耐压终端的芯片面积；同时终端的N型抗浪涌电流增强层Surge layer在正向导通时大的浪涌电流下还能起到分流作用，增强器件的抗浪涌电流能力。
为实现上述目的，本发明采用以下技术方案：
一种JTE内嵌多沟槽复合终端结构功率器件，自上而下依次层叠设置有P型区、外延层、衬底层和阴极，阳极设置在P型区；在外延层的上方设置有P+区和底部平整的JTE结构，所述P+区和所述JTE结构的一端连接；所述JTE结构的顶部设置有若干个沟槽环，所述沟槽环中填有High-K介质。
进一步，所述JTE结构的底部设置有雪崩耐量增强结构。
如权利要求1所述的功率器件，其特征在于，所述高介电常数介质为SiO2、SiNx、Al2O3、AlN、HfO2、MgO、Sc2O3、Ga2O3、AlHFOx、HFSiON材料中的一种或任意几种的组合。
进一步，所述功率器件包括但不限于PIN，SBD，MOSFET，IGBT或GTO。
进一步，所述功率器件的制作晶圆材料包括但不限于硅，碳化硅，砷化镓，氮化铝，氮化镓，氧化镓或金刚石。
本申请还公开了上述的功率器件的制作方法，包括以下步骤：
1）在N型（或P型）外延耐压层的结终端区域的上层是与外延层相反掺杂的P型层结终端延伸JTE（外延是P型时则为N型）；
2)利用光刻版做光刻，直接在光刻的开口处继续往下刻蚀出若干个沟槽环；最好是圆环；
3)在沟槽环中填入了SiO2或其他High-K介质。
进一步，包括以下步骤：
4）在终端P型JTE结构的底下注入与外延层相同掺杂类型但浓度比外延层稍高的离子；形成N型抗浪涌电流增强层。
本申请的新型复合终端耐压结构工艺简单，对JTE浓度敏感性降低，同时能提高器件终端的耐压能力和减少所需耐压终端的芯片面积；同时终端的N型抗浪涌电流增强层Surge layer在正向导通时大的浪涌电流下还能起到分流作用，增强器件的抗浪涌电流能力。
附图说明
图1为现有技术中传统结终端延伸JTE结构示意图；
图2为现有技术中场限环FLR结构示意图；
图3为实施例1JTE内嵌多沟槽复合终端结构示意图；
图4为实施例2JTE内嵌多沟槽复合终端结构示意图；
图5为传统JTE终端结构的电场分布和击穿电压示意图；
图6为传统场限环FLR终端结构的电场分布和击穿电压示意图；
图7为实施例1内嵌多沟槽复合终端结构的电场分布和击穿电压示意图；
图8为实施例2内嵌多沟槽复合终端结构的电场分布和击穿电压示意图。
图中：1、阳极； 2、High-K介质；3、P+区； 4、FLR结构；5、JTE结构；6、N+衬底；7、外延层；8、N+区。
具体实施方式
下面利用实施例对本发明进行更全面的说明。本发明可以体现为多种不同形式，并不应理解为局限于这里叙述的示例性实施例。
实施例1
如图3所示，JTE内嵌多沟槽复合终端结构功率器件，自上而下依次层叠设置有P型区、外延层7、衬底层6和阴极，阳极1设置在P型区上；在外延层7的上方设置有P+区3和底部平整的JTE结构5，所述P+区3和所述JTE结构5的一端连接。JTE结构5的顶部开设有若干个沟槽环；沟槽环中填有SiO2或者其他High-K介质。
功率器件中，特殊设计的终端结构的制作方法为：
1）在N型（或P型）外延耐压层的结终端区域的上层是与外延层相反掺杂的P型层结终端延伸JTE（外延是P型时则为N型）；
2）利用光刻版做光刻，直接在光刻的开口处继续往下刻蚀出若干个沟槽环；最好是圆环；
3）在沟槽环中填入了SiO2或其他High-K介质。
在终端P型JTE结构的底下有与外延层相同掺杂类型但浓度比外延层稍高的N型抗浪涌电流增强层Surge layer。在具体工艺制作时，终端P型 JTE区和底下的N型抗浪涌电流增强层Surge layer一次注入完成，然后利用类似传统场限环FLR的光刻版做光刻，直接在光刻的开口处继续往下刻蚀出离散的沟槽结构；接下来在制作器件钝化层时将沟槽中填入了SiO2或其他High-K介质，这样就能构造出一种新型的JTE复合终端结构。
沟槽中填充的高介电常数介质可以选用SiO2、SiNx、Al2O3、AlN、HfO2、MgO、Sc2O3、Ga2O3、AlHFOx、HFSiON材料中的一种或任意几种的组合。
实施例2
与实施例1基本相同；区别为在JTE结构的下方设置了N型抗浪涌电流增强层。
制作方法增加了步骤4）在终端P型JTE结构的底下注入与外延层相同掺杂类型但浓度比外延层稍高的离子；形成N型抗浪涌电流增强层（Surge layer）。
针对同样的掺杂浓度，图5是传统单纯JTE结构终端的反向电场分布和反向耐压击穿电压特性，反向击穿电压为1500V左右。图6是传统单纯FLR结构终端的反向电场分布和反向耐压击穿电压特性，反向击穿电压为1700V左右。图7是本发明新型复合终端的反向电场分布和反向耐压击穿电压特性，可以看出本发明的复合终端反向电场分布更为扩展，击穿电压提升到2100V左右,同时达到了终端结构和主结区同时达到耐压击穿的理想效果。
本申请通过在功率器件耐压结终端中将传统结终端JTE结构中引入分离的沟槽和介质块以及浪涌电流分流结构，工艺简单，使器件结终端对JTE浓度敏感性降低，能提高器件终端的耐压能力和减少所需耐压终端的芯片面积；同时终端的N型抗浪涌电流增强层Surge layer在正向导通时大的浪涌电流下还能起到分流作用，增强器件的抗浪涌电流能力。
上述示例只是用于说明本发明，除此之外，还有多种不同的实施方式，而这些实施方式都是本领域技术人员在领悟本发明思想后能够想到的，故，在此不再一一列举。

Claims (7)

1.一种JTE内嵌多沟槽复合终端结构功率器件，自上而下依次层叠设置有P型区、外延层、衬底层和阴极，阳极设置在P型区；在外延层的上方设置有P+区和底部平整的JTE结构，所述P+区和所述JTE结构的一端连接；其特征在于，所述JTE结构的顶部设置有若干个沟槽环，所述沟槽环中填有High-K介质。
2.如权利要求1所述的功率器件，其特征在于，所述JTE结构的底部设置有雪崩耐量增强结构。
3.如权利要求1所述的功率器件，其特征在于，所述高介电常数介质为SiO2、SiNx、Al2O3、AlN、HfO2、MgO、Sc2O3、Ga2O3、AlHFOx、HFSiON材料中的一种或任意几种的组合。
4.如权利要求1所述的功率器件，其特征在于，所述功率器件包括但不限于PIN，SBD，MOSFET，IGBT或GTO。
5.如权利要求1所述的功率器件，其特征在于，所述功率器件的制作晶圆材料包括但不限于硅，碳化硅，砷化镓，氮化铝，氮化镓，氧化镓或金刚石。
6.如权利要求1所述的功率器件的制作方法，其特征在于，包括以下步骤：
1）在N型（或P型）外延耐压层的结终端区域的上层是与外延层相反掺杂的P型层结终端延伸JTE（外延是P型时则为N型）；
2）利用光刻版做光刻，直接在光刻的开口处继续往下刻蚀出若干个沟槽环；最好是圆环；
3）在沟槽环中填入了SiO2或其他High-K介质。
7.如权利要求6所述的功率器件的制作方法，其特征在于，包括以下步骤：
4）在终端P型JTE结构的底下注入与外延层相同掺杂类型但浓度比外延层稍高的离子；形成N型抗浪涌电流增强层。
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