CN111599699A - Method for manufacturing semiconductor package product and semiconductor package product - Google Patents
Method for manufacturing semiconductor package product and semiconductor package product Download PDFInfo
- Publication number
- CN111599699A CN111599699A CN202010263666.1A CN202010263666A CN111599699A CN 111599699 A CN111599699 A CN 111599699A CN 202010263666 A CN202010263666 A CN 202010263666A CN 111599699 A CN111599699 A CN 111599699A
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- CN
- China
- Prior art keywords
- chip
- semiconductor package
- steel mesh
- lead frame
- gluing
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/52—Mounting semiconductor bodies in containers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49562—Geometry of the lead-frame for devices being provided for in H01L29/00
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
Abstract
The invention discloses a manufacturing method of a semiconductor packaging product and the semiconductor packaging product, which comprises the steps of gluing a chip and an inner pin, wherein the height difference between a glue dispensing surface of the chip and a glue dispensing surface of the inner pin is set to be +/-0.05 mm before gluing, and the gluing operation on the chip and the inner pin is carried out once in a steel mesh printing mode. By adjusting the design of the lead frame and matching with the fixed thickness of the chip, the height difference between the tin surface on the chip and the tin surface on the pin is ensured to be within +/-0.05 mm, and the height difference is filled by utilizing the fitting property (deformable) of a steel mesh during printing, so that the tin paste on the surface of the chip and the tin paste on the pin can be printed at one time by adopting a planar steel mesh printing process; the thickness of the steel mesh is set to be 0.05 mm to 0.10 mm, and the windowing dimension on the steel mesh is 0.25 mm multiplied by 0.25 mm, so that the tin paste printing dimension of the grid is ensured to meet the requirement of the small-size grid, and the defect of pneumatic tin point is overcome.
Description
Technical Field
The present invention relates to the field of semiconductor technologies, and in particular, to a method for manufacturing a semiconductor package product and a semiconductor package product.
Background
The power semiconductor module is an assembly according to a certain function and mode, and the power semiconductor module is formed by combining and encapsulating high-power electronic power devices into a whole according to a certain function. The power semiconductor module can realize different functions according to different packaged components, and can be used as an air cooling module by matching with air cooling heat dissipation, a water cooling module by matching with water cooling heat dissipation and the like.
Power semiconductor packages are now increasingly selecting copper bridges to replace metal wires to meet the demand of higher power applications. The larger the source electrode area of the chip is, the better the chip is, the smaller the gate electrode area is, and the minimum gate electrode size currently applied to copper bridge welding in the market is 0.3 mm × 0.3 mm, and the trend is towards further reduction.
The traditional pneumatic tin dotting process is carried out on a source electrode and a grid electrode above a chip in the existing copper bridge welding process, the process can control the tin quantity through air pressure, the traditional tin dotting process can be applied to the design that the tin dotting surface of the chip is lower or higher than the tin dotting surface of a pin, the thickness of the chip is not limited under the condition that a lead frame is fixed, and the copper bridge welding process has great advantages.
However, the conventional process for dispensing and welding the copper bridge cannot meet the use requirement when the gate is 0.3 mm × 0.3 mm, because the following reasons are:
1. the tin powder particles are contained in the tin paste, when the diameter of the point tin needle cylinder is smaller than 0.4 mm, the needle cylinder is blocked, and after the needle cylinder is blocked, glue cannot be discharged to form welding, so that an open circuit is formed;
2. when the diameter of the point tin needle cylinder is set to be 0.4 mm or more, the pointed tin diameter is at least 0.5 mm, and short circuit can be caused after the copper bridge is welded due to too much tin.
Therefore, it is desirable to provide a method for manufacturing a semiconductor package product, which is used to realize the production process of the semiconductor package product with a small gate size.
Disclosure of Invention
The embodiment of the invention aims to: the manufacturing method of the semiconductor packaging product can avoid the problems that the pinhole blockage in the dispensing process cannot discharge glue and cannot be welded to cause open circuit, or the pinhole is too large to cause short circuit of a large amount of products.
Another object of an embodiment of the present invention is to: the semiconductor packaging product is provided, the grid electrode size is small, and the use requirement of a high-power semiconductor product can be met.
In order to achieve the purpose, the invention adopts the following technical scheme:
the manufacturing method of the semiconductor packaging product is characterized in that the height difference between the glue dispensing surface of the chip and the glue dispensing surface of the inner pin is set to be +/-0.05 mm before the glue dispensing operation, and the glue dispensing operation on the chip and the inner pin of the inner pin is performed at one time in a steel mesh printing mode.
As a preferable technical solution of the manufacturing method of the semiconductor package product, the method specifically includes the steps of:
s1, providing a lead frame, and providing the lead frame with a chip bonding area and a pin area;
s2, gluing, namely gluing the chip welding area and the pin area;
s3, providing a chip corresponding to the size of the lead frame;
s4, chip welding, namely welding the chip on a chip welding area on the lead frame;
s5, printing and gluing, wherein gluing is carried out on the glue dispensing surface of the chip and the glue dispensing surface of the inner leg, and the gluing operation is carried out in a steel mesh printing mode;
and S6, welding a copper bridge, and connecting the chip and the inner pin by adopting the copper bridge.
As a preferable technical solution of the manufacturing method of the semiconductor package product, the lead frame includes a chip bonding area and a lead area, and a height difference between the lead area and the chip bonding area is a height of the chip.
As a preferable technical solution of the manufacturing method of the semiconductor package product, the glue is applied in step S2 by a glue dispensing process or a steel screen printing process.
As a preferable technical solution of the method for manufacturing a semiconductor package product, the printing paste used for printing and gluing in step S5 is solder paste.
In a preferred embodiment of the method for manufacturing a semiconductor package product, the thickness of the steel mesh used in the steel mesh printing is 0.05 mm to 0.10 mm.
As a preferable technical solution of the method for manufacturing a semiconductor package product, the opening size on the steel mesh adopted in the steel mesh printing may be up to 0.25 mm × 0.25 mm.
In another aspect, a semiconductor package product is provided, which is manufactured by the manufacturing method of the semiconductor package product as described above.
As a preferable technical scheme of the semiconductor package product, the semiconductor package product comprises a chip and a lead frame, wherein the lead frame comprises a frame body and pins, the frame body is provided with a chip bonding area for bonding the chip, the chip is bonded on the chip bonding area, and after the chip is bonded, the surface height difference between the surface of the chip away from the lead frame and the glue dispensing surface of the pins is ± 0.05 mm.
As a preferable technical solution of the semiconductor package product, a surface of the chip away from the lead frame is provided with a source and a gate, and the source and the gate are respectively connected with the pin through a copper bridge.
The invention has the beneficial effects that: by adjusting the design of the lead frame and matching with the fixed thickness of the chip, the height difference between the tin surface on the chip and the tin surface on the pin is ensured to be within +/-0.05 mm, and the height difference is filled by utilizing the fitting property (deformable) of a steel mesh during printing, so that the tin paste on the surface of the chip and the tin paste on the pin can be printed at one time by adopting a planar steel mesh printing process; the thickness of the steel mesh is set to be 0.05 mm to 0.10 mm, and the windowing dimension on the steel mesh is 0.25 mm multiplied by 0.25 mm, so that the tin paste printing dimension of the grid is ensured to meet the requirement of the small-size grid, and the defect of pneumatic tin point is overcome.
Drawings
The invention is explained in more detail below with reference to the figures and examples.
Fig. 1 is a flowchart of a method for manufacturing a semiconductor package product according to an embodiment of the invention.
Fig. 2 is a schematic diagram of a lead frame structure according to an embodiment of the invention.
Fig. 3 is a sectional view of the structure shown in fig. 2.
Fig. 4 is a schematic structural diagram of the lead frame after solder paste dispensing according to the embodiment of the invention.
Fig. 5 is a sectional view of the structure shown in fig. 4.
Fig. 6 is a schematic structural diagram of the lead frame after the chip is soldered.
Fig. 7 is a sectional view of the structure shown in fig. 6.
Fig. 8 is a schematic structural diagram of the chip and the lead after solder paste is printed thereon according to the embodiment of the invention.
Fig. 9 is a sectional view of the structure shown in fig. 8.
Fig. 10 is a schematic structural diagram after the copper bridge is welded according to the embodiment of the invention.
Fig. 11 is a sectional view taken along line a-a in fig. 10.
Fig. 12 is a sectional view taken along line B-B in fig. 10.
In the figure:
100. a lead frame; 110. a pin; 200. a chip; 210. a source electrode; 220. a gate electrode; 300. tin paste; 400. a copper bridge.
Detailed Description
In order to make the technical problems solved, technical solutions adopted and technical effects achieved by the present invention clearer, the technical solutions of the embodiments of the present invention will be described in further detail below with reference to the accompanying drawings, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, unless otherwise explicitly specified or limited, the terms "connected" and "fixed" are to be understood broadly, e.g., as being fixedly connected, detachably connected, or integrated; can be mechanically or electrically connected; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
In the present invention, unless otherwise expressly stated or limited, "above" or "below" a first feature means that the first and second features are in direct contact, or that the first and second features are not in direct contact but are in contact with each other via another feature therebetween. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.
As shown in fig. 1 to 12, the present embodiment provides a method for manufacturing a semiconductor package product, which includes performing a glue applying operation on a chip 200 and inner leads, wherein a height difference between a glue dispensing surface of the chip 200 and a glue dispensing surface of the inner leads is set to ± 0.05 mm before the glue applying operation, and the glue applying operation performed on the chip 200 and the inner leads on the inner leads is performed at a time by using a steel mesh printing manner.
According to the scheme, the design of the lead frame 100 is adjusted, the thickness of the fixed chip 200 is matched, the height difference between the tin surface on the chip 200 and the tin surface on the pin is ensured to be within +/-0.05 mm, the height difference is filled by utilizing the fitting property (deformability) of the steel mesh during printing, namely, when the tin surface on the chip 200 and the tin surface on the pin are not at the same height, the height difference is adapted through the deformation of the steel mesh, and therefore the tin paste 300 on the surface of the chip 200 and the tin paste 300 on the pin can be printed at one time by adopting a planar steel mesh printing process; therefore, the production efficiency can be improved, and the product quality is ensured.
Specifically, the method for manufacturing a semiconductor package product according to the present embodiment includes the following steps:
s1, providing a lead frame, and providing the lead frame 100 with a chip bonding area and a pin area;
s2, gluing, namely gluing the chip welding area and the pin area;
s3, providing a chip, and providing a chip 200 corresponding to the size of the lead frame 100;
s4, die bonding, bonding the chip 200 to a die pad on the lead frame 100;
s5, printing and gluing, wherein gluing is performed on the glue dispensing surface of the chip 200 and the glue dispensing surface of the inner leg, and the gluing operation is performed in a steel mesh printing mode;
and S6, welding a copper bridge, and connecting the chip 200 and the inner pin by adopting the copper bridge 400.
The glue is applied in step S2 by a glue dispensing process or a steel screen printing process. Specifically, the present embodiment is performed by a pneumatic tin-firing process.
Providing the chip 200 corresponding to the size of the lead frame 100 as described in the step S3 means that the thickness of the chip 200 is provided to be the same as the height difference between the chip bonding surface and the inner lead dispensing surface of the lead frame 100.
The lead frame 100 includes a chip bonding area and a lead 110 area, and in this embodiment, in order to achieve that the height of the surface of the chip bonding area after the chip 200 is bonded to the chip bonding area is the same as the height of the pad surface of the lead 110, the height difference between the lead area and the chip bonding area is set to be equal to the height of the chip 200.
Therefore, after the chip 200 is welded in the chip welding area, the dispensing surface of the pin area and the dispensing surface of the chip are on the same plane, so that the chip 200 and the bonding glue on the pins 110 are printed by adopting a planar steel mesh to realize synchronous printing.
In the present embodiment, the height of the surface of the preferred lead frame 100 is the same as the height of the foot-rest surface of the pin 110 after the chip 200 is welded on the chip 200 welding area, and under the influence of processing errors, if the height cannot be completely the same, the height difference is controlled to be ± 0.05 mm, when the height difference is within the range, the source 210, the gate 220 and the pin 110 can still be simultaneously glued through sequential steel mesh printing, that is, the product quality cannot be affected by simultaneously gluing the source 210, the gate 220 and the pin 110 of the chip 200 under the condition, and when the height difference exceeds 0.05 mm, the product cannot be affected by adopting steel mesh one-time printing.
In step S5, the printing paste used for printing and gluing is solder paste 300.
In the scheme, the thickness of the steel mesh adopted in the steel mesh printing is 0.05 mm-0.10 mm.
Specifically, the thickness of the steel mesh adopted in this embodiment is 0.05 mm; in other embodiments the thickness of the steel mesh may be 0.06 mm, 0.07 mm, 0.08 mm, 0.09 mm or 0.10 mm.
By setting the thickness of the steel mesh to be 0.05 mm to 0.10 mm and setting the windowing dimension on the steel mesh to be 0.25 mm x 0.25 mm, the printing dimension of the tin paste 300 of the grid 220 meets the requirement of the small-size grid 220, and the defect of pneumatic tin spot is overcome. When the thickness of the steel mesh is between 0.05 and 0.10 mm, the steel mesh can be easily and smoothly printed when the windowing size is 0.25 mm × 0.25 mm, and the holes cannot be blocked, so that the small-size tin applying operation of the grid 220 is ensured.
Meanwhile, the embodiment also provides a semiconductor package product which is manufactured by adopting the manufacturing method of the semiconductor package product. The lead frame 100 comprises a chip 200 and a lead frame 100, wherein the lead frame 100 comprises a frame body and a pin 110, a chip welding area for welding the chip 200 is arranged on the frame body, the chip 200 is welded on the chip welding area, and after the chip 200 is welded, the height difference between the surface of the chip 200, which is far away from the lead frame 100, and the dispensing surface of the pin 110 is +/-0.05 mm.
The surface of the chip 200 away from the lead frame 100 has a source 210 and a gate 220, and the source 210 and the gate 220 are respectively connected to the leads 110 through copper bridges 400. The grid electrode 220 of the semiconductor packaging product has small size, and can meet the use requirement of high-power semiconductor products.
In the description herein, it is to be understood that the terms "upper", "lower", "left", "right", and the like are used in an orientation or positional relationship based on that shown in the drawings, and are used for convenience of description and simplicity of operation only, and do not indicate or imply that the referenced device or element must have a particular orientation, be constructed in a particular orientation, and be operated, and thus should not be construed as limiting the present invention. Furthermore, the terms "first" and "second" are used merely for descriptive purposes and are not intended to have any special meaning.
In the description herein, references to the description of "an embodiment," "an example" or the like are intended to mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example.
Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be appropriately combined to form other embodiments as will be appreciated by those skilled in the art.
The technical principle of the present invention is described above in connection with specific embodiments. The description is made for the purpose of illustrating the principles of the invention and should not be construed in any way as limiting the scope of the invention. Based on the explanations herein, those skilled in the art will be able to conceive of other embodiments of the present invention without inventive effort, which would fall within the scope of the present invention.
Claims (10)
1. A manufacturing method of a semiconductor packaging product comprises the step of gluing a chip (200) and an inner pin, and is characterized in that the height difference between the glue dispensing surface of the chip (200) and the glue dispensing surface of the inner pin is set to be +/-0.05 mm before the gluing operation, and the gluing operation on the chip (200) and the inner pin is carried out at one time in a steel mesh printing mode.
2. The method for manufacturing a semiconductor package product according to claim 1, comprising the steps of:
s1, providing a lead frame, and providing the lead frame (100) with a chip bonding area and a pin (110) area;
s2, gluing, namely gluing the chip welding area and the pin (110) area;
s3, providing a chip, and providing a chip (200) corresponding to the size of the lead frame (100);
s4, chip welding, namely welding the chip (200) on the chip (200) welding area on the lead frame (100);
s5, printing and gluing, wherein gluing is carried out on the glue dispensing surface of the chip (200) and the glue dispensing surface of the inner leg, and the gluing operation is carried out in a steel mesh printing mode;
and S6, welding a copper bridge, and connecting the chip (200) and the inner pin by adopting the copper bridge (400).
3. The method of manufacturing a semiconductor package product according to claim 2, wherein the lead frame (100) includes a chip (200) bonding area and a lead (110) area, and a difference in height between the lead (110) area and the chip (200) bonding area is a height of the chip (200).
4. The method of claim 3, wherein the glue is applied in step S2 by a dispensing process or a stencil printing process.
5. The method of manufacturing a semiconductor package product according to claim 4, wherein the printing paste used for printing the glue in step S5 is solder paste (300).
6. The manufacturing method of a semiconductor package product according to claim 5, wherein the thickness of the steel mesh adopted in the steel mesh printing is 0.05 mm to 0.10 mm.
7. The manufacturing method of the semiconductor package product according to claim 6, wherein the opening size of the steel mesh adopted in the steel mesh printing is up to 0.25 mm x 0.25 mm.
8. A semiconductor package manufactured by the method for manufacturing a semiconductor package according to any one of claims 1 to 7.
9. The semiconductor package product according to claim 8, comprising a chip (200) and a lead frame (100), wherein the lead frame (100) comprises a frame body and leads (110), the frame body has chip bonding pads for bonding the chip (200), the chip (200) is bonded to the chip bonding pads, and a difference in height between a surface of the chip (200) away from the lead frame (100) and the dispensing surfaces of the leads (110) after the chip (200) is bonded is ± 0.05 mm.
10. A semiconductor package product according to claim 9, wherein the surface of the chip (200) remote from the lead frame (100) has a source (210) and a gate (220), the source (210) and the gate (220) being connected to the leads (110) by copper bridges (400), respectively.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010263666.1A CN111599699A (en) | 2020-04-07 | 2020-04-07 | Method for manufacturing semiconductor package product and semiconductor package product |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010263666.1A CN111599699A (en) | 2020-04-07 | 2020-04-07 | Method for manufacturing semiconductor package product and semiconductor package product |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN111599699A true CN111599699A (en) | 2020-08-28 |
Family
ID=72191983
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010263666.1A Withdrawn CN111599699A (en) | 2020-04-07 | 2020-04-07 | Method for manufacturing semiconductor package product and semiconductor package product |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111599699A (en) |
-
2020
- 2020-04-07 CN CN202010263666.1A patent/CN111599699A/en not_active Withdrawn
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Application publication date: 20200828 |