CN212113705U - Power semiconductor module - Google Patents
Power semiconductor module Download PDFInfo
- Publication number
- CN212113705U CN212113705U CN202020977118.0U CN202020977118U CN212113705U CN 212113705 U CN212113705 U CN 212113705U CN 202020977118 U CN202020977118 U CN 202020977118U CN 212113705 U CN212113705 U CN 212113705U
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- Prior art keywords
- semiconductor module
- power semiconductor
- power
- substrate
- chip
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16245—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
- H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
- H01L2924/18161—Exposing the passive side of the semiconductor or solid-state body of a flip chip
Abstract
The utility model discloses a power semiconductor module, include: the device comprises a substrate, a power chip, a metal sheet, a protective body, a first welding material layer and a second welding material layer; the number of the substrates is at least one, and each substrate is provided with at least one power chip; the front surface of the power chip is integrated with a front contact element, and the back surface of the power chip is integrated with a back contact element; the power chip is inversely arranged on the substrate through the first welding material layer, and the front contact element is electrically connected with the substrate; the metal sheet is welded on the back surface of the power chip through the second welding material layer and is electrically connected with the back contact element; the substrate and the power chip are arranged in the protective body; one side of the metal sheet, which is far away from the chip, is exposed by the protective body to be used as an external connection end to be electrically connected with an external electronic device or electronic equipment. The power semiconductor module of the utility model has high current-carrying capacity; when the power semiconductor module is applied, an external current-carrying platform is not needed, the flow can be simplified, and the cost is saved.
Description
Technical Field
The utility model relates to a power semiconductor field especially relates to a power semiconductor module.
Background
The power semiconductor module is a combination formed by combining power components according to certain functions and modes; the power semiconductor module can realize different functions according to different packaged components. In the conventional power semiconductor module, a contact element is generally arranged inside the power semiconductor module, one end of the contact element is electrically connected with a semiconductor device, and the other end of the contact element extends upwards out of a shell of the power semiconductor module; the part of the contact element extending out of the shell is an external connection end of the power semiconductor module, and the external connection end is used for being connected with other electronic devices or electronic equipment so as to electrically communicate the semiconductor devices inside the power semiconductor module.
However, the current-carrying capability of the conventional power semiconductor module is limited, and before the power semiconductor module is powered on, a current-carrying platform needs to be arranged outside the power semiconductor module, and one end of the current-carrying platform, which is exposed out of the shell through a contact element, is connected with the external current-carrying platform; the current power semiconductor module needs to be externally connected with an external current-carrying platform due to the current-carrying capacity required by the external connection end of the module, so that the external connection process is complex and the cost is high.
SUMMERY OF THE UTILITY MODEL
The embodiment of the utility model provides an aim at: a power semiconductor module having a high current carrying capacity is provided.
The embodiment of the utility model provides an aim at: the power semiconductor module is applied without an external current-carrying platform, and can simplify the process and save the cost.
In order to achieve the purpose, the utility model adopts the following technical proposal:
a power semiconductor module comprising: the device comprises a substrate, a power chip, a metal sheet, a protective body, a first welding material layer and a second welding material layer; the number of the substrates is at least one, and each substrate is provided with at least one power chip;
a front contact element is integrated on the front surface of the power chip; the power chip is inversely arranged on the substrate through the first welding material layer, and the front contact element is electrically connected with the substrate; the metal sheet is welded on the back surface of the power chip through the second welding material layer, and the metal sheet is electrically connected with the power chip;
the substrate and the power chip are arranged in the protective body; one surface of the metal sheet, which is far away from the chip, is exposed out of the protective body so as to be used as an external connection end to be electrically connected with an external electronic device or electronic equipment.
Preferably, the back surface of the chip is flush with the end surface of the protective body, and the metal sheet is located outside the protective body.
Preferably, the protective member is an epoxy resin package.
Preferably, the metal sheet is a metal foil, and the thickness of the metal foil is 0.01mm to 0.3 mm.
Preferably, the metal foil is a copper foil.
Preferably, a metal foil is welded on one surface of the substrate close to the power chip, and the power chip is electrically connected with the substrate through the first welding material layer and the metal foil in sequence.
Preferably, the substrate is a lead frame or a DBC substrate.
Preferably, the first solder layer and the second solder layer are conductive bonding material layers.
Preferably, at least two of said substrates are included.
Preferably, the power chip is a diode or a transistor or a thyristor; the power semiconductor module comprises at least two power chips.
The utility model has the advantages that: the power semiconductor module has high current carrying capacity; when the power semiconductor module is applied, an external current-carrying platform is not needed, the flow can be simplified, and the cost is saved.
Drawings
The present invention will be described in further detail with reference to the accompanying drawings and examples.
Fig. 1 is a schematic structural diagram of a power semiconductor module according to an embodiment of the present invention;
fig. 2 is a schematic view of a manufacturing method of a power semiconductor module according to an embodiment of the present invention;
fig. 3 is a second schematic view illustrating a manufacturing method of a power semiconductor module according to an embodiment of the present invention;
fig. 4 is a third schematic view illustrating a manufacturing method of a power semiconductor module according to an embodiment of the present invention;
in the figure: 100. a power semiconductor module; 10. a substrate; 20. a power chip; 31. a first solder layer; 32. a second solder layer; 40. a metal sheet; 50. a protective body; 90. and (5) coating the film.
Detailed Description
In order to make the technical problems, technical solutions and technical effects achieved by the present invention more clear, the embodiments of the present invention will be described in further detail with reference to the accompanying drawings, and obviously, the described embodiments are only some embodiments, not all embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by those skilled in the art without creative efforts belong to the protection scope of the present invention.
In the description of the present invention, unless otherwise explicitly specified or limited, the terms "connected" and "fixed" are to be understood broadly, e.g. as a fixed connection, a detachable connection or an integral part; can be mechanically or electrically connected; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meaning of the above terms in the present invention can be understood in specific cases to those skilled in the art.
In the present disclosure, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may comprise direct contact between the first and second features, or may comprise contact between the first and second features not directly. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.
The utility model provides a power semiconductor module 100, which has high current-carrying capacity; when the device is applied, an external current-carrying platform is not needed, the flow can be simplified, and the cost is saved.
As shown in fig. 1, in an embodiment of the power semiconductor module 100 of the present invention, the power semiconductor module 100 includes: the substrate 10, the power chip 20, the metal sheet 40, the protective body 50, the first solder layer 31 and the second solder layer 32; the number of the substrates 10 is at least one, and each substrate 10 is provided with at least one power chip 20;
the front surface of the power chip 20 is integrated with a front contact element, and the back surface is integrated with a back contact element; the power chip 20 is inversely arranged on the substrate 10 through the first welding material layer 31, and the front contact element is electrically connected with the substrate 10;
the metal sheet 40 is soldered to the back surface of the power chip 20 through the second solder layer 32, and the metal sheet 40 is electrically connected to the back contact element;
the substrate 10 and the power chip 20 are arranged in the protective body 50; one surface of the metal sheet 40, which is far away from the chip, is exposed by the protective body 50 to serve as an external terminal to be electrically connected with an external electronic device or electronic equipment.
Here, it is understood that the protective body 50 serves to protect the substrate 10 and the metal components of the power chip 20 from moisture and harmful gas, and also serves to physically protect them.
Specifically, the power semiconductor module 100 may be electrically connected to an external power source through the metal plate 40 to supply a supply voltage to the power semiconductor module 100 through the metal plate 40.
Specifically, one end of the first welding layer is connected with the front contact element, and the other end of the first welding layer is connected with the lead frame.
In particular, the front side contact element may be, but is not limited to, a pad.
Further, as shown in fig. 1, in the present embodiment, the first solder layer 31 is a columnar solder layer.
In the power semiconductor module 100 of the present invention, the power chip 20 is inversely mounted on the substrate 10, so that the electrical connection between the front surface of the power chip 20 and the substrate 10 can be realized, and the back surface of the power chip 20 can be provided for welding the metal sheet 40; the front contact element is directly inherited into the power chip 20, and the front contact element is directly contacted with the first welding layer so as to be welded with the substrate 10 and realize electric connection, the front contact element has high current-carrying capacity, and in addition, the metal sheet 40 has larger cross section area compared with the external connection end of the existing power semiconductor module 100, so that larger current can be carried, an external current-carrying platform is not required to be specially connected when the power semiconductor module 100 is applied, and the power semiconductor module 100 can also be ensured to have larger current-carrying capacity; thus, when the power semiconductor module 100 is applied, the operation process can be simplified, and the cost can be saved.
Further, in another embodiment of the power semiconductor module 100 of the present invention, in order to facilitate the welding of the metal sheet 40 during the manufacturing process, the back surface of the chip is flush with the end surface of the protection body 50, the metal sheet 40 is welded to the back surface of the chip, and the metal sheet 40 is located outside the protection body 50, so as to facilitate the electrical connection of the metal sheet 40 with the external electronic device or electronic equipment.
Further, the protective body 50 is an epoxy resin package body, and the epoxy resin package body is formed by curing an epoxy resin package material; the epoxy resin package is wrapped around the power chip 20 except for the back surface.
Specifically, in order to make the back surface of the power chip 20 leak out of the package body and facilitate soldering the metal sheet 40 to the back surface of the power chip 20, the method for manufacturing the power semiconductor module 100 of the present invention includes:
and (3) flip-chip step: as shown in fig. 2, the power chip 20 is adhered to the substrate 10 through the first solder layer 31;
a step of rubberizing: as shown in fig. 3, an insulating adhesive film 90 is attached to the back surface of the product, where the back surface of the product (i.e. the side surface where the back surface of the power chip 20 is located;
plastic packaging: as shown in fig. 3, the product is encapsulated with an encapsulating material;
and (3) film tearing: as shown in fig. 4, the material to be encapsulated is cured into the encapsulation body; tearing off the insulating adhesive film 90 to expose the power chip from the package body;
foil pasting: as shown in fig. 1, a metal sheet 40 (e.g., copper foil) is fixed to the back surface of the power chip 20 by the second solder layer 32.
Further, in another embodiment of the power semiconductor module 100 of the present invention, the metal sheet 40 is a metal foil, the thickness of the metal foil is 0.01mm to 0.3mm, the thicker the metal foil is, the stronger the current carrying capacity is, and the metal foil with a suitable thickness can be selected by a technician according to actual needs.
Further, the metal foil is a copper foil.
Further, in another embodiment of the power semiconductor module 100 of the present invention, in order to make the power semiconductor module 100 require a larger current carrying capacity, a metal foil layer is welded on the substrate 10 near the power chip 20, and the power chip 20 sequentially passes through the first solder layer 31 and the metal foil layer and is electrically connected to the substrate 10.
Further, in another embodiment of the power semiconductor module 100 of the present invention, the substrate 10 is a lead frame, the lead frame area is large, the power chip 20 is directly welded to the front contact element in the lead frame, which can realize the power chip 20 is electrically connected to the lead frame, the electrical contact area is larger, no metal wire is needed for bonding, and the resistive loss inside the power semiconductor module 100 is smaller.
Further, in another embodiment of the power semiconductor module 100 of the present invention, the substrate 10 is a DBC substrate 10, i.e. Direct Bonded Copper substrate 10.
Further, in another embodiment of the power semiconductor module 100 of the present invention, the first solder layer 31 and the second solder layer 32 are conductive bonding material layers formed by curing a conductive bonding material.
Specifically, the first solder layer 31 is a solder paste layer or a conductive adhesive layer, and the second solder layer 32 is a solder paste layer or a conductive adhesive layer.
Further, in another embodiment of the power semiconductor module 100 of the present invention, the power semiconductor module 100 includes at least two substrates 10.
Specifically, if desired, the different substrates 10 may be electrically connected by electrical connectors.
Further, in another embodiment of the power semiconductor module 100 of the present invention, the power chip 20 is a diode or a transistor or a thyristor; the power semiconductor module 100 comprises at least two power chips 20, and the power semiconductor module 100 comprises the diodes and/or the transistors and/or thyristors.
In the description herein, it is to be understood that the terms "upper", "lower", "left", "right", and the like are used in a descriptive sense and with reference to the illustrated orientation or positional relationship, and are used for convenience in description and simplicity in operation, and do not indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the present invention. Furthermore, the terms "first" and "second" are used merely for descriptive purposes and are not intended to have any special meaning.
In the description herein, references to the description of "an embodiment," "an example" or the like are intended to mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example.
Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be appropriately combined to form other embodiments as will be appreciated by those skilled in the art.
The technical principle of the present invention is described above with reference to specific embodiments. The description is made for the purpose of illustrating the principles of the invention and should not be construed in any way as limiting the scope of the invention. Based on the explanations herein, those skilled in the art will be able to conceive of other embodiments of the present invention without any inventive effort, which would fall within the scope of the present invention.
Claims (10)
1. A power semiconductor module (100), comprising: the power chip comprises a substrate (10), a power chip (20), a metal sheet (40), a protective body (50), a first welding material layer (31) and a second welding material layer (32); the number of the substrates (10) is at least one, and each substrate (10) is provided with at least one power chip (20);
the front surface of the power chip (20) is integrated with a front contact element; the power chip (20) is inversely arranged on the substrate (10) through the first welding material layer (31), and the front contact element is electrically connected with the substrate (10); the metal sheet (40) is welded on the back surface of the power chip (20) through the second welding material layer (32), and the metal sheet (40) is electrically connected with the power chip (20);
the substrate (10) and the power chip (20) are arranged in the protective body (50); one surface of the metal sheet (40) far away from the chip is exposed out of the protective body (50) to be used as an external connection end to be electrically connected with an external electronic device or electronic equipment.
2. Power semiconductor module (100) according to claim 1, characterized in that the back side of the chip is flush with the end face of the protective body (50), the metal sheet (40) being located outside the protective body (50).
3. The power semiconductor module (100) according to claim 2, wherein the protective body (50) is an epoxy encapsulation.
4. The power semiconductor module (100) according to claim 1, wherein the metal sheet (40) is a metal foil having a thickness of 0.01mm to 0.3 mm.
5. The power semiconductor module (100) according to claim 4, wherein the metal foil is a copper foil.
6. The power semiconductor module (100) according to claim 1, wherein a metal foil is bonded to a surface of the substrate (10) near the power chip (20), and the power chip (20) is electrically connected to the substrate (10) through the first solder layer (31) and the metal foil in this order.
7. The power semiconductor module (100) according to any of claims 1-6, wherein the substrate (10) is a leadframe or a DBC substrate (10).
8. The power semiconductor module (100) according to any of claims 1-6, wherein the first solder layer (31) and the second solder layer (32) are layers of conductive bonding material.
9. The power semiconductor module (100) according to any of claims 1-6, comprising at least two of said substrates (10).
10. Power semiconductor module (100) according to claim 9, characterized in that the power chip (20) is a diode or a transistor or a thyristor; the power semiconductor module (100) comprises at least two of the power chips (20).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020977118.0U CN212113705U (en) | 2020-06-01 | 2020-06-01 | Power semiconductor module |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020977118.0U CN212113705U (en) | 2020-06-01 | 2020-06-01 | Power semiconductor module |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN212113705U true CN212113705U (en) | 2020-12-08 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202020977118.0U Active CN212113705U (en) | 2020-06-01 | 2020-06-01 | Power semiconductor module |
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| Country | Link |
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| CN (1) | CN212113705U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2022127061A1 (en) * | 2020-12-15 | 2022-06-23 | 杰群电子科技（东莞）有限公司 | Power chip stacked package structure |
-
2020
- 2020-06-01 CN CN202020977118.0U patent/CN212113705U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2022127061A1 (en) * | 2020-12-15 | 2022-06-23 | 杰群电子科技（东莞）有限公司 | Power chip stacked package structure |
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