CN111584679A - Doping method for passivation of back surface of N-type TOPCon battery - Google Patents
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- 238000000034 method Methods 0.000 title claims abstract description 72
- 238000002161 passivation Methods 0.000 title claims description 17
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 79
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims abstract description 47
- 229910052698 phosphorus Inorganic materials 0.000 claims abstract description 35
- 239000011574 phosphorus Substances 0.000 claims abstract description 35
- 238000009792 diffusion process Methods 0.000 claims abstract description 34
- 230000005641 tunneling Effects 0.000 claims abstract description 30
- 239000000758 substrate Substances 0.000 claims abstract description 22
- 238000005468 ion implantation Methods 0.000 claims abstract description 9
- 238000002347 injection Methods 0.000 claims description 60
- 239000007924 injection Substances 0.000 claims description 60
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 claims description 54
- 230000008569 process Effects 0.000 claims description 51
- 239000011259 mixed solution Substances 0.000 claims description 44
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 36
- 229910052796 boron Inorganic materials 0.000 claims description 36
- 150000002500 ions Chemical class 0.000 claims description 36
- 229920005591 polysilicon Polymers 0.000 claims description 28
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 claims description 24
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 claims description 18
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 18
- 229910052710 silicon Inorganic materials 0.000 claims description 18
- 239000010703 silicon Substances 0.000 claims description 18
- 238000004140 cleaning Methods 0.000 claims description 14
- 239000011159 matrix material Substances 0.000 claims description 14
- 238000011068 loading method Methods 0.000 claims description 12
- 229910021645 metal ion Inorganic materials 0.000 claims description 12
- 229910000073 phosphorus hydride Inorganic materials 0.000 claims description 12
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 claims description 9
- 239000000654 additive Substances 0.000 claims description 9
- 230000000996 additive effect Effects 0.000 claims description 9
- 238000000151 deposition Methods 0.000 claims description 9
- 238000005530 etching Methods 0.000 claims description 9
- 230000002349 favourable effect Effects 0.000 claims description 9
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims description 9
- 238000004519 manufacturing process Methods 0.000 claims description 9
- 229910017604 nitric acid Inorganic materials 0.000 claims description 9
- 238000005498 polishing Methods 0.000 claims description 9
- 239000000243 solution Substances 0.000 claims description 9
- 238000000137 annealing Methods 0.000 claims description 8
- 230000004913 activation Effects 0.000 claims description 6
- 239000011521 glass Substances 0.000 claims description 3
- 238000004321 preservation Methods 0.000 claims description 3
- 239000000969 carrier Substances 0.000 abstract description 8
- 230000000903 blocking effect Effects 0.000 abstract description 4
- 238000002425 crystallisation Methods 0.000 description 3
- 230000008025 crystallization Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 2
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- 230000009286 beneficial effect Effects 0.000 description 1
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Abstract
The invention aims to disclose a doping method for passivating the back surface of an N-type TOPCon battery, which is characterized in that compared with the prior art, a two-step doping mode is adopted, namely, a substrate of the back surface is doped shallowly, then a tunneling oxide layer and a polycrystalline silicon layer are deposited, and finally the polycrystalline silicon layer is doped; the doping of the back surface is finished by adopting a mode of combining ion implantation and phosphorus diffusion; the method effectively solves the problem that in the prior doping technology, due to the blocking effect of the tunneling oxide layer, the surface doping concentration of the Si substrate is always lower than that of the polycrystalline silicon layer, so that most of carriers gathered at the interface of the Si substrate and the tunneling oxide layer are relatively less, and achieves the purpose of the invention.
Description
Technical Field
The invention relates to a doping method for passivation of a back surface of a battery, in particular to a doping method for passivation of a back surface of an N-type TOPCon battery.
Background
The passivation Contact structure of the tunneling Oxide layer can enable majority carriers to penetrate through the Oxide layer and play a role in blocking minority carriers, and effectively realizes the selective permeability of the carriers, thereby greatly reducing the recombination rate of the minority carriers, not only realizing the surface passivation effect equivalent to a heterojunction structure, but also being compatible with a high-temperature process, and also avoiding the high recombination problem at an electrode Contact part, and therefore, the cell structure draws wide attention.
The back surface of the TOPCon battery is a laminated structure formed by sequentially growing a tunneling oxide layer and polycrystalline silicon on the basis of a Si substrate, so that a deposited intrinsic Poly-Si layer is doped in the doping process, and a doping source enters the surface of the Si substrate, so that on one hand, most current carriers are gathered at the interface of the Si substrate and the tunneling oxide layer, and on the other hand, as the doping source enters the Si substrate, the series resistance of the back surface is reduced, the filling factor of the battery is improved, and the improvement of the conversion efficiency of the battery end is facilitated.
The back surface of the current TOPCon battery structure is passivated by adopting a laminated structure of a tunneling oxide layer and a Poly-Si layer, although the passivation characteristic shows excellent characteristics, in the doping process of the Poly-Si layer, due to the blocking effect of the tunneling oxide layer, a doping source is not easy to enter a Si matrix part, if the doping source of the Poly-Si layer enters the Si matrix, a higher diffusion temperature or annealing temperature (doping by adopting an ion implantation mode) is needed, and the optimal crystallization temperature for the Poly-Si layer is about 850 ℃, so the higher annealing temperature is not beneficial to the crystallization of polysilicon. On the other hand, the existing doping mode is adopted, so that the doping concentration in the Si matrix is always lower than that of the polycrystalline silicon layer (determined by concentration gradient distribution in the diffusion process), and therefore, most carriers accumulated at the interface of the Si matrix and the tunneling oxide layer are less, the filling factor and the current of the battery are smaller, and the conversion efficiency of the battery is influenced.
Therefore, a doping method for passivation of the back surface of an N-type TOPCon cell is particularly needed to solve the above existing problems.
Disclosure of Invention
The invention aims to provide a doping method for passivating the back surface of an N-type TOPCon cell, which not only solves the problem that the doping concentration in a Si matrix of the back surface doping of the prior TOPCon cell is always lower than that of a polycrystalline silicon layer, but also can realize the effect of back surface doping at the optimal crystallization temperature of the polycrystalline silicon.
The technical problem solved by the invention can be realized by adopting the following technical scheme:
in a first aspect, the present invention provides a doping method for passivation of a back surface of an N-type TOPCon cell, comprising the steps of:
step one, adopting a conventional texturing process to immerse an original silicon wafer in KOH or NaOH with the mass fraction of 2-5% and H with the mass fraction of 2-6% at the temperature of 65-85 DEG C2O2Removing a damaged layer in the mixed solution, and then performing double-sided texturing by using a mixed solution of KOH or NaOH solution with the mass fraction of 1-3% and a certain amount of isopropanol or a texturing additive;
loading the textured silicon wafer obtained after double-sided texturing into a tubular low-pressure boron diffusion furnace tube to finish the manufacturing process of the PN junction;
polishing and edge etching are carried out on the back surface by using a mixed solution of HNO3 and HF, so that on one hand, a boron doped layer which extends around the back surface in the boron diffusion process is removed, the front surface and the back surface of the boron doped layer are insulated, and on the other hand, the polished surface is favorable for depositing a more uniform tunneling oxide layer and a more uniform polycrystalline silicon layer;
injecting a phosphorus source (red phosphorus or phosphine) into the polysilicon layer by adopting an ion injection machine, namely performing ion injection on the polished surface of the Si substrate, wherein the injection dosage is 1e +14-5e +14atoms/cm2Reasonably selecting the injection dosage according to the matching of the process;
step five, adopting HCl and H with the volume fraction of 1: 12O2Cleaning the mixed solution to remove organic matters and surface metal ion pollution introduced in the ion injection process, and then cleaning the mixed solution for 120-240s by adopting HF with the mass fraction of 2% to remove an oxide layer on the surface;
growing a tunneling oxide layer and a polysilicon layer on the back surface by adopting LPCVD equipment at the temperature of 550-600 ℃ to control the thickness of the polysilicon layer to be between 100 and 150 nm;
step seven, injecting a phosphorus source (red phosphorus or phosphine) into the polysilicon layer by adopting an ion injection machine, namely performing ion injection on the poly-Si layer, wherein the injection dosage is 2.0e +15-4.0e +15atoms/cm2Reasonably selecting the injection dosage according to the matching of the process;
step eight, adopting HCl and H with the volume fraction of 1: 12O2The mixed solution is cleaned to remove organic matters and surface metal ion pollution introduced in the ion injection process;
and step nine, carrying out heat preservation at the high temperature of 840-860 ℃ for 20-30min to carry out back surface annealing treatment, completing the activation of the phosphorus source after the ion implantation of the back surface (comprising the polycrystalline silicon layer and the matrix doping layer), and enabling the Poly-Si layer to form N + doping, thereby completing the back surface doping process.
In a second aspect, the present invention provides a doping method for passivation of the back surface of an N-type TOPCon cell, which is characterized in that the doping method comprises the following steps:
step one, adopting a conventional texturing process to immerse an original silicon wafer in KOH or NaOH with the mass fraction of 2-5% and H with the mass fraction of 2-6% at the temperature of 65-85 DEG C2O2Removing a damaged layer in the mixed solution, and then performing double-sided texturing by using a mixed solution of KOH or NaOH solution with the mass fraction of 1-3% and a certain amount of isopropanol or a texturing additive;
loading the textured silicon wafer obtained after double-sided texturing into a tubular low-pressure boron diffusion furnace tube to finish the manufacturing process of the PN junction;
polishing and edge etching are carried out on the back surface by using a mixed solution of HNO3 and HF, so that on one hand, a boron doped layer which extends around the back surface in the boron diffusion process is removed, the front surface and the back surface of the boron doped layer are insulated, and on the other hand, the polished surface is favorable for depositing a more uniform tunneling oxide layer and a more uniform polycrystalline silicon layer;
step four, preserving heat for 5-15min at the high temperature of 840-860 ℃, and performing a phosphorus diffusion process on the polished surface of the Si substrate to form a layer of ultra-shallow doped layer on the polished surface of the Si substrate;
step five, cleaning 120-240s by adopting HF with the mass fraction of 2%, and removing the phosphorosilicate glass on the surface of the polished surface in the phosphorus diffusion process to ensure that the polished surface is clean;
growing a tunneling oxide layer and a polysilicon layer on the back surface by adopting LPCVD equipment at the temperature of 550-600 ℃ to control the thickness of the polysilicon layer to be between 100 and 150 nm;
step seven, injecting a phosphorus source (red phosphorus or phosphine) into the polycrystalline silicon layer by adopting an ion injection machine, namely performing ion injection on the poly-Si layer, wherein the injection dosage is 2.0e +15-4.0e +15atoms/cm2, and the injection dosage is reasonably selected according to the matching of the process;
step eight, adopting HCl and H with the volume fraction of 1: 12O2The mixed solution is cleaned to remove organic matters and surface metal ion pollution introduced in the ion injection process;
and step nine, carrying out back surface annealing treatment by keeping the temperature at the high temperature of 840-860 ℃ for 20-30min to complete activation of the phosphorus source after ion implantation of the polycrystalline silicon layer, so that N + doping is formed on the Poly-Si layer, and the back surface doping process is completed.
In a third aspect, the present invention provides a doping method for passivation of the back surface of an N-type TOPCon cell, which is characterized in that the doping method comprises the following steps:
step one, adopting a conventional texturing process to immerse an original silicon wafer in KOH or NaOH with the mass fraction of 2-5% and H with the mass fraction of 2-6% at the temperature of 65-85 DEG C2O2Removing a damaged layer in the mixed solution, and then performing double-sided texturing by using a mixed solution of KOH or NaOH solution with the mass fraction of 1-3% and a certain amount of isopropanol or a texturing additive;
loading the textured silicon wafer obtained after double-sided texturing into a tubular low-pressure boron diffusion furnace tube to finish the manufacturing process of the PN junction;
polishing and edge etching are carried out on the back surface by using a mixed solution of HNO3 and HF, so that on one hand, a boron doped layer which extends around the back surface in the boron diffusion process is removed, the front surface and the back surface of the boron doped layer are insulated, and on the other hand, the polished surface is favorable for depositing a more uniform tunneling oxide layer and a more uniform polycrystalline silicon layer;
injecting a phosphorus source (red phosphorus or phosphine) into the polysilicon layer by adopting an ion injection machine, namely performing ion injection on the polished surface of the Si substrate, wherein the injection dosage is 1e +14-5e +14atoms/cm2Reasonably selecting the injection dosage according to the matching of the process;
step five, adopting HCl and H with the volume fraction of 1: 12O2Cleaning the mixed solution to remove organic matters and surface metal ion pollution introduced in the ion injection process, and then cleaning the mixed solution for 120-240s by adopting HF with the mass fraction of 2% to remove an oxide layer on the surface;
growing a tunneling oxide layer and a polysilicon layer on the back surface by adopting LPCVD equipment at the temperature of 550-600 ℃ to control the thickness of the polysilicon layer to be between 100 and 150 nm;
and step seven, loading the structure manufactured in the step into a tubular phosphorus diffusion furnace tube, and then preserving heat for 15-25min at the high temperature of 840-860 ℃, wherein the whole process is carried out at the high temperature, so that the phosphorus source injected in advance in the fourth step in the Si matrix is activated while the phosphorus source diffusion is carried out on the surface of the polycrystalline silicon layer, and the doping of the polycrystalline silicon layer and the Si matrix layer is realized at one time, thereby completing the back surface doping process.
Compared with the prior art, the doping method for passivating the back surface of the N-type TOPCon battery has the advantages that a two-step doping mode is adopted, namely, the substrate of the back surface is doped shallowly, then a tunneling oxide layer and a polycrystalline silicon layer are deposited, and finally the polycrystalline silicon layer is doped; the doping of the back surface is finished by adopting a mode of combining ion implantation and phosphorus diffusion; the method effectively solves the problem that in the prior doping technology, due to the blocking effect of the tunneling oxide layer, the surface doping concentration of the Si substrate is always lower than that of the polycrystalline silicon layer, so that most of carriers gathered at the interface of the Si substrate and the tunneling oxide layer are relatively less, and achieves the purpose of the invention.
The features of the present invention will be apparent from the accompanying drawings and from the detailed description of the preferred embodiments which follows.
Drawings
FIG. 1 is a process flow diagram of example 1 of the present invention;
FIG. 2 is a process flow diagram of example 2 of the present invention;
FIG. 3 is a process flow diagram of example 3 of the present invention.
Detailed Description
In order to make the technical means, the creation characteristics, the achievement purposes and the effects of the invention easy to understand, the invention is further explained below by combining the specific drawings.
Example 1
As shown in fig. 1, the doping method for passivation of the back surface of an N-type TOPCon cell according to the present invention comprises the following steps:
step one, adopting a conventional texturing process to immerse an original silicon wafer at the temperature of 65-85 ℃ for mass division2-5% of KOH or NaOH and 2-6% of H by mass2O2Removing a damaged layer in the mixed solution, and then performing double-sided texturing by using a mixed solution of KOH or NaOH solution with the mass fraction of 1-3% and a certain amount of isopropanol or a texturing additive;
loading the textured silicon wafer obtained after double-sided texturing into a tubular low-pressure boron diffusion furnace tube to finish the manufacturing process of the PN junction;
polishing and edge etching are carried out on the back surface by using a mixed solution of HNO3 and HF, so that on one hand, a boron doped layer which extends around the back surface in the boron diffusion process is removed, the front surface and the back surface of the boron doped layer are insulated, and on the other hand, the polished surface is favorable for depositing a more uniform tunneling oxide layer and a more uniform polycrystalline silicon layer;
injecting a phosphorus source (red phosphorus or phosphine) into the polysilicon layer by adopting an ion injection machine, namely performing ion injection on the polished surface of the Si substrate, wherein the injection dosage is 1e +14-5e +14atoms/cm2Reasonably selecting the injection dosage according to the matching of the process;
step five, adopting HCl and H with the volume fraction of 1: 12O2Cleaning the mixed solution to remove organic matters and surface metal ion pollution introduced in the ion injection process, and then cleaning the mixed solution for 120-240s by adopting HF with the mass fraction of 2% to remove an oxide layer on the surface;
growing a tunneling oxide layer and a polysilicon layer on the back surface by adopting LPCVD equipment at the temperature of 550-600 ℃ to control the thickness of the polysilicon layer to be between 100 and 150 nm;
step seven, injecting a phosphorus source (red phosphorus or phosphine) into the polysilicon layer by adopting an ion injection machine, namely performing ion injection on the poly-Si layer, wherein the injection dosage is 2.0e +15-4.0e +15atoms/cm2Reasonably selecting the injection dosage according to the matching of the process;
step eight, adopting HCl and H with the volume fraction of 1: 12O2The mixed solution is cleaned to remove organic matters and surface metal ion pollution introduced in the ion injection process;
and step nine, carrying out heat preservation at the high temperature of 840-860 ℃ for 20-30min to carry out back surface annealing treatment, completing the activation of the phosphorus source after the ion implantation of the back surface (comprising the polycrystalline silicon layer and the matrix doping layer), and enabling the Poly-Si layer to form N + doping, thereby completing the back surface doping process.
Example 2
As shown in fig. 2, the doping method for passivation of the back surface of an N-type TOPCon cell according to the present invention comprises the following steps:
step one, adopting a conventional texturing process to immerse an original silicon wafer in KOH or NaOH with the mass fraction of 2-5% and H with the mass fraction of 2-6% at the temperature of 65-85 DEG C2O2Removing a damaged layer in the mixed solution, and then performing double-sided texturing by using a mixed solution of KOH or NaOH solution with the mass fraction of 1-3% and a certain amount of isopropanol or a texturing additive;
loading the textured silicon wafer obtained after double-sided texturing into a tubular low-pressure boron diffusion furnace tube to finish the manufacturing process of the PN junction;
polishing and edge etching are carried out on the back surface by using a mixed solution of HNO3 and HF, so that on one hand, a boron doped layer which extends around the back surface in the boron diffusion process is removed, the front surface and the back surface of the boron doped layer are insulated, and on the other hand, the polished surface is favorable for depositing a more uniform tunneling oxide layer and a more uniform polycrystalline silicon layer;
step four, preserving heat for 5-15min at the high temperature of 840-860 ℃, and performing a phosphorus diffusion process on the polished surface of the Si substrate to form a layer of ultra-shallow doped layer on the polished surface of the Si substrate;
step five, cleaning 120-240s by adopting HF with the mass fraction of 2%, and removing the phosphorosilicate glass on the surface of the polished surface in the phosphorus diffusion process to ensure that the polished surface is clean;
growing a tunneling oxide layer and a polysilicon layer on the back surface by adopting LPCVD equipment at the temperature of 550-600 ℃ to control the thickness of the polysilicon layer to be between 100 and 150 nm;
step seven, injecting a phosphorus source (red phosphorus or phosphine) into the polycrystalline silicon layer by adopting an ion injection machine, namely performing ion injection on the poly-Si layer, wherein the injection dosage is 2.0e +15-4.0e +15atoms/cm2, and the injection dosage is reasonably selected according to the matching of the process;
step eight, adopting HCl and H with the volume fraction of 1: 12O2The mixed solution is cleaned to remove organic matters and surface metal ion pollution introduced in the ion injection process;
and step nine, carrying out back surface annealing treatment by keeping the temperature at the high temperature of 840-860 ℃ for 20-30min to complete activation of the phosphorus source after ion implantation of the polycrystalline silicon layer, so that N + doping is formed on the Poly-Si layer, and the back surface doping process is completed.
Example 3
As shown in fig. 3, the doping method for passivation of the back surface of an N-type TOPCon cell according to the present invention comprises the following steps:
step one, adopting a conventional texturing process to immerse an original silicon wafer in KOH or NaOH with the mass fraction of 2-5% and H with the mass fraction of 2-6% at the temperature of 65-85 DEG C2O2Removing a damaged layer in the mixed solution, and then performing double-sided texturing by using a mixed solution of KOH or NaOH solution with the mass fraction of 1-3% and a certain amount of isopropanol or a texturing additive;
loading the textured silicon wafer obtained after double-sided texturing into a tubular low-pressure boron diffusion furnace tube to finish the manufacturing process of the PN junction;
polishing and edge etching are carried out on the back surface by using a mixed solution of HNO3 and HF, so that on one hand, a boron doped layer which extends around the back surface in the boron diffusion process is removed, the front surface and the back surface of the boron doped layer are insulated, and on the other hand, the polished surface is favorable for depositing a more uniform tunneling oxide layer and a more uniform polycrystalline silicon layer;
injecting a phosphorus source (red phosphorus or phosphine) into the polysilicon layer by adopting an ion injection machine, namely performing ion injection on the polished surface of the Si substrate, wherein the injection dosage is 1e +14-5e +14atoms/cm2Reasonably selecting the injection dosage according to the matching of the process;
step five, adopting HCl and H with the volume fraction of 1: 12O2The mixed solution is cleaned to remove organic matters and surface metal ion pollution introduced in the ion injection process, and then the mass fraction is adopted as2% is HF cleaning for 120-240s, and the oxide layer on the surface is removed;
growing a tunneling oxide layer and a polysilicon layer on the back surface by adopting LPCVD equipment at the temperature of 550-600 ℃ to control the thickness of the polysilicon layer to be between 100 and 150 nm;
and step seven, loading the structure manufactured in the step into a tubular phosphorus diffusion furnace tube, and then preserving heat for 15-25min at the high temperature of 840-860 ℃, wherein the whole process is carried out at the high temperature, so that the phosphorus source injected in advance in the fourth step in the Si matrix is activated while the phosphorus source diffusion is carried out on the surface of the polycrystalline silicon layer, and the doping of the polycrystalline silicon layer and the Si matrix layer is realized at one time, thereby completing the back surface doping process.
The foregoing shows and describes the general principles and broad features of the present invention and advantages thereof. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, which are merely illustrative of the principles of the present invention, but that various changes and modifications may be made without departing from the spirit and scope of the invention, which is defined by the appended claims and their equivalents.
Claims (3)
1. A doping method for passivation of the back surface of an N-type TOPCon battery is characterized by comprising the following steps:
step one, adopting a conventional texturing process to immerse an original silicon wafer in KOH or NaOH with the mass fraction of 2-5% and H with the mass fraction of 2-6% at the temperature of 65-85 DEG C2O2Removing a damaged layer in the mixed solution, and then performing double-sided texturing by using a mixed solution of KOH or NaOH solution with the mass fraction of 1-3% and a certain amount of isopropanol or a texturing additive;
loading the textured silicon wafer obtained after double-sided texturing into a tubular low-pressure boron diffusion furnace tube to finish the manufacturing process of the PN junction;
polishing and edge etching are carried out on the back surface by using a mixed solution of HNO3 and HF, so that on one hand, a boron doped layer which extends around the back surface in the boron diffusion process is removed, the front surface and the back surface of the boron doped layer are insulated, and on the other hand, the polished surface is favorable for depositing a more uniform tunneling oxide layer and a more uniform polycrystalline silicon layer;
injecting a phosphorus source (red phosphorus or phosphine) into the polysilicon layer by adopting an ion injection machine, namely performing ion injection on the polished surface of the Si substrate, wherein the injection dosage is 1e +14-5e +14atoms/cm2Reasonably selecting the injection dosage according to the matching of the process;
step five, adopting HCl and H with the volume fraction of 1: 12O2Cleaning the mixed solution to remove organic matters and surface metal ion pollution introduced in the ion injection process, and then cleaning the mixed solution for 120-240s by adopting HF with the mass fraction of 2% to remove an oxide layer on the surface;
growing a tunneling oxide layer and a polysilicon layer on the back surface by adopting LPCVD equipment at the temperature of 550-600 ℃ to control the thickness of the polysilicon layer to be between 100 and 150 nm;
step seven, injecting a phosphorus source (red phosphorus or phosphine) into the polysilicon layer by adopting an ion injection machine, namely performing ion injection on the poly-Si layer, wherein the injection dosage is 2.0e +15-4.0e +15atoms/cm2Reasonably selecting the injection dosage according to the matching of the process;
step eight, adopting HCl and H with the volume fraction of 1: 12O2The mixed solution is cleaned to remove organic matters and surface metal ion pollution introduced in the ion injection process;
and step nine, carrying out heat preservation at the high temperature of 840-860 ℃ for 20-30min to carry out back surface annealing treatment, completing the activation of the phosphorus source after the ion implantation of the back surface (comprising the polycrystalline silicon layer and the matrix doping layer), and enabling the Poly-Si layer to form N + doping, thereby completing the back surface doping process.
2. A doping method for passivation of the back surface of an N-type TOPCon battery is characterized by comprising the following steps:
step one, adopting a conventional texturing process to immerse an original silicon wafer at the temperature of 65-85 ℃ and the textureKOH or NaOH with the weight fraction of 2-5 percent and H with the weight fraction of 2-6 percent2O2Removing a damaged layer in the mixed solution, and then performing double-sided texturing by using a mixed solution of KOH or NaOH solution with the mass fraction of 1-3% and a certain amount of isopropanol or a texturing additive;
loading the textured silicon wafer obtained after double-sided texturing into a tubular low-pressure boron diffusion furnace tube to finish the manufacturing process of the PN junction;
polishing and edge etching are carried out on the back surface by using a mixed solution of HNO3 and HF, so that on one hand, a boron doped layer which extends around the back surface in the boron diffusion process is removed, the front surface and the back surface of the boron doped layer are insulated, and on the other hand, the polished surface is favorable for depositing a more uniform tunneling oxide layer and a more uniform polycrystalline silicon layer;
step four, preserving heat for 5-15min at the high temperature of 840-860 ℃, and performing a phosphorus diffusion process on the polished surface of the Si substrate to form a layer of ultra-shallow doped layer on the polished surface of the Si substrate;
step five, cleaning 120-240s by adopting HF with the mass fraction of 2%, and removing the phosphorosilicate glass on the surface of the polished surface in the phosphorus diffusion process to ensure that the polished surface is clean;
growing a tunneling oxide layer and a polysilicon layer on the back surface by adopting LPCVD equipment at the temperature of 550-600 ℃ to control the thickness of the polysilicon layer to be between 100 and 150 nm;
step seven, injecting a phosphorus source (red phosphorus or phosphine) into the polycrystalline silicon layer by adopting an ion injection machine, namely performing ion injection on the poly-Si layer, wherein the injection dosage is 2.0e +15-4.0e +15atoms/cm2, and the injection dosage is reasonably selected according to the matching of the process;
step eight, adopting HCl and H with the volume fraction of 1: 12O2The mixed solution is cleaned to remove organic matters and surface metal ion pollution introduced in the ion injection process;
and step nine, carrying out back surface annealing treatment by keeping the temperature at the high temperature of 840-860 ℃ for 20-30min to complete activation of the phosphorus source after ion implantation of the polycrystalline silicon layer, so that N + doping is formed on the Poly-Si layer, and the back surface doping process is completed.
3. A doping method for passivation of the back surface of an N-type TOPCon battery is characterized by comprising the following steps:
step one, adopting a conventional texturing process to immerse an original silicon wafer in KOH or NaOH with the mass fraction of 2-5% and H with the mass fraction of 2-6% at the temperature of 65-85 DEG C2O2Removing a damaged layer in the mixed solution, and then performing double-sided texturing by using a mixed solution of KOH or NaOH solution with the mass fraction of 1-3% and a certain amount of isopropanol or a texturing additive;
loading the textured silicon wafer obtained after double-sided texturing into a tubular low-pressure boron diffusion furnace tube to finish the manufacturing process of the PN junction;
polishing and edge etching are carried out on the back surface by using a mixed solution of HNO3 and HF, so that on one hand, a boron doped layer which extends around the back surface in the boron diffusion process is removed, the front surface and the back surface of the boron doped layer are insulated, and on the other hand, the polished surface is favorable for depositing a more uniform tunneling oxide layer and a more uniform polycrystalline silicon layer;
injecting a phosphorus source (red phosphorus or phosphine) into the polysilicon layer by adopting an ion injection machine, namely performing ion injection on the polished surface of the Si substrate, wherein the injection dosage is 1e +14-5e +14atoms/cm2Reasonably selecting the injection dosage according to the matching of the process;
step five, adopting HCl and H with the volume fraction of 1: 12O2Cleaning the mixed solution to remove organic matters and surface metal ion pollution introduced in the ion injection process, and then cleaning the mixed solution for 120-240s by adopting HF with the mass fraction of 2% to remove an oxide layer on the surface;
growing a tunneling oxide layer and a polysilicon layer on the back surface by adopting LPCVD equipment at the temperature of 550-600 ℃ to control the thickness of the polysilicon layer to be between 100 and 150 nm;
and step seven, loading the structure manufactured in the step into a tubular phosphorus diffusion furnace tube, and then preserving heat for 15-25min at the high temperature of 840-860 ℃, wherein the whole process is carried out at the high temperature, so that the phosphorus source injected in advance in the fourth step in the Si matrix is activated while the phosphorus source diffusion is carried out on the surface of the polycrystalline silicon layer, and the doping of the polycrystalline silicon layer and the Si matrix layer is realized at one time, thereby completing the back surface doping process.
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